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-rw-r--r--arch/mips/include/asm/octeon/cvmx-ipd-defs.h1111
1 files changed, 30 insertions, 1081 deletions
diff --git a/arch/mips/include/asm/octeon/cvmx-ipd-defs.h b/arch/mips/include/asm/octeon/cvmx-ipd-defs.h
index 1193f73bb74..e0a5bfe88d0 100644
--- a/arch/mips/include/asm/octeon/cvmx-ipd-defs.h
+++ b/arch/mips/include/asm/octeon/cvmx-ipd-defs.h
@@ -4,7 +4,7 @@
4 * Contact: support@caviumnetworks.com 4 * Contact: support@caviumnetworks.com
5 * This file is part of the OCTEON SDK 5 * This file is part of the OCTEON SDK
6 * 6 *
7 * Copyright (c) 2003-2012 Cavium Networks 7 * Copyright (c) 2003-2010 Cavium Networks
8 * 8 *
9 * This file is free software; you can redistribute it and/or modify 9 * This file is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License, Version 2, as 10 * it under the terms of the GNU General Public License, Version 2, as
@@ -32,37 +32,23 @@
32#define CVMX_IPD_1st_NEXT_PTR_BACK (CVMX_ADD_IO_SEG(0x00014F0000000150ull)) 32#define CVMX_IPD_1st_NEXT_PTR_BACK (CVMX_ADD_IO_SEG(0x00014F0000000150ull))
33#define CVMX_IPD_2nd_NEXT_PTR_BACK (CVMX_ADD_IO_SEG(0x00014F0000000158ull)) 33#define CVMX_IPD_2nd_NEXT_PTR_BACK (CVMX_ADD_IO_SEG(0x00014F0000000158ull))
34#define CVMX_IPD_BIST_STATUS (CVMX_ADD_IO_SEG(0x00014F00000007F8ull)) 34#define CVMX_IPD_BIST_STATUS (CVMX_ADD_IO_SEG(0x00014F00000007F8ull))
35#define CVMX_IPD_BPIDX_MBUF_TH(offset) (CVMX_ADD_IO_SEG(0x00014F0000002000ull) + ((offset) & 63) * 8)
36#define CVMX_IPD_BPID_BP_COUNTERX(offset) (CVMX_ADD_IO_SEG(0x00014F0000003000ull) + ((offset) & 63) * 8)
37#define CVMX_IPD_BP_PRT_RED_END (CVMX_ADD_IO_SEG(0x00014F0000000328ull)) 35#define CVMX_IPD_BP_PRT_RED_END (CVMX_ADD_IO_SEG(0x00014F0000000328ull))
38#define CVMX_IPD_CLK_COUNT (CVMX_ADD_IO_SEG(0x00014F0000000338ull)) 36#define CVMX_IPD_CLK_COUNT (CVMX_ADD_IO_SEG(0x00014F0000000338ull))
39#define CVMX_IPD_CREDITS (CVMX_ADD_IO_SEG(0x00014F0000004410ull))
40#define CVMX_IPD_CTL_STATUS (CVMX_ADD_IO_SEG(0x00014F0000000018ull)) 37#define CVMX_IPD_CTL_STATUS (CVMX_ADD_IO_SEG(0x00014F0000000018ull))
41#define CVMX_IPD_ECC_CTL (CVMX_ADD_IO_SEG(0x00014F0000004408ull))
42#define CVMX_IPD_FREE_PTR_FIFO_CTL (CVMX_ADD_IO_SEG(0x00014F0000000780ull))
43#define CVMX_IPD_FREE_PTR_VALUE (CVMX_ADD_IO_SEG(0x00014F0000000788ull))
44#define CVMX_IPD_HOLD_PTR_FIFO_CTL (CVMX_ADD_IO_SEG(0x00014F0000000790ull))
45#define CVMX_IPD_INT_ENB (CVMX_ADD_IO_SEG(0x00014F0000000160ull)) 38#define CVMX_IPD_INT_ENB (CVMX_ADD_IO_SEG(0x00014F0000000160ull))
46#define CVMX_IPD_INT_SUM (CVMX_ADD_IO_SEG(0x00014F0000000168ull)) 39#define CVMX_IPD_INT_SUM (CVMX_ADD_IO_SEG(0x00014F0000000168ull))
47#define CVMX_IPD_NEXT_PKT_PTR (CVMX_ADD_IO_SEG(0x00014F00000007A0ull))
48#define CVMX_IPD_NEXT_WQE_PTR (CVMX_ADD_IO_SEG(0x00014F00000007A8ull))
49#define CVMX_IPD_NOT_1ST_MBUFF_SKIP (CVMX_ADD_IO_SEG(0x00014F0000000008ull)) 40#define CVMX_IPD_NOT_1ST_MBUFF_SKIP (CVMX_ADD_IO_SEG(0x00014F0000000008ull))
50#define CVMX_IPD_ON_BP_DROP_PKTX(block_id) (CVMX_ADD_IO_SEG(0x00014F0000004100ull))
51#define CVMX_IPD_PACKET_MBUFF_SIZE (CVMX_ADD_IO_SEG(0x00014F0000000010ull)) 41#define CVMX_IPD_PACKET_MBUFF_SIZE (CVMX_ADD_IO_SEG(0x00014F0000000010ull))
52#define CVMX_IPD_PKT_ERR (CVMX_ADD_IO_SEG(0x00014F00000003F0ull))
53#define CVMX_IPD_PKT_PTR_VALID (CVMX_ADD_IO_SEG(0x00014F0000000358ull)) 42#define CVMX_IPD_PKT_PTR_VALID (CVMX_ADD_IO_SEG(0x00014F0000000358ull))
54#define CVMX_IPD_PORTX_BP_PAGE_CNT(offset) (CVMX_ADD_IO_SEG(0x00014F0000000028ull) + ((offset) & 63) * 8) 43#define CVMX_IPD_PORTX_BP_PAGE_CNT(offset) (CVMX_ADD_IO_SEG(0x00014F0000000028ull) + ((offset) & 63) * 8)
55#define CVMX_IPD_PORTX_BP_PAGE_CNT2(offset) (CVMX_ADD_IO_SEG(0x00014F0000000368ull) + ((offset) & 63) * 8 - 8*36) 44#define CVMX_IPD_PORTX_BP_PAGE_CNT2(offset) (CVMX_ADD_IO_SEG(0x00014F0000000368ull) + ((offset) & 63) * 8 - 8*36)
56#define CVMX_IPD_PORTX_BP_PAGE_CNT3(offset) (CVMX_ADD_IO_SEG(0x00014F00000003D0ull) + ((offset) & 63) * 8 - 8*40) 45#define CVMX_IPD_PORTX_BP_PAGE_CNT3(offset) (CVMX_ADD_IO_SEG(0x00014F00000003D0ull) + ((offset) & 63) * 8 - 8*40)
57#define CVMX_IPD_PORT_BP_COUNTERS2_PAIRX(offset) (CVMX_ADD_IO_SEG(0x00014F0000000388ull) + ((offset) & 63) * 8 - 8*36) 46#define CVMX_IPD_PORT_BP_COUNTERS2_PAIRX(offset) (CVMX_ADD_IO_SEG(0x00014F0000000388ull) + ((offset) & 63) * 8 - 8*36)
58#define CVMX_IPD_PORT_BP_COUNTERS3_PAIRX(offset) (CVMX_ADD_IO_SEG(0x00014F00000003B0ull) + ((offset) & 63) * 8 - 8*40) 47#define CVMX_IPD_PORT_BP_COUNTERS3_PAIRX(offset) (CVMX_ADD_IO_SEG(0x00014F00000003B0ull) + ((offset) & 63) * 8 - 8*40)
59#define CVMX_IPD_PORT_BP_COUNTERS4_PAIRX(offset) (CVMX_ADD_IO_SEG(0x00014F0000000410ull) + ((offset) & 63) * 8 - 8*44)
60#define CVMX_IPD_PORT_BP_COUNTERS_PAIRX(offset) (CVMX_ADD_IO_SEG(0x00014F00000001B8ull) + ((offset) & 63) * 8) 48#define CVMX_IPD_PORT_BP_COUNTERS_PAIRX(offset) (CVMX_ADD_IO_SEG(0x00014F00000001B8ull) + ((offset) & 63) * 8)
61#define CVMX_IPD_PORT_PTR_FIFO_CTL (CVMX_ADD_IO_SEG(0x00014F0000000798ull))
62#define CVMX_IPD_PORT_QOS_INTX(offset) (CVMX_ADD_IO_SEG(0x00014F0000000808ull) + ((offset) & 7) * 8) 49#define CVMX_IPD_PORT_QOS_INTX(offset) (CVMX_ADD_IO_SEG(0x00014F0000000808ull) + ((offset) & 7) * 8)
63#define CVMX_IPD_PORT_QOS_INT_ENBX(offset) (CVMX_ADD_IO_SEG(0x00014F0000000848ull) + ((offset) & 7) * 8) 50#define CVMX_IPD_PORT_QOS_INT_ENBX(offset) (CVMX_ADD_IO_SEG(0x00014F0000000848ull) + ((offset) & 7) * 8)
64#define CVMX_IPD_PORT_QOS_X_CNT(offset) (CVMX_ADD_IO_SEG(0x00014F0000000888ull) + ((offset) & 511) * 8) 51#define CVMX_IPD_PORT_QOS_X_CNT(offset) (CVMX_ADD_IO_SEG(0x00014F0000000888ull) + ((offset) & 511) * 8)
65#define CVMX_IPD_PORT_SOPX(block_id) (CVMX_ADD_IO_SEG(0x00014F0000004400ull))
66#define CVMX_IPD_PRC_HOLD_PTR_FIFO_CTL (CVMX_ADD_IO_SEG(0x00014F0000000348ull)) 52#define CVMX_IPD_PRC_HOLD_PTR_FIFO_CTL (CVMX_ADD_IO_SEG(0x00014F0000000348ull))
67#define CVMX_IPD_PRC_PORT_PTR_FIFO_CTL (CVMX_ADD_IO_SEG(0x00014F0000000350ull)) 53#define CVMX_IPD_PRC_PORT_PTR_FIFO_CTL (CVMX_ADD_IO_SEG(0x00014F0000000350ull))
68#define CVMX_IPD_PTR_COUNT (CVMX_ADD_IO_SEG(0x00014F0000000320ull)) 54#define CVMX_IPD_PTR_COUNT (CVMX_ADD_IO_SEG(0x00014F0000000320ull))
@@ -77,8 +63,6 @@
77#define CVMX_IPD_QOS7_RED_MARKS CVMX_IPD_QOSX_RED_MARKS(7) 63#define CVMX_IPD_QOS7_RED_MARKS CVMX_IPD_QOSX_RED_MARKS(7)
78#define CVMX_IPD_QOSX_RED_MARKS(offset) (CVMX_ADD_IO_SEG(0x00014F0000000178ull) + ((offset) & 7) * 8) 64#define CVMX_IPD_QOSX_RED_MARKS(offset) (CVMX_ADD_IO_SEG(0x00014F0000000178ull) + ((offset) & 7) * 8)
79#define CVMX_IPD_QUE0_FREE_PAGE_CNT (CVMX_ADD_IO_SEG(0x00014F0000000330ull)) 65#define CVMX_IPD_QUE0_FREE_PAGE_CNT (CVMX_ADD_IO_SEG(0x00014F0000000330ull))
80#define CVMX_IPD_RED_BPID_ENABLEX(block_id) (CVMX_ADD_IO_SEG(0x00014F0000004200ull))
81#define CVMX_IPD_RED_DELAY (CVMX_ADD_IO_SEG(0x00014F0000004300ull))
82#define CVMX_IPD_RED_PORT_ENABLE (CVMX_ADD_IO_SEG(0x00014F00000002D8ull)) 66#define CVMX_IPD_RED_PORT_ENABLE (CVMX_ADD_IO_SEG(0x00014F00000002D8ull))
83#define CVMX_IPD_RED_PORT_ENABLE2 (CVMX_ADD_IO_SEG(0x00014F00000003A8ull)) 67#define CVMX_IPD_RED_PORT_ENABLE2 (CVMX_ADD_IO_SEG(0x00014F00000003A8ull))
84#define CVMX_IPD_RED_QUE0_PARAM CVMX_IPD_RED_QUEX_PARAM(0) 68#define CVMX_IPD_RED_QUE0_PARAM CVMX_IPD_RED_QUEX_PARAM(0)
@@ -90,7 +74,6 @@
90#define CVMX_IPD_RED_QUE6_PARAM CVMX_IPD_RED_QUEX_PARAM(6) 74#define CVMX_IPD_RED_QUE6_PARAM CVMX_IPD_RED_QUEX_PARAM(6)
91#define CVMX_IPD_RED_QUE7_PARAM CVMX_IPD_RED_QUEX_PARAM(7) 75#define CVMX_IPD_RED_QUE7_PARAM CVMX_IPD_RED_QUEX_PARAM(7)
92#define CVMX_IPD_RED_QUEX_PARAM(offset) (CVMX_ADD_IO_SEG(0x00014F00000002E0ull) + ((offset) & 7) * 8) 76#define CVMX_IPD_RED_QUEX_PARAM(offset) (CVMX_ADD_IO_SEG(0x00014F00000002E0ull) + ((offset) & 7) * 8)
93#define CVMX_IPD_REQ_WGT (CVMX_ADD_IO_SEG(0x00014F0000004418ull))
94#define CVMX_IPD_SUB_PORT_BP_PAGE_CNT (CVMX_ADD_IO_SEG(0x00014F0000000148ull)) 77#define CVMX_IPD_SUB_PORT_BP_PAGE_CNT (CVMX_ADD_IO_SEG(0x00014F0000000148ull))
95#define CVMX_IPD_SUB_PORT_FCS (CVMX_ADD_IO_SEG(0x00014F0000000170ull)) 78#define CVMX_IPD_SUB_PORT_FCS (CVMX_ADD_IO_SEG(0x00014F0000000170ull))
96#define CVMX_IPD_SUB_PORT_QOS_CNT (CVMX_ADD_IO_SEG(0x00014F0000000800ull)) 79#define CVMX_IPD_SUB_PORT_QOS_CNT (CVMX_ADD_IO_SEG(0x00014F0000000800ull))
@@ -100,13 +83,8 @@
100union cvmx_ipd_1st_mbuff_skip { 83union cvmx_ipd_1st_mbuff_skip {
101 uint64_t u64; 84 uint64_t u64;
102 struct cvmx_ipd_1st_mbuff_skip_s { 85 struct cvmx_ipd_1st_mbuff_skip_s {
103#ifdef __BIG_ENDIAN_BITFIELD
104 uint64_t reserved_6_63:58; 86 uint64_t reserved_6_63:58;
105 uint64_t skip_sz:6; 87 uint64_t skip_sz:6;
106#else
107 uint64_t skip_sz:6;
108 uint64_t reserved_6_63:58;
109#endif
110 } s; 88 } s;
111 struct cvmx_ipd_1st_mbuff_skip_s cn30xx; 89 struct cvmx_ipd_1st_mbuff_skip_s cn30xx;
112 struct cvmx_ipd_1st_mbuff_skip_s cn31xx; 90 struct cvmx_ipd_1st_mbuff_skip_s cn31xx;
@@ -119,25 +97,15 @@ union cvmx_ipd_1st_mbuff_skip {
119 struct cvmx_ipd_1st_mbuff_skip_s cn56xxp1; 97 struct cvmx_ipd_1st_mbuff_skip_s cn56xxp1;
120 struct cvmx_ipd_1st_mbuff_skip_s cn58xx; 98 struct cvmx_ipd_1st_mbuff_skip_s cn58xx;
121 struct cvmx_ipd_1st_mbuff_skip_s cn58xxp1; 99 struct cvmx_ipd_1st_mbuff_skip_s cn58xxp1;
122 struct cvmx_ipd_1st_mbuff_skip_s cn61xx;
123 struct cvmx_ipd_1st_mbuff_skip_s cn63xx; 100 struct cvmx_ipd_1st_mbuff_skip_s cn63xx;
124 struct cvmx_ipd_1st_mbuff_skip_s cn63xxp1; 101 struct cvmx_ipd_1st_mbuff_skip_s cn63xxp1;
125 struct cvmx_ipd_1st_mbuff_skip_s cn66xx;
126 struct cvmx_ipd_1st_mbuff_skip_s cn68xx;
127 struct cvmx_ipd_1st_mbuff_skip_s cn68xxp1;
128 struct cvmx_ipd_1st_mbuff_skip_s cnf71xx;
129}; 102};
130 103
131union cvmx_ipd_1st_next_ptr_back { 104union cvmx_ipd_1st_next_ptr_back {
132 uint64_t u64; 105 uint64_t u64;
133 struct cvmx_ipd_1st_next_ptr_back_s { 106 struct cvmx_ipd_1st_next_ptr_back_s {
134#ifdef __BIG_ENDIAN_BITFIELD
135 uint64_t reserved_4_63:60; 107 uint64_t reserved_4_63:60;
136 uint64_t back:4; 108 uint64_t back:4;
137#else
138 uint64_t back:4;
139 uint64_t reserved_4_63:60;
140#endif
141 } s; 109 } s;
142 struct cvmx_ipd_1st_next_ptr_back_s cn30xx; 110 struct cvmx_ipd_1st_next_ptr_back_s cn30xx;
143 struct cvmx_ipd_1st_next_ptr_back_s cn31xx; 111 struct cvmx_ipd_1st_next_ptr_back_s cn31xx;
@@ -150,25 +118,15 @@ union cvmx_ipd_1st_next_ptr_back {
150 struct cvmx_ipd_1st_next_ptr_back_s cn56xxp1; 118 struct cvmx_ipd_1st_next_ptr_back_s cn56xxp1;
151 struct cvmx_ipd_1st_next_ptr_back_s cn58xx; 119 struct cvmx_ipd_1st_next_ptr_back_s cn58xx;
152 struct cvmx_ipd_1st_next_ptr_back_s cn58xxp1; 120 struct cvmx_ipd_1st_next_ptr_back_s cn58xxp1;
153 struct cvmx_ipd_1st_next_ptr_back_s cn61xx;
154 struct cvmx_ipd_1st_next_ptr_back_s cn63xx; 121 struct cvmx_ipd_1st_next_ptr_back_s cn63xx;
155 struct cvmx_ipd_1st_next_ptr_back_s cn63xxp1; 122 struct cvmx_ipd_1st_next_ptr_back_s cn63xxp1;
156 struct cvmx_ipd_1st_next_ptr_back_s cn66xx;
157 struct cvmx_ipd_1st_next_ptr_back_s cn68xx;
158 struct cvmx_ipd_1st_next_ptr_back_s cn68xxp1;
159 struct cvmx_ipd_1st_next_ptr_back_s cnf71xx;
160}; 123};
161 124
162union cvmx_ipd_2nd_next_ptr_back { 125union cvmx_ipd_2nd_next_ptr_back {
163 uint64_t u64; 126 uint64_t u64;
164 struct cvmx_ipd_2nd_next_ptr_back_s { 127 struct cvmx_ipd_2nd_next_ptr_back_s {
165#ifdef __BIG_ENDIAN_BITFIELD
166 uint64_t reserved_4_63:60; 128 uint64_t reserved_4_63:60;
167 uint64_t back:4; 129 uint64_t back:4;
168#else
169 uint64_t back:4;
170 uint64_t reserved_4_63:60;
171#endif
172 } s; 130 } s;
173 struct cvmx_ipd_2nd_next_ptr_back_s cn30xx; 131 struct cvmx_ipd_2nd_next_ptr_back_s cn30xx;
174 struct cvmx_ipd_2nd_next_ptr_back_s cn31xx; 132 struct cvmx_ipd_2nd_next_ptr_back_s cn31xx;
@@ -181,25 +139,14 @@ union cvmx_ipd_2nd_next_ptr_back {
181 struct cvmx_ipd_2nd_next_ptr_back_s cn56xxp1; 139 struct cvmx_ipd_2nd_next_ptr_back_s cn56xxp1;
182 struct cvmx_ipd_2nd_next_ptr_back_s cn58xx; 140 struct cvmx_ipd_2nd_next_ptr_back_s cn58xx;
183 struct cvmx_ipd_2nd_next_ptr_back_s cn58xxp1; 141 struct cvmx_ipd_2nd_next_ptr_back_s cn58xxp1;
184 struct cvmx_ipd_2nd_next_ptr_back_s cn61xx;
185 struct cvmx_ipd_2nd_next_ptr_back_s cn63xx; 142 struct cvmx_ipd_2nd_next_ptr_back_s cn63xx;
186 struct cvmx_ipd_2nd_next_ptr_back_s cn63xxp1; 143 struct cvmx_ipd_2nd_next_ptr_back_s cn63xxp1;
187 struct cvmx_ipd_2nd_next_ptr_back_s cn66xx;
188 struct cvmx_ipd_2nd_next_ptr_back_s cn68xx;
189 struct cvmx_ipd_2nd_next_ptr_back_s cn68xxp1;
190 struct cvmx_ipd_2nd_next_ptr_back_s cnf71xx;
191}; 144};
192 145
193union cvmx_ipd_bist_status { 146union cvmx_ipd_bist_status {
194 uint64_t u64; 147 uint64_t u64;
195 struct cvmx_ipd_bist_status_s { 148 struct cvmx_ipd_bist_status_s {
196#ifdef __BIG_ENDIAN_BITFIELD 149 uint64_t reserved_18_63:46;
197 uint64_t reserved_23_63:41;
198 uint64_t iiwo1:1;
199 uint64_t iiwo0:1;
200 uint64_t iio1:1;
201 uint64_t iio0:1;
202 uint64_t pbm4:1;
203 uint64_t csr_mem:1; 150 uint64_t csr_mem:1;
204 uint64_t csr_ncmd:1; 151 uint64_t csr_ncmd:1;
205 uint64_t pwq_wqed:1; 152 uint64_t pwq_wqed:1;
@@ -218,35 +165,8 @@ union cvmx_ipd_bist_status {
218 uint64_t ipd_old:1; 165 uint64_t ipd_old:1;
219 uint64_t ipd_new:1; 166 uint64_t ipd_new:1;
220 uint64_t pwp:1; 167 uint64_t pwp:1;
221#else
222 uint64_t pwp:1;
223 uint64_t ipd_new:1;
224 uint64_t ipd_old:1;
225 uint64_t prc_off:1;
226 uint64_t pwq0:1;
227 uint64_t pwq1:1;
228 uint64_t pbm_word:1;
229 uint64_t pbm0:1;
230 uint64_t pbm1:1;
231 uint64_t pbm2:1;
232 uint64_t pbm3:1;
233 uint64_t ipq_pbe0:1;
234 uint64_t ipq_pbe1:1;
235 uint64_t pwq_pow:1;
236 uint64_t pwq_wp1:1;
237 uint64_t pwq_wqed:1;
238 uint64_t csr_ncmd:1;
239 uint64_t csr_mem:1;
240 uint64_t pbm4:1;
241 uint64_t iio0:1;
242 uint64_t iio1:1;
243 uint64_t iiwo0:1;
244 uint64_t iiwo1:1;
245 uint64_t reserved_23_63:41;
246#endif
247 } s; 168 } s;
248 struct cvmx_ipd_bist_status_cn30xx { 169 struct cvmx_ipd_bist_status_cn30xx {
249#ifdef __BIG_ENDIAN_BITFIELD
250 uint64_t reserved_16_63:48; 170 uint64_t reserved_16_63:48;
251 uint64_t pwq_wqed:1; 171 uint64_t pwq_wqed:1;
252 uint64_t pwq_wp1:1; 172 uint64_t pwq_wp1:1;
@@ -264,180 +184,52 @@ union cvmx_ipd_bist_status {
264 uint64_t ipd_old:1; 184 uint64_t ipd_old:1;
265 uint64_t ipd_new:1; 185 uint64_t ipd_new:1;
266 uint64_t pwp:1; 186 uint64_t pwp:1;
267#else
268 uint64_t pwp:1;
269 uint64_t ipd_new:1;
270 uint64_t ipd_old:1;
271 uint64_t prc_off:1;
272 uint64_t pwq0:1;
273 uint64_t pwq1:1;
274 uint64_t pbm_word:1;
275 uint64_t pbm0:1;
276 uint64_t pbm1:1;
277 uint64_t pbm2:1;
278 uint64_t pbm3:1;
279 uint64_t ipq_pbe0:1;
280 uint64_t ipq_pbe1:1;
281 uint64_t pwq_pow:1;
282 uint64_t pwq_wp1:1;
283 uint64_t pwq_wqed:1;
284 uint64_t reserved_16_63:48;
285#endif
286 } cn30xx; 187 } cn30xx;
287 struct cvmx_ipd_bist_status_cn30xx cn31xx; 188 struct cvmx_ipd_bist_status_cn30xx cn31xx;
288 struct cvmx_ipd_bist_status_cn30xx cn38xx; 189 struct cvmx_ipd_bist_status_cn30xx cn38xx;
289 struct cvmx_ipd_bist_status_cn30xx cn38xxp2; 190 struct cvmx_ipd_bist_status_cn30xx cn38xxp2;
290 struct cvmx_ipd_bist_status_cn30xx cn50xx; 191 struct cvmx_ipd_bist_status_cn30xx cn50xx;
291 struct cvmx_ipd_bist_status_cn52xx { 192 struct cvmx_ipd_bist_status_s cn52xx;
292#ifdef __BIG_ENDIAN_BITFIELD 193 struct cvmx_ipd_bist_status_s cn52xxp1;
293 uint64_t reserved_18_63:46; 194 struct cvmx_ipd_bist_status_s cn56xx;
294 uint64_t csr_mem:1; 195 struct cvmx_ipd_bist_status_s cn56xxp1;
295 uint64_t csr_ncmd:1;
296 uint64_t pwq_wqed:1;
297 uint64_t pwq_wp1:1;
298 uint64_t pwq_pow:1;
299 uint64_t ipq_pbe1:1;
300 uint64_t ipq_pbe0:1;
301 uint64_t pbm3:1;
302 uint64_t pbm2:1;
303 uint64_t pbm1:1;
304 uint64_t pbm0:1;
305 uint64_t pbm_word:1;
306 uint64_t pwq1:1;
307 uint64_t pwq0:1;
308 uint64_t prc_off:1;
309 uint64_t ipd_old:1;
310 uint64_t ipd_new:1;
311 uint64_t pwp:1;
312#else
313 uint64_t pwp:1;
314 uint64_t ipd_new:1;
315 uint64_t ipd_old:1;
316 uint64_t prc_off:1;
317 uint64_t pwq0:1;
318 uint64_t pwq1:1;
319 uint64_t pbm_word:1;
320 uint64_t pbm0:1;
321 uint64_t pbm1:1;
322 uint64_t pbm2:1;
323 uint64_t pbm3:1;
324 uint64_t ipq_pbe0:1;
325 uint64_t ipq_pbe1:1;
326 uint64_t pwq_pow:1;
327 uint64_t pwq_wp1:1;
328 uint64_t pwq_wqed:1;
329 uint64_t csr_ncmd:1;
330 uint64_t csr_mem:1;
331 uint64_t reserved_18_63:46;
332#endif
333 } cn52xx;
334 struct cvmx_ipd_bist_status_cn52xx cn52xxp1;
335 struct cvmx_ipd_bist_status_cn52xx cn56xx;
336 struct cvmx_ipd_bist_status_cn52xx cn56xxp1;
337 struct cvmx_ipd_bist_status_cn30xx cn58xx; 196 struct cvmx_ipd_bist_status_cn30xx cn58xx;
338 struct cvmx_ipd_bist_status_cn30xx cn58xxp1; 197 struct cvmx_ipd_bist_status_cn30xx cn58xxp1;
339 struct cvmx_ipd_bist_status_cn52xx cn61xx; 198 struct cvmx_ipd_bist_status_s cn63xx;
340 struct cvmx_ipd_bist_status_cn52xx cn63xx; 199 struct cvmx_ipd_bist_status_s cn63xxp1;
341 struct cvmx_ipd_bist_status_cn52xx cn63xxp1;
342 struct cvmx_ipd_bist_status_cn52xx cn66xx;
343 struct cvmx_ipd_bist_status_s cn68xx;
344 struct cvmx_ipd_bist_status_s cn68xxp1;
345 struct cvmx_ipd_bist_status_cn52xx cnf71xx;
346}; 200};
347 201
348union cvmx_ipd_bp_prt_red_end { 202union cvmx_ipd_bp_prt_red_end {
349 uint64_t u64; 203 uint64_t u64;
350 struct cvmx_ipd_bp_prt_red_end_s { 204 struct cvmx_ipd_bp_prt_red_end_s {
351#ifdef __BIG_ENDIAN_BITFIELD 205 uint64_t reserved_44_63:20;
352 uint64_t reserved_48_63:16; 206 uint64_t prt_enb:44;
353 uint64_t prt_enb:48;
354#else
355 uint64_t prt_enb:48;
356 uint64_t reserved_48_63:16;
357#endif
358 } s; 207 } s;
359 struct cvmx_ipd_bp_prt_red_end_cn30xx { 208 struct cvmx_ipd_bp_prt_red_end_cn30xx {
360#ifdef __BIG_ENDIAN_BITFIELD
361 uint64_t reserved_36_63:28; 209 uint64_t reserved_36_63:28;
362 uint64_t prt_enb:36; 210 uint64_t prt_enb:36;
363#else
364 uint64_t prt_enb:36;
365 uint64_t reserved_36_63:28;
366#endif
367 } cn30xx; 211 } cn30xx;
368 struct cvmx_ipd_bp_prt_red_end_cn30xx cn31xx; 212 struct cvmx_ipd_bp_prt_red_end_cn30xx cn31xx;
369 struct cvmx_ipd_bp_prt_red_end_cn30xx cn38xx; 213 struct cvmx_ipd_bp_prt_red_end_cn30xx cn38xx;
370 struct cvmx_ipd_bp_prt_red_end_cn30xx cn38xxp2; 214 struct cvmx_ipd_bp_prt_red_end_cn30xx cn38xxp2;
371 struct cvmx_ipd_bp_prt_red_end_cn30xx cn50xx; 215 struct cvmx_ipd_bp_prt_red_end_cn30xx cn50xx;
372 struct cvmx_ipd_bp_prt_red_end_cn52xx { 216 struct cvmx_ipd_bp_prt_red_end_cn52xx {
373#ifdef __BIG_ENDIAN_BITFIELD
374 uint64_t reserved_40_63:24; 217 uint64_t reserved_40_63:24;
375 uint64_t prt_enb:40; 218 uint64_t prt_enb:40;
376#else
377 uint64_t prt_enb:40;
378 uint64_t reserved_40_63:24;
379#endif
380 } cn52xx; 219 } cn52xx;
381 struct cvmx_ipd_bp_prt_red_end_cn52xx cn52xxp1; 220 struct cvmx_ipd_bp_prt_red_end_cn52xx cn52xxp1;
382 struct cvmx_ipd_bp_prt_red_end_cn52xx cn56xx; 221 struct cvmx_ipd_bp_prt_red_end_cn52xx cn56xx;
383 struct cvmx_ipd_bp_prt_red_end_cn52xx cn56xxp1; 222 struct cvmx_ipd_bp_prt_red_end_cn52xx cn56xxp1;
384 struct cvmx_ipd_bp_prt_red_end_cn30xx cn58xx; 223 struct cvmx_ipd_bp_prt_red_end_cn30xx cn58xx;
385 struct cvmx_ipd_bp_prt_red_end_cn30xx cn58xxp1; 224 struct cvmx_ipd_bp_prt_red_end_cn30xx cn58xxp1;
386 struct cvmx_ipd_bp_prt_red_end_s cn61xx; 225 struct cvmx_ipd_bp_prt_red_end_s cn63xx;
387 struct cvmx_ipd_bp_prt_red_end_cn63xx { 226 struct cvmx_ipd_bp_prt_red_end_s cn63xxp1;
388#ifdef __BIG_ENDIAN_BITFIELD
389 uint64_t reserved_44_63:20;
390 uint64_t prt_enb:44;
391#else
392 uint64_t prt_enb:44;
393 uint64_t reserved_44_63:20;
394#endif
395 } cn63xx;
396 struct cvmx_ipd_bp_prt_red_end_cn63xx cn63xxp1;
397 struct cvmx_ipd_bp_prt_red_end_s cn66xx;
398 struct cvmx_ipd_bp_prt_red_end_s cnf71xx;
399};
400
401union cvmx_ipd_bpidx_mbuf_th {
402 uint64_t u64;
403 struct cvmx_ipd_bpidx_mbuf_th_s {
404#ifdef __BIG_ENDIAN_BITFIELD
405 uint64_t reserved_18_63:46;
406 uint64_t bp_enb:1;
407 uint64_t page_cnt:17;
408#else
409 uint64_t page_cnt:17;
410 uint64_t bp_enb:1;
411 uint64_t reserved_18_63:46;
412#endif
413 } s;
414 struct cvmx_ipd_bpidx_mbuf_th_s cn68xx;
415 struct cvmx_ipd_bpidx_mbuf_th_s cn68xxp1;
416};
417
418union cvmx_ipd_bpid_bp_counterx {
419 uint64_t u64;
420 struct cvmx_ipd_bpid_bp_counterx_s {
421#ifdef __BIG_ENDIAN_BITFIELD
422 uint64_t reserved_25_63:39;
423 uint64_t cnt_val:25;
424#else
425 uint64_t cnt_val:25;
426 uint64_t reserved_25_63:39;
427#endif
428 } s;
429 struct cvmx_ipd_bpid_bp_counterx_s cn68xx;
430 struct cvmx_ipd_bpid_bp_counterx_s cn68xxp1;
431}; 227};
432 228
433union cvmx_ipd_clk_count { 229union cvmx_ipd_clk_count {
434 uint64_t u64; 230 uint64_t u64;
435 struct cvmx_ipd_clk_count_s { 231 struct cvmx_ipd_clk_count_s {
436#ifdef __BIG_ENDIAN_BITFIELD
437 uint64_t clk_cnt:64; 232 uint64_t clk_cnt:64;
438#else
439 uint64_t clk_cnt:64;
440#endif
441 } s; 233 } s;
442 struct cvmx_ipd_clk_count_s cn30xx; 234 struct cvmx_ipd_clk_count_s cn30xx;
443 struct cvmx_ipd_clk_count_s cn31xx; 235 struct cvmx_ipd_clk_count_s cn31xx;
@@ -450,36 +242,13 @@ union cvmx_ipd_clk_count {
450 struct cvmx_ipd_clk_count_s cn56xxp1; 242 struct cvmx_ipd_clk_count_s cn56xxp1;
451 struct cvmx_ipd_clk_count_s cn58xx; 243 struct cvmx_ipd_clk_count_s cn58xx;
452 struct cvmx_ipd_clk_count_s cn58xxp1; 244 struct cvmx_ipd_clk_count_s cn58xxp1;
453 struct cvmx_ipd_clk_count_s cn61xx;
454 struct cvmx_ipd_clk_count_s cn63xx; 245 struct cvmx_ipd_clk_count_s cn63xx;
455 struct cvmx_ipd_clk_count_s cn63xxp1; 246 struct cvmx_ipd_clk_count_s cn63xxp1;
456 struct cvmx_ipd_clk_count_s cn66xx;
457 struct cvmx_ipd_clk_count_s cn68xx;
458 struct cvmx_ipd_clk_count_s cn68xxp1;
459 struct cvmx_ipd_clk_count_s cnf71xx;
460};
461
462union cvmx_ipd_credits {
463 uint64_t u64;
464 struct cvmx_ipd_credits_s {
465#ifdef __BIG_ENDIAN_BITFIELD
466 uint64_t reserved_16_63:48;
467 uint64_t iob_wrc:8;
468 uint64_t iob_wr:8;
469#else
470 uint64_t iob_wr:8;
471 uint64_t iob_wrc:8;
472 uint64_t reserved_16_63:48;
473#endif
474 } s;
475 struct cvmx_ipd_credits_s cn68xx;
476 struct cvmx_ipd_credits_s cn68xxp1;
477}; 247};
478 248
479union cvmx_ipd_ctl_status { 249union cvmx_ipd_ctl_status {
480 uint64_t u64; 250 uint64_t u64;
481 struct cvmx_ipd_ctl_status_s { 251 struct cvmx_ipd_ctl_status_s {
482#ifdef __BIG_ENDIAN_BITFIELD
483 uint64_t reserved_18_63:46; 252 uint64_t reserved_18_63:46;
484 uint64_t use_sop:1; 253 uint64_t use_sop:1;
485 uint64_t rst_done:1; 254 uint64_t rst_done:1;
@@ -498,29 +267,8 @@ union cvmx_ipd_ctl_status {
498 uint64_t pbp_en:1; 267 uint64_t pbp_en:1;
499 uint64_t opc_mode:2; 268 uint64_t opc_mode:2;
500 uint64_t ipd_en:1; 269 uint64_t ipd_en:1;
501#else
502 uint64_t ipd_en:1;
503 uint64_t opc_mode:2;
504 uint64_t pbp_en:1;
505 uint64_t wqe_lend:1;
506 uint64_t pkt_lend:1;
507 uint64_t naddbuf:1;
508 uint64_t addpkt:1;
509 uint64_t reset:1;
510 uint64_t len_m8:1;
511 uint64_t pkt_off:1;
512 uint64_t ipd_full:1;
513 uint64_t pq_nabuf:1;
514 uint64_t pq_apkt:1;
515 uint64_t no_wptr:1;
516 uint64_t clken:1;
517 uint64_t rst_done:1;
518 uint64_t use_sop:1;
519 uint64_t reserved_18_63:46;
520#endif
521 } s; 270 } s;
522 struct cvmx_ipd_ctl_status_cn30xx { 271 struct cvmx_ipd_ctl_status_cn30xx {
523#ifdef __BIG_ENDIAN_BITFIELD
524 uint64_t reserved_10_63:54; 272 uint64_t reserved_10_63:54;
525 uint64_t len_m8:1; 273 uint64_t len_m8:1;
526 uint64_t reset:1; 274 uint64_t reset:1;
@@ -531,23 +279,10 @@ union cvmx_ipd_ctl_status {
531 uint64_t pbp_en:1; 279 uint64_t pbp_en:1;
532 uint64_t opc_mode:2; 280 uint64_t opc_mode:2;
533 uint64_t ipd_en:1; 281 uint64_t ipd_en:1;
534#else
535 uint64_t ipd_en:1;
536 uint64_t opc_mode:2;
537 uint64_t pbp_en:1;
538 uint64_t wqe_lend:1;
539 uint64_t pkt_lend:1;
540 uint64_t naddbuf:1;
541 uint64_t addpkt:1;
542 uint64_t reset:1;
543 uint64_t len_m8:1;
544 uint64_t reserved_10_63:54;
545#endif
546 } cn30xx; 282 } cn30xx;
547 struct cvmx_ipd_ctl_status_cn30xx cn31xx; 283 struct cvmx_ipd_ctl_status_cn30xx cn31xx;
548 struct cvmx_ipd_ctl_status_cn30xx cn38xx; 284 struct cvmx_ipd_ctl_status_cn30xx cn38xx;
549 struct cvmx_ipd_ctl_status_cn38xxp2 { 285 struct cvmx_ipd_ctl_status_cn38xxp2 {
550#ifdef __BIG_ENDIAN_BITFIELD
551 uint64_t reserved_9_63:55; 286 uint64_t reserved_9_63:55;
552 uint64_t reset:1; 287 uint64_t reset:1;
553 uint64_t addpkt:1; 288 uint64_t addpkt:1;
@@ -557,20 +292,8 @@ union cvmx_ipd_ctl_status {
557 uint64_t pbp_en:1; 292 uint64_t pbp_en:1;
558 uint64_t opc_mode:2; 293 uint64_t opc_mode:2;
559 uint64_t ipd_en:1; 294 uint64_t ipd_en:1;
560#else
561 uint64_t ipd_en:1;
562 uint64_t opc_mode:2;
563 uint64_t pbp_en:1;
564 uint64_t wqe_lend:1;
565 uint64_t pkt_lend:1;
566 uint64_t naddbuf:1;
567 uint64_t addpkt:1;
568 uint64_t reset:1;
569 uint64_t reserved_9_63:55;
570#endif
571 } cn38xxp2; 295 } cn38xxp2;
572 struct cvmx_ipd_ctl_status_cn50xx { 296 struct cvmx_ipd_ctl_status_cn50xx {
573#ifdef __BIG_ENDIAN_BITFIELD
574 uint64_t reserved_15_63:49; 297 uint64_t reserved_15_63:49;
575 uint64_t no_wptr:1; 298 uint64_t no_wptr:1;
576 uint64_t pq_apkt:1; 299 uint64_t pq_apkt:1;
@@ -586,30 +309,12 @@ union cvmx_ipd_ctl_status {
586 uint64_t pbp_en:1; 309 uint64_t pbp_en:1;
587 uint64_t opc_mode:2; 310 uint64_t opc_mode:2;
588 uint64_t ipd_en:1; 311 uint64_t ipd_en:1;
589#else
590 uint64_t ipd_en:1;
591 uint64_t opc_mode:2;
592 uint64_t pbp_en:1;
593 uint64_t wqe_lend:1;
594 uint64_t pkt_lend:1;
595 uint64_t naddbuf:1;
596 uint64_t addpkt:1;
597 uint64_t reset:1;
598 uint64_t len_m8:1;
599 uint64_t pkt_off:1;
600 uint64_t ipd_full:1;
601 uint64_t pq_nabuf:1;
602 uint64_t pq_apkt:1;
603 uint64_t no_wptr:1;
604 uint64_t reserved_15_63:49;
605#endif
606 } cn50xx; 312 } cn50xx;
607 struct cvmx_ipd_ctl_status_cn50xx cn52xx; 313 struct cvmx_ipd_ctl_status_cn50xx cn52xx;
608 struct cvmx_ipd_ctl_status_cn50xx cn52xxp1; 314 struct cvmx_ipd_ctl_status_cn50xx cn52xxp1;
609 struct cvmx_ipd_ctl_status_cn50xx cn56xx; 315 struct cvmx_ipd_ctl_status_cn50xx cn56xx;
610 struct cvmx_ipd_ctl_status_cn50xx cn56xxp1; 316 struct cvmx_ipd_ctl_status_cn50xx cn56xxp1;
611 struct cvmx_ipd_ctl_status_cn58xx { 317 struct cvmx_ipd_ctl_status_cn58xx {
612#ifdef __BIG_ENDIAN_BITFIELD
613 uint64_t reserved_12_63:52; 318 uint64_t reserved_12_63:52;
614 uint64_t ipd_full:1; 319 uint64_t ipd_full:1;
615 uint64_t pkt_off:1; 320 uint64_t pkt_off:1;
@@ -622,26 +327,10 @@ union cvmx_ipd_ctl_status {
622 uint64_t pbp_en:1; 327 uint64_t pbp_en:1;
623 uint64_t opc_mode:2; 328 uint64_t opc_mode:2;
624 uint64_t ipd_en:1; 329 uint64_t ipd_en:1;
625#else
626 uint64_t ipd_en:1;
627 uint64_t opc_mode:2;
628 uint64_t pbp_en:1;
629 uint64_t wqe_lend:1;
630 uint64_t pkt_lend:1;
631 uint64_t naddbuf:1;
632 uint64_t addpkt:1;
633 uint64_t reset:1;
634 uint64_t len_m8:1;
635 uint64_t pkt_off:1;
636 uint64_t ipd_full:1;
637 uint64_t reserved_12_63:52;
638#endif
639 } cn58xx; 330 } cn58xx;
640 struct cvmx_ipd_ctl_status_cn58xx cn58xxp1; 331 struct cvmx_ipd_ctl_status_cn58xx cn58xxp1;
641 struct cvmx_ipd_ctl_status_s cn61xx;
642 struct cvmx_ipd_ctl_status_s cn63xx; 332 struct cvmx_ipd_ctl_status_s cn63xx;
643 struct cvmx_ipd_ctl_status_cn63xxp1 { 333 struct cvmx_ipd_ctl_status_cn63xxp1 {
644#ifdef __BIG_ENDIAN_BITFIELD
645 uint64_t reserved_16_63:48; 334 uint64_t reserved_16_63:48;
646 uint64_t clken:1; 335 uint64_t clken:1;
647 uint64_t no_wptr:1; 336 uint64_t no_wptr:1;
@@ -658,129 +347,13 @@ union cvmx_ipd_ctl_status {
658 uint64_t pbp_en:1; 347 uint64_t pbp_en:1;
659 uint64_t opc_mode:2; 348 uint64_t opc_mode:2;
660 uint64_t ipd_en:1; 349 uint64_t ipd_en:1;
661#else
662 uint64_t ipd_en:1;
663 uint64_t opc_mode:2;
664 uint64_t pbp_en:1;
665 uint64_t wqe_lend:1;
666 uint64_t pkt_lend:1;
667 uint64_t naddbuf:1;
668 uint64_t addpkt:1;
669 uint64_t reset:1;
670 uint64_t len_m8:1;
671 uint64_t pkt_off:1;
672 uint64_t ipd_full:1;
673 uint64_t pq_nabuf:1;
674 uint64_t pq_apkt:1;
675 uint64_t no_wptr:1;
676 uint64_t clken:1;
677 uint64_t reserved_16_63:48;
678#endif
679 } cn63xxp1; 350 } cn63xxp1;
680 struct cvmx_ipd_ctl_status_s cn66xx;
681 struct cvmx_ipd_ctl_status_s cn68xx;
682 struct cvmx_ipd_ctl_status_s cn68xxp1;
683 struct cvmx_ipd_ctl_status_s cnf71xx;
684};
685
686union cvmx_ipd_ecc_ctl {
687 uint64_t u64;
688 struct cvmx_ipd_ecc_ctl_s {
689#ifdef __BIG_ENDIAN_BITFIELD
690 uint64_t reserved_8_63:56;
691 uint64_t pm3_syn:2;
692 uint64_t pm2_syn:2;
693 uint64_t pm1_syn:2;
694 uint64_t pm0_syn:2;
695#else
696 uint64_t pm0_syn:2;
697 uint64_t pm1_syn:2;
698 uint64_t pm2_syn:2;
699 uint64_t pm3_syn:2;
700 uint64_t reserved_8_63:56;
701#endif
702 } s;
703 struct cvmx_ipd_ecc_ctl_s cn68xx;
704 struct cvmx_ipd_ecc_ctl_s cn68xxp1;
705};
706
707union cvmx_ipd_free_ptr_fifo_ctl {
708 uint64_t u64;
709 struct cvmx_ipd_free_ptr_fifo_ctl_s {
710#ifdef __BIG_ENDIAN_BITFIELD
711 uint64_t reserved_32_63:32;
712 uint64_t max_cnts:7;
713 uint64_t wraddr:8;
714 uint64_t praddr:8;
715 uint64_t cena:1;
716 uint64_t raddr:8;
717#else
718 uint64_t raddr:8;
719 uint64_t cena:1;
720 uint64_t praddr:8;
721 uint64_t wraddr:8;
722 uint64_t max_cnts:7;
723 uint64_t reserved_32_63:32;
724#endif
725 } s;
726 struct cvmx_ipd_free_ptr_fifo_ctl_s cn68xx;
727 struct cvmx_ipd_free_ptr_fifo_ctl_s cn68xxp1;
728};
729
730union cvmx_ipd_free_ptr_value {
731 uint64_t u64;
732 struct cvmx_ipd_free_ptr_value_s {
733#ifdef __BIG_ENDIAN_BITFIELD
734 uint64_t reserved_33_63:31;
735 uint64_t ptr:33;
736#else
737 uint64_t ptr:33;
738 uint64_t reserved_33_63:31;
739#endif
740 } s;
741 struct cvmx_ipd_free_ptr_value_s cn68xx;
742 struct cvmx_ipd_free_ptr_value_s cn68xxp1;
743};
744
745union cvmx_ipd_hold_ptr_fifo_ctl {
746 uint64_t u64;
747 struct cvmx_ipd_hold_ptr_fifo_ctl_s {
748#ifdef __BIG_ENDIAN_BITFIELD
749 uint64_t reserved_43_63:21;
750 uint64_t ptr:33;
751 uint64_t max_pkt:3;
752 uint64_t praddr:3;
753 uint64_t cena:1;
754 uint64_t raddr:3;
755#else
756 uint64_t raddr:3;
757 uint64_t cena:1;
758 uint64_t praddr:3;
759 uint64_t max_pkt:3;
760 uint64_t ptr:33;
761 uint64_t reserved_43_63:21;
762#endif
763 } s;
764 struct cvmx_ipd_hold_ptr_fifo_ctl_s cn68xx;
765 struct cvmx_ipd_hold_ptr_fifo_ctl_s cn68xxp1;
766}; 351};
767 352
768union cvmx_ipd_int_enb { 353union cvmx_ipd_int_enb {
769 uint64_t u64; 354 uint64_t u64;
770 struct cvmx_ipd_int_enb_s { 355 struct cvmx_ipd_int_enb_s {
771#ifdef __BIG_ENDIAN_BITFIELD 356 uint64_t reserved_12_63:52;
772 uint64_t reserved_23_63:41;
773 uint64_t pw3_dbe:1;
774 uint64_t pw3_sbe:1;
775 uint64_t pw2_dbe:1;
776 uint64_t pw2_sbe:1;
777 uint64_t pw1_dbe:1;
778 uint64_t pw1_sbe:1;
779 uint64_t pw0_dbe:1;
780 uint64_t pw0_sbe:1;
781 uint64_t dat:1;
782 uint64_t eop:1;
783 uint64_t sop:1;
784 uint64_t pq_sub:1; 357 uint64_t pq_sub:1;
785 uint64_t pq_add:1; 358 uint64_t pq_add:1;
786 uint64_t bc_ovr:1; 359 uint64_t bc_ovr:1;
@@ -793,53 +366,17 @@ union cvmx_ipd_int_enb {
793 uint64_t prc_par2:1; 366 uint64_t prc_par2:1;
794 uint64_t prc_par1:1; 367 uint64_t prc_par1:1;
795 uint64_t prc_par0:1; 368 uint64_t prc_par0:1;
796#else
797 uint64_t prc_par0:1;
798 uint64_t prc_par1:1;
799 uint64_t prc_par2:1;
800 uint64_t prc_par3:1;
801 uint64_t bp_sub:1;
802 uint64_t dc_ovr:1;
803 uint64_t cc_ovr:1;
804 uint64_t c_coll:1;
805 uint64_t d_coll:1;
806 uint64_t bc_ovr:1;
807 uint64_t pq_add:1;
808 uint64_t pq_sub:1;
809 uint64_t sop:1;
810 uint64_t eop:1;
811 uint64_t dat:1;
812 uint64_t pw0_sbe:1;
813 uint64_t pw0_dbe:1;
814 uint64_t pw1_sbe:1;
815 uint64_t pw1_dbe:1;
816 uint64_t pw2_sbe:1;
817 uint64_t pw2_dbe:1;
818 uint64_t pw3_sbe:1;
819 uint64_t pw3_dbe:1;
820 uint64_t reserved_23_63:41;
821#endif
822 } s; 369 } s;
823 struct cvmx_ipd_int_enb_cn30xx { 370 struct cvmx_ipd_int_enb_cn30xx {
824#ifdef __BIG_ENDIAN_BITFIELD
825 uint64_t reserved_5_63:59; 371 uint64_t reserved_5_63:59;
826 uint64_t bp_sub:1; 372 uint64_t bp_sub:1;
827 uint64_t prc_par3:1; 373 uint64_t prc_par3:1;
828 uint64_t prc_par2:1; 374 uint64_t prc_par2:1;
829 uint64_t prc_par1:1; 375 uint64_t prc_par1:1;
830 uint64_t prc_par0:1; 376 uint64_t prc_par0:1;
831#else
832 uint64_t prc_par0:1;
833 uint64_t prc_par1:1;
834 uint64_t prc_par2:1;
835 uint64_t prc_par3:1;
836 uint64_t bp_sub:1;
837 uint64_t reserved_5_63:59;
838#endif
839 } cn30xx; 377 } cn30xx;
840 struct cvmx_ipd_int_enb_cn30xx cn31xx; 378 struct cvmx_ipd_int_enb_cn30xx cn31xx;
841 struct cvmx_ipd_int_enb_cn38xx { 379 struct cvmx_ipd_int_enb_cn38xx {
842#ifdef __BIG_ENDIAN_BITFIELD
843 uint64_t reserved_10_63:54; 380 uint64_t reserved_10_63:54;
844 uint64_t bc_ovr:1; 381 uint64_t bc_ovr:1;
845 uint64_t d_coll:1; 382 uint64_t d_coll:1;
@@ -851,83 +388,23 @@ union cvmx_ipd_int_enb {
851 uint64_t prc_par2:1; 388 uint64_t prc_par2:1;
852 uint64_t prc_par1:1; 389 uint64_t prc_par1:1;
853 uint64_t prc_par0:1; 390 uint64_t prc_par0:1;
854#else
855 uint64_t prc_par0:1;
856 uint64_t prc_par1:1;
857 uint64_t prc_par2:1;
858 uint64_t prc_par3:1;
859 uint64_t bp_sub:1;
860 uint64_t dc_ovr:1;
861 uint64_t cc_ovr:1;
862 uint64_t c_coll:1;
863 uint64_t d_coll:1;
864 uint64_t bc_ovr:1;
865 uint64_t reserved_10_63:54;
866#endif
867 } cn38xx; 391 } cn38xx;
868 struct cvmx_ipd_int_enb_cn30xx cn38xxp2; 392 struct cvmx_ipd_int_enb_cn30xx cn38xxp2;
869 struct cvmx_ipd_int_enb_cn38xx cn50xx; 393 struct cvmx_ipd_int_enb_cn38xx cn50xx;
870 struct cvmx_ipd_int_enb_cn52xx { 394 struct cvmx_ipd_int_enb_s cn52xx;
871#ifdef __BIG_ENDIAN_BITFIELD 395 struct cvmx_ipd_int_enb_s cn52xxp1;
872 uint64_t reserved_12_63:52; 396 struct cvmx_ipd_int_enb_s cn56xx;
873 uint64_t pq_sub:1; 397 struct cvmx_ipd_int_enb_s cn56xxp1;
874 uint64_t pq_add:1;
875 uint64_t bc_ovr:1;
876 uint64_t d_coll:1;
877 uint64_t c_coll:1;
878 uint64_t cc_ovr:1;
879 uint64_t dc_ovr:1;
880 uint64_t bp_sub:1;
881 uint64_t prc_par3:1;
882 uint64_t prc_par2:1;
883 uint64_t prc_par1:1;
884 uint64_t prc_par0:1;
885#else
886 uint64_t prc_par0:1;
887 uint64_t prc_par1:1;
888 uint64_t prc_par2:1;
889 uint64_t prc_par3:1;
890 uint64_t bp_sub:1;
891 uint64_t dc_ovr:1;
892 uint64_t cc_ovr:1;
893 uint64_t c_coll:1;
894 uint64_t d_coll:1;
895 uint64_t bc_ovr:1;
896 uint64_t pq_add:1;
897 uint64_t pq_sub:1;
898 uint64_t reserved_12_63:52;
899#endif
900 } cn52xx;
901 struct cvmx_ipd_int_enb_cn52xx cn52xxp1;
902 struct cvmx_ipd_int_enb_cn52xx cn56xx;
903 struct cvmx_ipd_int_enb_cn52xx cn56xxp1;
904 struct cvmx_ipd_int_enb_cn38xx cn58xx; 398 struct cvmx_ipd_int_enb_cn38xx cn58xx;
905 struct cvmx_ipd_int_enb_cn38xx cn58xxp1; 399 struct cvmx_ipd_int_enb_cn38xx cn58xxp1;
906 struct cvmx_ipd_int_enb_cn52xx cn61xx; 400 struct cvmx_ipd_int_enb_s cn63xx;
907 struct cvmx_ipd_int_enb_cn52xx cn63xx; 401 struct cvmx_ipd_int_enb_s cn63xxp1;
908 struct cvmx_ipd_int_enb_cn52xx cn63xxp1;
909 struct cvmx_ipd_int_enb_cn52xx cn66xx;
910 struct cvmx_ipd_int_enb_s cn68xx;
911 struct cvmx_ipd_int_enb_s cn68xxp1;
912 struct cvmx_ipd_int_enb_cn52xx cnf71xx;
913}; 402};
914 403
915union cvmx_ipd_int_sum { 404union cvmx_ipd_int_sum {
916 uint64_t u64; 405 uint64_t u64;
917 struct cvmx_ipd_int_sum_s { 406 struct cvmx_ipd_int_sum_s {
918#ifdef __BIG_ENDIAN_BITFIELD 407 uint64_t reserved_12_63:52;
919 uint64_t reserved_23_63:41;
920 uint64_t pw3_dbe:1;
921 uint64_t pw3_sbe:1;
922 uint64_t pw2_dbe:1;
923 uint64_t pw2_sbe:1;
924 uint64_t pw1_dbe:1;
925 uint64_t pw1_sbe:1;
926 uint64_t pw0_dbe:1;
927 uint64_t pw0_sbe:1;
928 uint64_t dat:1;
929 uint64_t eop:1;
930 uint64_t sop:1;
931 uint64_t pq_sub:1; 408 uint64_t pq_sub:1;
932 uint64_t pq_add:1; 409 uint64_t pq_add:1;
933 uint64_t bc_ovr:1; 410 uint64_t bc_ovr:1;
@@ -940,53 +417,17 @@ union cvmx_ipd_int_sum {
940 uint64_t prc_par2:1; 417 uint64_t prc_par2:1;
941 uint64_t prc_par1:1; 418 uint64_t prc_par1:1;
942 uint64_t prc_par0:1; 419 uint64_t prc_par0:1;
943#else
944 uint64_t prc_par0:1;
945 uint64_t prc_par1:1;
946 uint64_t prc_par2:1;
947 uint64_t prc_par3:1;
948 uint64_t bp_sub:1;
949 uint64_t dc_ovr:1;
950 uint64_t cc_ovr:1;
951 uint64_t c_coll:1;
952 uint64_t d_coll:1;
953 uint64_t bc_ovr:1;
954 uint64_t pq_add:1;
955 uint64_t pq_sub:1;
956 uint64_t sop:1;
957 uint64_t eop:1;
958 uint64_t dat:1;
959 uint64_t pw0_sbe:1;
960 uint64_t pw0_dbe:1;
961 uint64_t pw1_sbe:1;
962 uint64_t pw1_dbe:1;
963 uint64_t pw2_sbe:1;
964 uint64_t pw2_dbe:1;
965 uint64_t pw3_sbe:1;
966 uint64_t pw3_dbe:1;
967 uint64_t reserved_23_63:41;
968#endif
969 } s; 420 } s;
970 struct cvmx_ipd_int_sum_cn30xx { 421 struct cvmx_ipd_int_sum_cn30xx {
971#ifdef __BIG_ENDIAN_BITFIELD
972 uint64_t reserved_5_63:59; 422 uint64_t reserved_5_63:59;
973 uint64_t bp_sub:1; 423 uint64_t bp_sub:1;
974 uint64_t prc_par3:1; 424 uint64_t prc_par3:1;
975 uint64_t prc_par2:1; 425 uint64_t prc_par2:1;
976 uint64_t prc_par1:1; 426 uint64_t prc_par1:1;
977 uint64_t prc_par0:1; 427 uint64_t prc_par0:1;
978#else
979 uint64_t prc_par0:1;
980 uint64_t prc_par1:1;
981 uint64_t prc_par2:1;
982 uint64_t prc_par3:1;
983 uint64_t bp_sub:1;
984 uint64_t reserved_5_63:59;
985#endif
986 } cn30xx; 428 } cn30xx;
987 struct cvmx_ipd_int_sum_cn30xx cn31xx; 429 struct cvmx_ipd_int_sum_cn30xx cn31xx;
988 struct cvmx_ipd_int_sum_cn38xx { 430 struct cvmx_ipd_int_sum_cn38xx {
989#ifdef __BIG_ENDIAN_BITFIELD
990 uint64_t reserved_10_63:54; 431 uint64_t reserved_10_63:54;
991 uint64_t bc_ovr:1; 432 uint64_t bc_ovr:1;
992 uint64_t d_coll:1; 433 uint64_t d_coll:1;
@@ -998,107 +439,24 @@ union cvmx_ipd_int_sum {
998 uint64_t prc_par2:1; 439 uint64_t prc_par2:1;
999 uint64_t prc_par1:1; 440 uint64_t prc_par1:1;
1000 uint64_t prc_par0:1; 441 uint64_t prc_par0:1;
1001#else
1002 uint64_t prc_par0:1;
1003 uint64_t prc_par1:1;
1004 uint64_t prc_par2:1;
1005 uint64_t prc_par3:1;
1006 uint64_t bp_sub:1;
1007 uint64_t dc_ovr:1;
1008 uint64_t cc_ovr:1;
1009 uint64_t c_coll:1;
1010 uint64_t d_coll:1;
1011 uint64_t bc_ovr:1;
1012 uint64_t reserved_10_63:54;
1013#endif
1014 } cn38xx; 442 } cn38xx;
1015 struct cvmx_ipd_int_sum_cn30xx cn38xxp2; 443 struct cvmx_ipd_int_sum_cn30xx cn38xxp2;
1016 struct cvmx_ipd_int_sum_cn38xx cn50xx; 444 struct cvmx_ipd_int_sum_cn38xx cn50xx;
1017 struct cvmx_ipd_int_sum_cn52xx { 445 struct cvmx_ipd_int_sum_s cn52xx;
1018#ifdef __BIG_ENDIAN_BITFIELD 446 struct cvmx_ipd_int_sum_s cn52xxp1;
1019 uint64_t reserved_12_63:52; 447 struct cvmx_ipd_int_sum_s cn56xx;
1020 uint64_t pq_sub:1; 448 struct cvmx_ipd_int_sum_s cn56xxp1;
1021 uint64_t pq_add:1;
1022 uint64_t bc_ovr:1;
1023 uint64_t d_coll:1;
1024 uint64_t c_coll:1;
1025 uint64_t cc_ovr:1;
1026 uint64_t dc_ovr:1;
1027 uint64_t bp_sub:1;
1028 uint64_t prc_par3:1;
1029 uint64_t prc_par2:1;
1030 uint64_t prc_par1:1;
1031 uint64_t prc_par0:1;
1032#else
1033 uint64_t prc_par0:1;
1034 uint64_t prc_par1:1;
1035 uint64_t prc_par2:1;
1036 uint64_t prc_par3:1;
1037 uint64_t bp_sub:1;
1038 uint64_t dc_ovr:1;
1039 uint64_t cc_ovr:1;
1040 uint64_t c_coll:1;
1041 uint64_t d_coll:1;
1042 uint64_t bc_ovr:1;
1043 uint64_t pq_add:1;
1044 uint64_t pq_sub:1;
1045 uint64_t reserved_12_63:52;
1046#endif
1047 } cn52xx;
1048 struct cvmx_ipd_int_sum_cn52xx cn52xxp1;
1049 struct cvmx_ipd_int_sum_cn52xx cn56xx;
1050 struct cvmx_ipd_int_sum_cn52xx cn56xxp1;
1051 struct cvmx_ipd_int_sum_cn38xx cn58xx; 449 struct cvmx_ipd_int_sum_cn38xx cn58xx;
1052 struct cvmx_ipd_int_sum_cn38xx cn58xxp1; 450 struct cvmx_ipd_int_sum_cn38xx cn58xxp1;
1053 struct cvmx_ipd_int_sum_cn52xx cn61xx; 451 struct cvmx_ipd_int_sum_s cn63xx;
1054 struct cvmx_ipd_int_sum_cn52xx cn63xx; 452 struct cvmx_ipd_int_sum_s cn63xxp1;
1055 struct cvmx_ipd_int_sum_cn52xx cn63xxp1;
1056 struct cvmx_ipd_int_sum_cn52xx cn66xx;
1057 struct cvmx_ipd_int_sum_s cn68xx;
1058 struct cvmx_ipd_int_sum_s cn68xxp1;
1059 struct cvmx_ipd_int_sum_cn52xx cnf71xx;
1060};
1061
1062union cvmx_ipd_next_pkt_ptr {
1063 uint64_t u64;
1064 struct cvmx_ipd_next_pkt_ptr_s {
1065#ifdef __BIG_ENDIAN_BITFIELD
1066 uint64_t reserved_33_63:31;
1067 uint64_t ptr:33;
1068#else
1069 uint64_t ptr:33;
1070 uint64_t reserved_33_63:31;
1071#endif
1072 } s;
1073 struct cvmx_ipd_next_pkt_ptr_s cn68xx;
1074 struct cvmx_ipd_next_pkt_ptr_s cn68xxp1;
1075};
1076
1077union cvmx_ipd_next_wqe_ptr {
1078 uint64_t u64;
1079 struct cvmx_ipd_next_wqe_ptr_s {
1080#ifdef __BIG_ENDIAN_BITFIELD
1081 uint64_t reserved_33_63:31;
1082 uint64_t ptr:33;
1083#else
1084 uint64_t ptr:33;
1085 uint64_t reserved_33_63:31;
1086#endif
1087 } s;
1088 struct cvmx_ipd_next_wqe_ptr_s cn68xx;
1089 struct cvmx_ipd_next_wqe_ptr_s cn68xxp1;
1090}; 453};
1091 454
1092union cvmx_ipd_not_1st_mbuff_skip { 455union cvmx_ipd_not_1st_mbuff_skip {
1093 uint64_t u64; 456 uint64_t u64;
1094 struct cvmx_ipd_not_1st_mbuff_skip_s { 457 struct cvmx_ipd_not_1st_mbuff_skip_s {
1095#ifdef __BIG_ENDIAN_BITFIELD
1096 uint64_t reserved_6_63:58; 458 uint64_t reserved_6_63:58;
1097 uint64_t skip_sz:6; 459 uint64_t skip_sz:6;
1098#else
1099 uint64_t skip_sz:6;
1100 uint64_t reserved_6_63:58;
1101#endif
1102 } s; 460 } s;
1103 struct cvmx_ipd_not_1st_mbuff_skip_s cn30xx; 461 struct cvmx_ipd_not_1st_mbuff_skip_s cn30xx;
1104 struct cvmx_ipd_not_1st_mbuff_skip_s cn31xx; 462 struct cvmx_ipd_not_1st_mbuff_skip_s cn31xx;
@@ -1111,38 +469,15 @@ union cvmx_ipd_not_1st_mbuff_skip {
1111 struct cvmx_ipd_not_1st_mbuff_skip_s cn56xxp1; 469 struct cvmx_ipd_not_1st_mbuff_skip_s cn56xxp1;
1112 struct cvmx_ipd_not_1st_mbuff_skip_s cn58xx; 470 struct cvmx_ipd_not_1st_mbuff_skip_s cn58xx;
1113 struct cvmx_ipd_not_1st_mbuff_skip_s cn58xxp1; 471 struct cvmx_ipd_not_1st_mbuff_skip_s cn58xxp1;
1114 struct cvmx_ipd_not_1st_mbuff_skip_s cn61xx;
1115 struct cvmx_ipd_not_1st_mbuff_skip_s cn63xx; 472 struct cvmx_ipd_not_1st_mbuff_skip_s cn63xx;
1116 struct cvmx_ipd_not_1st_mbuff_skip_s cn63xxp1; 473 struct cvmx_ipd_not_1st_mbuff_skip_s cn63xxp1;
1117 struct cvmx_ipd_not_1st_mbuff_skip_s cn66xx;
1118 struct cvmx_ipd_not_1st_mbuff_skip_s cn68xx;
1119 struct cvmx_ipd_not_1st_mbuff_skip_s cn68xxp1;
1120 struct cvmx_ipd_not_1st_mbuff_skip_s cnf71xx;
1121};
1122
1123union cvmx_ipd_on_bp_drop_pktx {
1124 uint64_t u64;
1125 struct cvmx_ipd_on_bp_drop_pktx_s {
1126#ifdef __BIG_ENDIAN_BITFIELD
1127 uint64_t prt_enb:64;
1128#else
1129 uint64_t prt_enb:64;
1130#endif
1131 } s;
1132 struct cvmx_ipd_on_bp_drop_pktx_s cn68xx;
1133 struct cvmx_ipd_on_bp_drop_pktx_s cn68xxp1;
1134}; 474};
1135 475
1136union cvmx_ipd_packet_mbuff_size { 476union cvmx_ipd_packet_mbuff_size {
1137 uint64_t u64; 477 uint64_t u64;
1138 struct cvmx_ipd_packet_mbuff_size_s { 478 struct cvmx_ipd_packet_mbuff_size_s {
1139#ifdef __BIG_ENDIAN_BITFIELD
1140 uint64_t reserved_12_63:52; 479 uint64_t reserved_12_63:52;
1141 uint64_t mb_size:12; 480 uint64_t mb_size:12;
1142#else
1143 uint64_t mb_size:12;
1144 uint64_t reserved_12_63:52;
1145#endif
1146 } s; 481 } s;
1147 struct cvmx_ipd_packet_mbuff_size_s cn30xx; 482 struct cvmx_ipd_packet_mbuff_size_s cn30xx;
1148 struct cvmx_ipd_packet_mbuff_size_s cn31xx; 483 struct cvmx_ipd_packet_mbuff_size_s cn31xx;
@@ -1155,40 +490,15 @@ union cvmx_ipd_packet_mbuff_size {
1155 struct cvmx_ipd_packet_mbuff_size_s cn56xxp1; 490 struct cvmx_ipd_packet_mbuff_size_s cn56xxp1;
1156 struct cvmx_ipd_packet_mbuff_size_s cn58xx; 491 struct cvmx_ipd_packet_mbuff_size_s cn58xx;
1157 struct cvmx_ipd_packet_mbuff_size_s cn58xxp1; 492 struct cvmx_ipd_packet_mbuff_size_s cn58xxp1;
1158 struct cvmx_ipd_packet_mbuff_size_s cn61xx;
1159 struct cvmx_ipd_packet_mbuff_size_s cn63xx; 493 struct cvmx_ipd_packet_mbuff_size_s cn63xx;
1160 struct cvmx_ipd_packet_mbuff_size_s cn63xxp1; 494 struct cvmx_ipd_packet_mbuff_size_s cn63xxp1;
1161 struct cvmx_ipd_packet_mbuff_size_s cn66xx;
1162 struct cvmx_ipd_packet_mbuff_size_s cn68xx;
1163 struct cvmx_ipd_packet_mbuff_size_s cn68xxp1;
1164 struct cvmx_ipd_packet_mbuff_size_s cnf71xx;
1165};
1166
1167union cvmx_ipd_pkt_err {
1168 uint64_t u64;
1169 struct cvmx_ipd_pkt_err_s {
1170#ifdef __BIG_ENDIAN_BITFIELD
1171 uint64_t reserved_6_63:58;
1172 uint64_t reasm:6;
1173#else
1174 uint64_t reasm:6;
1175 uint64_t reserved_6_63:58;
1176#endif
1177 } s;
1178 struct cvmx_ipd_pkt_err_s cn68xx;
1179 struct cvmx_ipd_pkt_err_s cn68xxp1;
1180}; 495};
1181 496
1182union cvmx_ipd_pkt_ptr_valid { 497union cvmx_ipd_pkt_ptr_valid {
1183 uint64_t u64; 498 uint64_t u64;
1184 struct cvmx_ipd_pkt_ptr_valid_s { 499 struct cvmx_ipd_pkt_ptr_valid_s {
1185#ifdef __BIG_ENDIAN_BITFIELD
1186 uint64_t reserved_29_63:35; 500 uint64_t reserved_29_63:35;
1187 uint64_t ptr:29; 501 uint64_t ptr:29;
1188#else
1189 uint64_t ptr:29;
1190 uint64_t reserved_29_63:35;
1191#endif
1192 } s; 502 } s;
1193 struct cvmx_ipd_pkt_ptr_valid_s cn30xx; 503 struct cvmx_ipd_pkt_ptr_valid_s cn30xx;
1194 struct cvmx_ipd_pkt_ptr_valid_s cn31xx; 504 struct cvmx_ipd_pkt_ptr_valid_s cn31xx;
@@ -1200,25 +510,16 @@ union cvmx_ipd_pkt_ptr_valid {
1200 struct cvmx_ipd_pkt_ptr_valid_s cn56xxp1; 510 struct cvmx_ipd_pkt_ptr_valid_s cn56xxp1;
1201 struct cvmx_ipd_pkt_ptr_valid_s cn58xx; 511 struct cvmx_ipd_pkt_ptr_valid_s cn58xx;
1202 struct cvmx_ipd_pkt_ptr_valid_s cn58xxp1; 512 struct cvmx_ipd_pkt_ptr_valid_s cn58xxp1;
1203 struct cvmx_ipd_pkt_ptr_valid_s cn61xx;
1204 struct cvmx_ipd_pkt_ptr_valid_s cn63xx; 513 struct cvmx_ipd_pkt_ptr_valid_s cn63xx;
1205 struct cvmx_ipd_pkt_ptr_valid_s cn63xxp1; 514 struct cvmx_ipd_pkt_ptr_valid_s cn63xxp1;
1206 struct cvmx_ipd_pkt_ptr_valid_s cn66xx;
1207 struct cvmx_ipd_pkt_ptr_valid_s cnf71xx;
1208}; 515};
1209 516
1210union cvmx_ipd_portx_bp_page_cnt { 517union cvmx_ipd_portx_bp_page_cnt {
1211 uint64_t u64; 518 uint64_t u64;
1212 struct cvmx_ipd_portx_bp_page_cnt_s { 519 struct cvmx_ipd_portx_bp_page_cnt_s {
1213#ifdef __BIG_ENDIAN_BITFIELD
1214 uint64_t reserved_18_63:46; 520 uint64_t reserved_18_63:46;
1215 uint64_t bp_enb:1; 521 uint64_t bp_enb:1;
1216 uint64_t page_cnt:17; 522 uint64_t page_cnt:17;
1217#else
1218 uint64_t page_cnt:17;
1219 uint64_t bp_enb:1;
1220 uint64_t reserved_18_63:46;
1221#endif
1222 } s; 523 } s;
1223 struct cvmx_ipd_portx_bp_page_cnt_s cn30xx; 524 struct cvmx_ipd_portx_bp_page_cnt_s cn30xx;
1224 struct cvmx_ipd_portx_bp_page_cnt_s cn31xx; 525 struct cvmx_ipd_portx_bp_page_cnt_s cn31xx;
@@ -1231,123 +532,65 @@ union cvmx_ipd_portx_bp_page_cnt {
1231 struct cvmx_ipd_portx_bp_page_cnt_s cn56xxp1; 532 struct cvmx_ipd_portx_bp_page_cnt_s cn56xxp1;
1232 struct cvmx_ipd_portx_bp_page_cnt_s cn58xx; 533 struct cvmx_ipd_portx_bp_page_cnt_s cn58xx;
1233 struct cvmx_ipd_portx_bp_page_cnt_s cn58xxp1; 534 struct cvmx_ipd_portx_bp_page_cnt_s cn58xxp1;
1234 struct cvmx_ipd_portx_bp_page_cnt_s cn61xx;
1235 struct cvmx_ipd_portx_bp_page_cnt_s cn63xx; 535 struct cvmx_ipd_portx_bp_page_cnt_s cn63xx;
1236 struct cvmx_ipd_portx_bp_page_cnt_s cn63xxp1; 536 struct cvmx_ipd_portx_bp_page_cnt_s cn63xxp1;
1237 struct cvmx_ipd_portx_bp_page_cnt_s cn66xx;
1238 struct cvmx_ipd_portx_bp_page_cnt_s cnf71xx;
1239}; 537};
1240 538
1241union cvmx_ipd_portx_bp_page_cnt2 { 539union cvmx_ipd_portx_bp_page_cnt2 {
1242 uint64_t u64; 540 uint64_t u64;
1243 struct cvmx_ipd_portx_bp_page_cnt2_s { 541 struct cvmx_ipd_portx_bp_page_cnt2_s {
1244#ifdef __BIG_ENDIAN_BITFIELD
1245 uint64_t reserved_18_63:46; 542 uint64_t reserved_18_63:46;
1246 uint64_t bp_enb:1; 543 uint64_t bp_enb:1;
1247 uint64_t page_cnt:17; 544 uint64_t page_cnt:17;
1248#else
1249 uint64_t page_cnt:17;
1250 uint64_t bp_enb:1;
1251 uint64_t reserved_18_63:46;
1252#endif
1253 } s; 545 } s;
1254 struct cvmx_ipd_portx_bp_page_cnt2_s cn52xx; 546 struct cvmx_ipd_portx_bp_page_cnt2_s cn52xx;
1255 struct cvmx_ipd_portx_bp_page_cnt2_s cn52xxp1; 547 struct cvmx_ipd_portx_bp_page_cnt2_s cn52xxp1;
1256 struct cvmx_ipd_portx_bp_page_cnt2_s cn56xx; 548 struct cvmx_ipd_portx_bp_page_cnt2_s cn56xx;
1257 struct cvmx_ipd_portx_bp_page_cnt2_s cn56xxp1; 549 struct cvmx_ipd_portx_bp_page_cnt2_s cn56xxp1;
1258 struct cvmx_ipd_portx_bp_page_cnt2_s cn61xx;
1259 struct cvmx_ipd_portx_bp_page_cnt2_s cn63xx; 550 struct cvmx_ipd_portx_bp_page_cnt2_s cn63xx;
1260 struct cvmx_ipd_portx_bp_page_cnt2_s cn63xxp1; 551 struct cvmx_ipd_portx_bp_page_cnt2_s cn63xxp1;
1261 struct cvmx_ipd_portx_bp_page_cnt2_s cn66xx;
1262 struct cvmx_ipd_portx_bp_page_cnt2_s cnf71xx;
1263}; 552};
1264 553
1265union cvmx_ipd_portx_bp_page_cnt3 { 554union cvmx_ipd_portx_bp_page_cnt3 {
1266 uint64_t u64; 555 uint64_t u64;
1267 struct cvmx_ipd_portx_bp_page_cnt3_s { 556 struct cvmx_ipd_portx_bp_page_cnt3_s {
1268#ifdef __BIG_ENDIAN_BITFIELD
1269 uint64_t reserved_18_63:46; 557 uint64_t reserved_18_63:46;
1270 uint64_t bp_enb:1; 558 uint64_t bp_enb:1;
1271 uint64_t page_cnt:17; 559 uint64_t page_cnt:17;
1272#else
1273 uint64_t page_cnt:17;
1274 uint64_t bp_enb:1;
1275 uint64_t reserved_18_63:46;
1276#endif
1277 } s; 560 } s;
1278 struct cvmx_ipd_portx_bp_page_cnt3_s cn61xx;
1279 struct cvmx_ipd_portx_bp_page_cnt3_s cn63xx; 561 struct cvmx_ipd_portx_bp_page_cnt3_s cn63xx;
1280 struct cvmx_ipd_portx_bp_page_cnt3_s cn63xxp1; 562 struct cvmx_ipd_portx_bp_page_cnt3_s cn63xxp1;
1281 struct cvmx_ipd_portx_bp_page_cnt3_s cn66xx;
1282 struct cvmx_ipd_portx_bp_page_cnt3_s cnf71xx;
1283}; 563};
1284 564
1285union cvmx_ipd_port_bp_counters2_pairx { 565union cvmx_ipd_port_bp_counters2_pairx {
1286 uint64_t u64; 566 uint64_t u64;
1287 struct cvmx_ipd_port_bp_counters2_pairx_s { 567 struct cvmx_ipd_port_bp_counters2_pairx_s {
1288#ifdef __BIG_ENDIAN_BITFIELD
1289 uint64_t reserved_25_63:39; 568 uint64_t reserved_25_63:39;
1290 uint64_t cnt_val:25; 569 uint64_t cnt_val:25;
1291#else
1292 uint64_t cnt_val:25;
1293 uint64_t reserved_25_63:39;
1294#endif
1295 } s; 570 } s;
1296 struct cvmx_ipd_port_bp_counters2_pairx_s cn52xx; 571 struct cvmx_ipd_port_bp_counters2_pairx_s cn52xx;
1297 struct cvmx_ipd_port_bp_counters2_pairx_s cn52xxp1; 572 struct cvmx_ipd_port_bp_counters2_pairx_s cn52xxp1;
1298 struct cvmx_ipd_port_bp_counters2_pairx_s cn56xx; 573 struct cvmx_ipd_port_bp_counters2_pairx_s cn56xx;
1299 struct cvmx_ipd_port_bp_counters2_pairx_s cn56xxp1; 574 struct cvmx_ipd_port_bp_counters2_pairx_s cn56xxp1;
1300 struct cvmx_ipd_port_bp_counters2_pairx_s cn61xx;
1301 struct cvmx_ipd_port_bp_counters2_pairx_s cn63xx; 575 struct cvmx_ipd_port_bp_counters2_pairx_s cn63xx;
1302 struct cvmx_ipd_port_bp_counters2_pairx_s cn63xxp1; 576 struct cvmx_ipd_port_bp_counters2_pairx_s cn63xxp1;
1303 struct cvmx_ipd_port_bp_counters2_pairx_s cn66xx;
1304 struct cvmx_ipd_port_bp_counters2_pairx_s cnf71xx;
1305}; 577};
1306 578
1307union cvmx_ipd_port_bp_counters3_pairx { 579union cvmx_ipd_port_bp_counters3_pairx {
1308 uint64_t u64; 580 uint64_t u64;
1309 struct cvmx_ipd_port_bp_counters3_pairx_s { 581 struct cvmx_ipd_port_bp_counters3_pairx_s {
1310#ifdef __BIG_ENDIAN_BITFIELD
1311 uint64_t reserved_25_63:39; 582 uint64_t reserved_25_63:39;
1312 uint64_t cnt_val:25; 583 uint64_t cnt_val:25;
1313#else
1314 uint64_t cnt_val:25;
1315 uint64_t reserved_25_63:39;
1316#endif
1317 } s; 584 } s;
1318 struct cvmx_ipd_port_bp_counters3_pairx_s cn61xx;
1319 struct cvmx_ipd_port_bp_counters3_pairx_s cn63xx; 585 struct cvmx_ipd_port_bp_counters3_pairx_s cn63xx;
1320 struct cvmx_ipd_port_bp_counters3_pairx_s cn63xxp1; 586 struct cvmx_ipd_port_bp_counters3_pairx_s cn63xxp1;
1321 struct cvmx_ipd_port_bp_counters3_pairx_s cn66xx;
1322 struct cvmx_ipd_port_bp_counters3_pairx_s cnf71xx;
1323};
1324
1325union cvmx_ipd_port_bp_counters4_pairx {
1326 uint64_t u64;
1327 struct cvmx_ipd_port_bp_counters4_pairx_s {
1328#ifdef __BIG_ENDIAN_BITFIELD
1329 uint64_t reserved_25_63:39;
1330 uint64_t cnt_val:25;
1331#else
1332 uint64_t cnt_val:25;
1333 uint64_t reserved_25_63:39;
1334#endif
1335 } s;
1336 struct cvmx_ipd_port_bp_counters4_pairx_s cn61xx;
1337 struct cvmx_ipd_port_bp_counters4_pairx_s cn66xx;
1338 struct cvmx_ipd_port_bp_counters4_pairx_s cnf71xx;
1339}; 587};
1340 588
1341union cvmx_ipd_port_bp_counters_pairx { 589union cvmx_ipd_port_bp_counters_pairx {
1342 uint64_t u64; 590 uint64_t u64;
1343 struct cvmx_ipd_port_bp_counters_pairx_s { 591 struct cvmx_ipd_port_bp_counters_pairx_s {
1344#ifdef __BIG_ENDIAN_BITFIELD
1345 uint64_t reserved_25_63:39; 592 uint64_t reserved_25_63:39;
1346 uint64_t cnt_val:25; 593 uint64_t cnt_val:25;
1347#else
1348 uint64_t cnt_val:25;
1349 uint64_t reserved_25_63:39;
1350#endif
1351 } s; 594 } s;
1352 struct cvmx_ipd_port_bp_counters_pairx_s cn30xx; 595 struct cvmx_ipd_port_bp_counters_pairx_s cn30xx;
1353 struct cvmx_ipd_port_bp_counters_pairx_s cn31xx; 596 struct cvmx_ipd_port_bp_counters_pairx_s cn31xx;
@@ -1360,133 +603,59 @@ union cvmx_ipd_port_bp_counters_pairx {
1360 struct cvmx_ipd_port_bp_counters_pairx_s cn56xxp1; 603 struct cvmx_ipd_port_bp_counters_pairx_s cn56xxp1;
1361 struct cvmx_ipd_port_bp_counters_pairx_s cn58xx; 604 struct cvmx_ipd_port_bp_counters_pairx_s cn58xx;
1362 struct cvmx_ipd_port_bp_counters_pairx_s cn58xxp1; 605 struct cvmx_ipd_port_bp_counters_pairx_s cn58xxp1;
1363 struct cvmx_ipd_port_bp_counters_pairx_s cn61xx;
1364 struct cvmx_ipd_port_bp_counters_pairx_s cn63xx; 606 struct cvmx_ipd_port_bp_counters_pairx_s cn63xx;
1365 struct cvmx_ipd_port_bp_counters_pairx_s cn63xxp1; 607 struct cvmx_ipd_port_bp_counters_pairx_s cn63xxp1;
1366 struct cvmx_ipd_port_bp_counters_pairx_s cn66xx;
1367 struct cvmx_ipd_port_bp_counters_pairx_s cnf71xx;
1368};
1369
1370union cvmx_ipd_port_ptr_fifo_ctl {
1371 uint64_t u64;
1372 struct cvmx_ipd_port_ptr_fifo_ctl_s {
1373#ifdef __BIG_ENDIAN_BITFIELD
1374 uint64_t reserved_48_63:16;
1375 uint64_t ptr:33;
1376 uint64_t max_pkt:7;
1377 uint64_t cena:1;
1378 uint64_t raddr:7;
1379#else
1380 uint64_t raddr:7;
1381 uint64_t cena:1;
1382 uint64_t max_pkt:7;
1383 uint64_t ptr:33;
1384 uint64_t reserved_48_63:16;
1385#endif
1386 } s;
1387 struct cvmx_ipd_port_ptr_fifo_ctl_s cn68xx;
1388 struct cvmx_ipd_port_ptr_fifo_ctl_s cn68xxp1;
1389}; 608};
1390 609
1391union cvmx_ipd_port_qos_x_cnt { 610union cvmx_ipd_port_qos_x_cnt {
1392 uint64_t u64; 611 uint64_t u64;
1393 struct cvmx_ipd_port_qos_x_cnt_s { 612 struct cvmx_ipd_port_qos_x_cnt_s {
1394#ifdef __BIG_ENDIAN_BITFIELD
1395 uint64_t wmark:32; 613 uint64_t wmark:32;
1396 uint64_t cnt:32; 614 uint64_t cnt:32;
1397#else
1398 uint64_t cnt:32;
1399 uint64_t wmark:32;
1400#endif
1401 } s; 615 } s;
1402 struct cvmx_ipd_port_qos_x_cnt_s cn52xx; 616 struct cvmx_ipd_port_qos_x_cnt_s cn52xx;
1403 struct cvmx_ipd_port_qos_x_cnt_s cn52xxp1; 617 struct cvmx_ipd_port_qos_x_cnt_s cn52xxp1;
1404 struct cvmx_ipd_port_qos_x_cnt_s cn56xx; 618 struct cvmx_ipd_port_qos_x_cnt_s cn56xx;
1405 struct cvmx_ipd_port_qos_x_cnt_s cn56xxp1; 619 struct cvmx_ipd_port_qos_x_cnt_s cn56xxp1;
1406 struct cvmx_ipd_port_qos_x_cnt_s cn61xx;
1407 struct cvmx_ipd_port_qos_x_cnt_s cn63xx; 620 struct cvmx_ipd_port_qos_x_cnt_s cn63xx;
1408 struct cvmx_ipd_port_qos_x_cnt_s cn63xxp1; 621 struct cvmx_ipd_port_qos_x_cnt_s cn63xxp1;
1409 struct cvmx_ipd_port_qos_x_cnt_s cn66xx;
1410 struct cvmx_ipd_port_qos_x_cnt_s cn68xx;
1411 struct cvmx_ipd_port_qos_x_cnt_s cn68xxp1;
1412 struct cvmx_ipd_port_qos_x_cnt_s cnf71xx;
1413}; 622};
1414 623
1415union cvmx_ipd_port_qos_intx { 624union cvmx_ipd_port_qos_intx {
1416 uint64_t u64; 625 uint64_t u64;
1417 struct cvmx_ipd_port_qos_intx_s { 626 struct cvmx_ipd_port_qos_intx_s {
1418#ifdef __BIG_ENDIAN_BITFIELD
1419 uint64_t intr:64;
1420#else
1421 uint64_t intr:64; 627 uint64_t intr:64;
1422#endif
1423 } s; 628 } s;
1424 struct cvmx_ipd_port_qos_intx_s cn52xx; 629 struct cvmx_ipd_port_qos_intx_s cn52xx;
1425 struct cvmx_ipd_port_qos_intx_s cn52xxp1; 630 struct cvmx_ipd_port_qos_intx_s cn52xxp1;
1426 struct cvmx_ipd_port_qos_intx_s cn56xx; 631 struct cvmx_ipd_port_qos_intx_s cn56xx;
1427 struct cvmx_ipd_port_qos_intx_s cn56xxp1; 632 struct cvmx_ipd_port_qos_intx_s cn56xxp1;
1428 struct cvmx_ipd_port_qos_intx_s cn61xx;
1429 struct cvmx_ipd_port_qos_intx_s cn63xx; 633 struct cvmx_ipd_port_qos_intx_s cn63xx;
1430 struct cvmx_ipd_port_qos_intx_s cn63xxp1; 634 struct cvmx_ipd_port_qos_intx_s cn63xxp1;
1431 struct cvmx_ipd_port_qos_intx_s cn66xx;
1432 struct cvmx_ipd_port_qos_intx_s cn68xx;
1433 struct cvmx_ipd_port_qos_intx_s cn68xxp1;
1434 struct cvmx_ipd_port_qos_intx_s cnf71xx;
1435}; 635};
1436 636
1437union cvmx_ipd_port_qos_int_enbx { 637union cvmx_ipd_port_qos_int_enbx {
1438 uint64_t u64; 638 uint64_t u64;
1439 struct cvmx_ipd_port_qos_int_enbx_s { 639 struct cvmx_ipd_port_qos_int_enbx_s {
1440#ifdef __BIG_ENDIAN_BITFIELD
1441 uint64_t enb:64;
1442#else
1443 uint64_t enb:64; 640 uint64_t enb:64;
1444#endif
1445 } s; 641 } s;
1446 struct cvmx_ipd_port_qos_int_enbx_s cn52xx; 642 struct cvmx_ipd_port_qos_int_enbx_s cn52xx;
1447 struct cvmx_ipd_port_qos_int_enbx_s cn52xxp1; 643 struct cvmx_ipd_port_qos_int_enbx_s cn52xxp1;
1448 struct cvmx_ipd_port_qos_int_enbx_s cn56xx; 644 struct cvmx_ipd_port_qos_int_enbx_s cn56xx;
1449 struct cvmx_ipd_port_qos_int_enbx_s cn56xxp1; 645 struct cvmx_ipd_port_qos_int_enbx_s cn56xxp1;
1450 struct cvmx_ipd_port_qos_int_enbx_s cn61xx;
1451 struct cvmx_ipd_port_qos_int_enbx_s cn63xx; 646 struct cvmx_ipd_port_qos_int_enbx_s cn63xx;
1452 struct cvmx_ipd_port_qos_int_enbx_s cn63xxp1; 647 struct cvmx_ipd_port_qos_int_enbx_s cn63xxp1;
1453 struct cvmx_ipd_port_qos_int_enbx_s cn66xx;
1454 struct cvmx_ipd_port_qos_int_enbx_s cn68xx;
1455 struct cvmx_ipd_port_qos_int_enbx_s cn68xxp1;
1456 struct cvmx_ipd_port_qos_int_enbx_s cnf71xx;
1457};
1458
1459union cvmx_ipd_port_sopx {
1460 uint64_t u64;
1461 struct cvmx_ipd_port_sopx_s {
1462#ifdef __BIG_ENDIAN_BITFIELD
1463 uint64_t sop:64;
1464#else
1465 uint64_t sop:64;
1466#endif
1467 } s;
1468 struct cvmx_ipd_port_sopx_s cn68xx;
1469 struct cvmx_ipd_port_sopx_s cn68xxp1;
1470}; 648};
1471 649
1472union cvmx_ipd_prc_hold_ptr_fifo_ctl { 650union cvmx_ipd_prc_hold_ptr_fifo_ctl {
1473 uint64_t u64; 651 uint64_t u64;
1474 struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s { 652 struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s {
1475#ifdef __BIG_ENDIAN_BITFIELD
1476 uint64_t reserved_39_63:25; 653 uint64_t reserved_39_63:25;
1477 uint64_t max_pkt:3; 654 uint64_t max_pkt:3;
1478 uint64_t praddr:3; 655 uint64_t praddr:3;
1479 uint64_t ptr:29; 656 uint64_t ptr:29;
1480 uint64_t cena:1; 657 uint64_t cena:1;
1481 uint64_t raddr:3; 658 uint64_t raddr:3;
1482#else
1483 uint64_t raddr:3;
1484 uint64_t cena:1;
1485 uint64_t ptr:29;
1486 uint64_t praddr:3;
1487 uint64_t max_pkt:3;
1488 uint64_t reserved_39_63:25;
1489#endif
1490 } s; 659 } s;
1491 struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn30xx; 660 struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn30xx;
1492 struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn31xx; 661 struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn31xx;
@@ -1498,29 +667,18 @@ union cvmx_ipd_prc_hold_ptr_fifo_ctl {
1498 struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn56xxp1; 667 struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn56xxp1;
1499 struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn58xx; 668 struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn58xx;
1500 struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn58xxp1; 669 struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn58xxp1;
1501 struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn61xx;
1502 struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn63xx; 670 struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn63xx;
1503 struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn63xxp1; 671 struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn63xxp1;
1504 struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn66xx;
1505 struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cnf71xx;
1506}; 672};
1507 673
1508union cvmx_ipd_prc_port_ptr_fifo_ctl { 674union cvmx_ipd_prc_port_ptr_fifo_ctl {
1509 uint64_t u64; 675 uint64_t u64;
1510 struct cvmx_ipd_prc_port_ptr_fifo_ctl_s { 676 struct cvmx_ipd_prc_port_ptr_fifo_ctl_s {
1511#ifdef __BIG_ENDIAN_BITFIELD
1512 uint64_t reserved_44_63:20; 677 uint64_t reserved_44_63:20;
1513 uint64_t max_pkt:7; 678 uint64_t max_pkt:7;
1514 uint64_t ptr:29; 679 uint64_t ptr:29;
1515 uint64_t cena:1; 680 uint64_t cena:1;
1516 uint64_t raddr:7; 681 uint64_t raddr:7;
1517#else
1518 uint64_t raddr:7;
1519 uint64_t cena:1;
1520 uint64_t ptr:29;
1521 uint64_t max_pkt:7;
1522 uint64_t reserved_44_63:20;
1523#endif
1524 } s; 682 } s;
1525 struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn30xx; 683 struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn30xx;
1526 struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn31xx; 684 struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn31xx;
@@ -1532,31 +690,19 @@ union cvmx_ipd_prc_port_ptr_fifo_ctl {
1532 struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn56xxp1; 690 struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn56xxp1;
1533 struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn58xx; 691 struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn58xx;
1534 struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn58xxp1; 692 struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn58xxp1;
1535 struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn61xx;
1536 struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn63xx; 693 struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn63xx;
1537 struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn63xxp1; 694 struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn63xxp1;
1538 struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn66xx;
1539 struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cnf71xx;
1540}; 695};
1541 696
1542union cvmx_ipd_ptr_count { 697union cvmx_ipd_ptr_count {
1543 uint64_t u64; 698 uint64_t u64;
1544 struct cvmx_ipd_ptr_count_s { 699 struct cvmx_ipd_ptr_count_s {
1545#ifdef __BIG_ENDIAN_BITFIELD
1546 uint64_t reserved_19_63:45; 700 uint64_t reserved_19_63:45;
1547 uint64_t pktv_cnt:1; 701 uint64_t pktv_cnt:1;
1548 uint64_t wqev_cnt:1; 702 uint64_t wqev_cnt:1;
1549 uint64_t pfif_cnt:3; 703 uint64_t pfif_cnt:3;
1550 uint64_t pkt_pcnt:7; 704 uint64_t pkt_pcnt:7;
1551 uint64_t wqe_pcnt:7; 705 uint64_t wqe_pcnt:7;
1552#else
1553 uint64_t wqe_pcnt:7;
1554 uint64_t pkt_pcnt:7;
1555 uint64_t pfif_cnt:3;
1556 uint64_t wqev_cnt:1;
1557 uint64_t pktv_cnt:1;
1558 uint64_t reserved_19_63:45;
1559#endif
1560 } s; 706 } s;
1561 struct cvmx_ipd_ptr_count_s cn30xx; 707 struct cvmx_ipd_ptr_count_s cn30xx;
1562 struct cvmx_ipd_ptr_count_s cn31xx; 708 struct cvmx_ipd_ptr_count_s cn31xx;
@@ -1569,19 +715,13 @@ union cvmx_ipd_ptr_count {
1569 struct cvmx_ipd_ptr_count_s cn56xxp1; 715 struct cvmx_ipd_ptr_count_s cn56xxp1;
1570 struct cvmx_ipd_ptr_count_s cn58xx; 716 struct cvmx_ipd_ptr_count_s cn58xx;
1571 struct cvmx_ipd_ptr_count_s cn58xxp1; 717 struct cvmx_ipd_ptr_count_s cn58xxp1;
1572 struct cvmx_ipd_ptr_count_s cn61xx;
1573 struct cvmx_ipd_ptr_count_s cn63xx; 718 struct cvmx_ipd_ptr_count_s cn63xx;
1574 struct cvmx_ipd_ptr_count_s cn63xxp1; 719 struct cvmx_ipd_ptr_count_s cn63xxp1;
1575 struct cvmx_ipd_ptr_count_s cn66xx;
1576 struct cvmx_ipd_ptr_count_s cn68xx;
1577 struct cvmx_ipd_ptr_count_s cn68xxp1;
1578 struct cvmx_ipd_ptr_count_s cnf71xx;
1579}; 720};
1580 721
1581union cvmx_ipd_pwp_ptr_fifo_ctl { 722union cvmx_ipd_pwp_ptr_fifo_ctl {
1582 uint64_t u64; 723 uint64_t u64;
1583 struct cvmx_ipd_pwp_ptr_fifo_ctl_s { 724 struct cvmx_ipd_pwp_ptr_fifo_ctl_s {
1584#ifdef __BIG_ENDIAN_BITFIELD
1585 uint64_t reserved_61_63:3; 725 uint64_t reserved_61_63:3;
1586 uint64_t max_cnts:7; 726 uint64_t max_cnts:7;
1587 uint64_t wraddr:8; 727 uint64_t wraddr:8;
@@ -1589,15 +729,6 @@ union cvmx_ipd_pwp_ptr_fifo_ctl {
1589 uint64_t ptr:29; 729 uint64_t ptr:29;
1590 uint64_t cena:1; 730 uint64_t cena:1;
1591 uint64_t raddr:8; 731 uint64_t raddr:8;
1592#else
1593 uint64_t raddr:8;
1594 uint64_t cena:1;
1595 uint64_t ptr:29;
1596 uint64_t praddr:8;
1597 uint64_t wraddr:8;
1598 uint64_t max_cnts:7;
1599 uint64_t reserved_61_63:3;
1600#endif
1601 } s; 732 } s;
1602 struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn30xx; 733 struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn30xx;
1603 struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn31xx; 734 struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn31xx;
@@ -1609,23 +740,15 @@ union cvmx_ipd_pwp_ptr_fifo_ctl {
1609 struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn56xxp1; 740 struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn56xxp1;
1610 struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn58xx; 741 struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn58xx;
1611 struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn58xxp1; 742 struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn58xxp1;
1612 struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn61xx;
1613 struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn63xx; 743 struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn63xx;
1614 struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn63xxp1; 744 struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn63xxp1;
1615 struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn66xx;
1616 struct cvmx_ipd_pwp_ptr_fifo_ctl_s cnf71xx;
1617}; 745};
1618 746
1619union cvmx_ipd_qosx_red_marks { 747union cvmx_ipd_qosx_red_marks {
1620 uint64_t u64; 748 uint64_t u64;
1621 struct cvmx_ipd_qosx_red_marks_s { 749 struct cvmx_ipd_qosx_red_marks_s {
1622#ifdef __BIG_ENDIAN_BITFIELD
1623 uint64_t drop:32; 750 uint64_t drop:32;
1624 uint64_t pass:32; 751 uint64_t pass:32;
1625#else
1626 uint64_t pass:32;
1627 uint64_t drop:32;
1628#endif
1629 } s; 752 } s;
1630 struct cvmx_ipd_qosx_red_marks_s cn30xx; 753 struct cvmx_ipd_qosx_red_marks_s cn30xx;
1631 struct cvmx_ipd_qosx_red_marks_s cn31xx; 754 struct cvmx_ipd_qosx_red_marks_s cn31xx;
@@ -1638,25 +761,15 @@ union cvmx_ipd_qosx_red_marks {
1638 struct cvmx_ipd_qosx_red_marks_s cn56xxp1; 761 struct cvmx_ipd_qosx_red_marks_s cn56xxp1;
1639 struct cvmx_ipd_qosx_red_marks_s cn58xx; 762 struct cvmx_ipd_qosx_red_marks_s cn58xx;
1640 struct cvmx_ipd_qosx_red_marks_s cn58xxp1; 763 struct cvmx_ipd_qosx_red_marks_s cn58xxp1;
1641 struct cvmx_ipd_qosx_red_marks_s cn61xx;
1642 struct cvmx_ipd_qosx_red_marks_s cn63xx; 764 struct cvmx_ipd_qosx_red_marks_s cn63xx;
1643 struct cvmx_ipd_qosx_red_marks_s cn63xxp1; 765 struct cvmx_ipd_qosx_red_marks_s cn63xxp1;
1644 struct cvmx_ipd_qosx_red_marks_s cn66xx;
1645 struct cvmx_ipd_qosx_red_marks_s cn68xx;
1646 struct cvmx_ipd_qosx_red_marks_s cn68xxp1;
1647 struct cvmx_ipd_qosx_red_marks_s cnf71xx;
1648}; 766};
1649 767
1650union cvmx_ipd_que0_free_page_cnt { 768union cvmx_ipd_que0_free_page_cnt {
1651 uint64_t u64; 769 uint64_t u64;
1652 struct cvmx_ipd_que0_free_page_cnt_s { 770 struct cvmx_ipd_que0_free_page_cnt_s {
1653#ifdef __BIG_ENDIAN_BITFIELD
1654 uint64_t reserved_32_63:32; 771 uint64_t reserved_32_63:32;
1655 uint64_t q0_pcnt:32; 772 uint64_t q0_pcnt:32;
1656#else
1657 uint64_t q0_pcnt:32;
1658 uint64_t reserved_32_63:32;
1659#endif
1660 } s; 773 } s;
1661 struct cvmx_ipd_que0_free_page_cnt_s cn30xx; 774 struct cvmx_ipd_que0_free_page_cnt_s cn30xx;
1662 struct cvmx_ipd_que0_free_page_cnt_s cn31xx; 775 struct cvmx_ipd_que0_free_page_cnt_s cn31xx;
@@ -1669,57 +782,16 @@ union cvmx_ipd_que0_free_page_cnt {
1669 struct cvmx_ipd_que0_free_page_cnt_s cn56xxp1; 782 struct cvmx_ipd_que0_free_page_cnt_s cn56xxp1;
1670 struct cvmx_ipd_que0_free_page_cnt_s cn58xx; 783 struct cvmx_ipd_que0_free_page_cnt_s cn58xx;
1671 struct cvmx_ipd_que0_free_page_cnt_s cn58xxp1; 784 struct cvmx_ipd_que0_free_page_cnt_s cn58xxp1;
1672 struct cvmx_ipd_que0_free_page_cnt_s cn61xx;
1673 struct cvmx_ipd_que0_free_page_cnt_s cn63xx; 785 struct cvmx_ipd_que0_free_page_cnt_s cn63xx;
1674 struct cvmx_ipd_que0_free_page_cnt_s cn63xxp1; 786 struct cvmx_ipd_que0_free_page_cnt_s cn63xxp1;
1675 struct cvmx_ipd_que0_free_page_cnt_s cn66xx;
1676 struct cvmx_ipd_que0_free_page_cnt_s cn68xx;
1677 struct cvmx_ipd_que0_free_page_cnt_s cn68xxp1;
1678 struct cvmx_ipd_que0_free_page_cnt_s cnf71xx;
1679};
1680
1681union cvmx_ipd_red_bpid_enablex {
1682 uint64_t u64;
1683 struct cvmx_ipd_red_bpid_enablex_s {
1684#ifdef __BIG_ENDIAN_BITFIELD
1685 uint64_t prt_enb:64;
1686#else
1687 uint64_t prt_enb:64;
1688#endif
1689 } s;
1690 struct cvmx_ipd_red_bpid_enablex_s cn68xx;
1691 struct cvmx_ipd_red_bpid_enablex_s cn68xxp1;
1692};
1693
1694union cvmx_ipd_red_delay {
1695 uint64_t u64;
1696 struct cvmx_ipd_red_delay_s {
1697#ifdef __BIG_ENDIAN_BITFIELD
1698 uint64_t reserved_28_63:36;
1699 uint64_t prb_dly:14;
1700 uint64_t avg_dly:14;
1701#else
1702 uint64_t avg_dly:14;
1703 uint64_t prb_dly:14;
1704 uint64_t reserved_28_63:36;
1705#endif
1706 } s;
1707 struct cvmx_ipd_red_delay_s cn68xx;
1708 struct cvmx_ipd_red_delay_s cn68xxp1;
1709}; 787};
1710 788
1711union cvmx_ipd_red_port_enable { 789union cvmx_ipd_red_port_enable {
1712 uint64_t u64; 790 uint64_t u64;
1713 struct cvmx_ipd_red_port_enable_s { 791 struct cvmx_ipd_red_port_enable_s {
1714#ifdef __BIG_ENDIAN_BITFIELD
1715 uint64_t prb_dly:14; 792 uint64_t prb_dly:14;
1716 uint64_t avg_dly:14; 793 uint64_t avg_dly:14;
1717 uint64_t prt_enb:36; 794 uint64_t prt_enb:36;
1718#else
1719 uint64_t prt_enb:36;
1720 uint64_t avg_dly:14;
1721 uint64_t prb_dly:14;
1722#endif
1723 } s; 795 } s;
1724 struct cvmx_ipd_red_port_enable_s cn30xx; 796 struct cvmx_ipd_red_port_enable_s cn30xx;
1725 struct cvmx_ipd_red_port_enable_s cn31xx; 797 struct cvmx_ipd_red_port_enable_s cn31xx;
@@ -1732,67 +804,35 @@ union cvmx_ipd_red_port_enable {
1732 struct cvmx_ipd_red_port_enable_s cn56xxp1; 804 struct cvmx_ipd_red_port_enable_s cn56xxp1;
1733 struct cvmx_ipd_red_port_enable_s cn58xx; 805 struct cvmx_ipd_red_port_enable_s cn58xx;
1734 struct cvmx_ipd_red_port_enable_s cn58xxp1; 806 struct cvmx_ipd_red_port_enable_s cn58xxp1;
1735 struct cvmx_ipd_red_port_enable_s cn61xx;
1736 struct cvmx_ipd_red_port_enable_s cn63xx; 807 struct cvmx_ipd_red_port_enable_s cn63xx;
1737 struct cvmx_ipd_red_port_enable_s cn63xxp1; 808 struct cvmx_ipd_red_port_enable_s cn63xxp1;
1738 struct cvmx_ipd_red_port_enable_s cn66xx;
1739 struct cvmx_ipd_red_port_enable_s cnf71xx;
1740}; 809};
1741 810
1742union cvmx_ipd_red_port_enable2 { 811union cvmx_ipd_red_port_enable2 {
1743 uint64_t u64; 812 uint64_t u64;
1744 struct cvmx_ipd_red_port_enable2_s { 813 struct cvmx_ipd_red_port_enable2_s {
1745#ifdef __BIG_ENDIAN_BITFIELD 814 uint64_t reserved_8_63:56;
1746 uint64_t reserved_12_63:52; 815 uint64_t prt_enb:8;
1747 uint64_t prt_enb:12;
1748#else
1749 uint64_t prt_enb:12;
1750 uint64_t reserved_12_63:52;
1751#endif
1752 } s; 816 } s;
1753 struct cvmx_ipd_red_port_enable2_cn52xx { 817 struct cvmx_ipd_red_port_enable2_cn52xx {
1754#ifdef __BIG_ENDIAN_BITFIELD
1755 uint64_t reserved_4_63:60; 818 uint64_t reserved_4_63:60;
1756 uint64_t prt_enb:4; 819 uint64_t prt_enb:4;
1757#else
1758 uint64_t prt_enb:4;
1759 uint64_t reserved_4_63:60;
1760#endif
1761 } cn52xx; 820 } cn52xx;
1762 struct cvmx_ipd_red_port_enable2_cn52xx cn52xxp1; 821 struct cvmx_ipd_red_port_enable2_cn52xx cn52xxp1;
1763 struct cvmx_ipd_red_port_enable2_cn52xx cn56xx; 822 struct cvmx_ipd_red_port_enable2_cn52xx cn56xx;
1764 struct cvmx_ipd_red_port_enable2_cn52xx cn56xxp1; 823 struct cvmx_ipd_red_port_enable2_cn52xx cn56xxp1;
1765 struct cvmx_ipd_red_port_enable2_s cn61xx; 824 struct cvmx_ipd_red_port_enable2_s cn63xx;
1766 struct cvmx_ipd_red_port_enable2_cn63xx { 825 struct cvmx_ipd_red_port_enable2_s cn63xxp1;
1767#ifdef __BIG_ENDIAN_BITFIELD
1768 uint64_t reserved_8_63:56;
1769 uint64_t prt_enb:8;
1770#else
1771 uint64_t prt_enb:8;
1772 uint64_t reserved_8_63:56;
1773#endif
1774 } cn63xx;
1775 struct cvmx_ipd_red_port_enable2_cn63xx cn63xxp1;
1776 struct cvmx_ipd_red_port_enable2_s cn66xx;
1777 struct cvmx_ipd_red_port_enable2_s cnf71xx;
1778}; 826};
1779 827
1780union cvmx_ipd_red_quex_param { 828union cvmx_ipd_red_quex_param {
1781 uint64_t u64; 829 uint64_t u64;
1782 struct cvmx_ipd_red_quex_param_s { 830 struct cvmx_ipd_red_quex_param_s {
1783#ifdef __BIG_ENDIAN_BITFIELD
1784 uint64_t reserved_49_63:15; 831 uint64_t reserved_49_63:15;
1785 uint64_t use_pcnt:1; 832 uint64_t use_pcnt:1;
1786 uint64_t new_con:8; 833 uint64_t new_con:8;
1787 uint64_t avg_con:8; 834 uint64_t avg_con:8;
1788 uint64_t prb_con:32; 835 uint64_t prb_con:32;
1789#else
1790 uint64_t prb_con:32;
1791 uint64_t avg_con:8;
1792 uint64_t new_con:8;
1793 uint64_t use_pcnt:1;
1794 uint64_t reserved_49_63:15;
1795#endif
1796 } s; 836 } s;
1797 struct cvmx_ipd_red_quex_param_s cn30xx; 837 struct cvmx_ipd_red_quex_param_s cn30xx;
1798 struct cvmx_ipd_red_quex_param_s cn31xx; 838 struct cvmx_ipd_red_quex_param_s cn31xx;
@@ -1805,53 +845,16 @@ union cvmx_ipd_red_quex_param {
1805 struct cvmx_ipd_red_quex_param_s cn56xxp1; 845 struct cvmx_ipd_red_quex_param_s cn56xxp1;
1806 struct cvmx_ipd_red_quex_param_s cn58xx; 846 struct cvmx_ipd_red_quex_param_s cn58xx;
1807 struct cvmx_ipd_red_quex_param_s cn58xxp1; 847 struct cvmx_ipd_red_quex_param_s cn58xxp1;
1808 struct cvmx_ipd_red_quex_param_s cn61xx;
1809 struct cvmx_ipd_red_quex_param_s cn63xx; 848 struct cvmx_ipd_red_quex_param_s cn63xx;
1810 struct cvmx_ipd_red_quex_param_s cn63xxp1; 849 struct cvmx_ipd_red_quex_param_s cn63xxp1;
1811 struct cvmx_ipd_red_quex_param_s cn66xx;
1812 struct cvmx_ipd_red_quex_param_s cn68xx;
1813 struct cvmx_ipd_red_quex_param_s cn68xxp1;
1814 struct cvmx_ipd_red_quex_param_s cnf71xx;
1815};
1816
1817union cvmx_ipd_req_wgt {
1818 uint64_t u64;
1819 struct cvmx_ipd_req_wgt_s {
1820#ifdef __BIG_ENDIAN_BITFIELD
1821 uint64_t wgt7:8;
1822 uint64_t wgt6:8;
1823 uint64_t wgt5:8;
1824 uint64_t wgt4:8;
1825 uint64_t wgt3:8;
1826 uint64_t wgt2:8;
1827 uint64_t wgt1:8;
1828 uint64_t wgt0:8;
1829#else
1830 uint64_t wgt0:8;
1831 uint64_t wgt1:8;
1832 uint64_t wgt2:8;
1833 uint64_t wgt3:8;
1834 uint64_t wgt4:8;
1835 uint64_t wgt5:8;
1836 uint64_t wgt6:8;
1837 uint64_t wgt7:8;
1838#endif
1839 } s;
1840 struct cvmx_ipd_req_wgt_s cn68xx;
1841}; 850};
1842 851
1843union cvmx_ipd_sub_port_bp_page_cnt { 852union cvmx_ipd_sub_port_bp_page_cnt {
1844 uint64_t u64; 853 uint64_t u64;
1845 struct cvmx_ipd_sub_port_bp_page_cnt_s { 854 struct cvmx_ipd_sub_port_bp_page_cnt_s {
1846#ifdef __BIG_ENDIAN_BITFIELD
1847 uint64_t reserved_31_63:33; 855 uint64_t reserved_31_63:33;
1848 uint64_t port:6; 856 uint64_t port:6;
1849 uint64_t page_cnt:25; 857 uint64_t page_cnt:25;
1850#else
1851 uint64_t page_cnt:25;
1852 uint64_t port:6;
1853 uint64_t reserved_31_63:33;
1854#endif
1855 } s; 858 } s;
1856 struct cvmx_ipd_sub_port_bp_page_cnt_s cn30xx; 859 struct cvmx_ipd_sub_port_bp_page_cnt_s cn30xx;
1857 struct cvmx_ipd_sub_port_bp_page_cnt_s cn31xx; 860 struct cvmx_ipd_sub_port_bp_page_cnt_s cn31xx;
@@ -1864,48 +867,26 @@ union cvmx_ipd_sub_port_bp_page_cnt {
1864 struct cvmx_ipd_sub_port_bp_page_cnt_s cn56xxp1; 867 struct cvmx_ipd_sub_port_bp_page_cnt_s cn56xxp1;
1865 struct cvmx_ipd_sub_port_bp_page_cnt_s cn58xx; 868 struct cvmx_ipd_sub_port_bp_page_cnt_s cn58xx;
1866 struct cvmx_ipd_sub_port_bp_page_cnt_s cn58xxp1; 869 struct cvmx_ipd_sub_port_bp_page_cnt_s cn58xxp1;
1867 struct cvmx_ipd_sub_port_bp_page_cnt_s cn61xx;
1868 struct cvmx_ipd_sub_port_bp_page_cnt_s cn63xx; 870 struct cvmx_ipd_sub_port_bp_page_cnt_s cn63xx;
1869 struct cvmx_ipd_sub_port_bp_page_cnt_s cn63xxp1; 871 struct cvmx_ipd_sub_port_bp_page_cnt_s cn63xxp1;
1870 struct cvmx_ipd_sub_port_bp_page_cnt_s cn66xx;
1871 struct cvmx_ipd_sub_port_bp_page_cnt_s cn68xx;
1872 struct cvmx_ipd_sub_port_bp_page_cnt_s cn68xxp1;
1873 struct cvmx_ipd_sub_port_bp_page_cnt_s cnf71xx;
1874}; 872};
1875 873
1876union cvmx_ipd_sub_port_fcs { 874union cvmx_ipd_sub_port_fcs {
1877 uint64_t u64; 875 uint64_t u64;
1878 struct cvmx_ipd_sub_port_fcs_s { 876 struct cvmx_ipd_sub_port_fcs_s {
1879#ifdef __BIG_ENDIAN_BITFIELD
1880 uint64_t reserved_40_63:24; 877 uint64_t reserved_40_63:24;
1881 uint64_t port_bit2:4; 878 uint64_t port_bit2:4;
1882 uint64_t reserved_32_35:4; 879 uint64_t reserved_32_35:4;
1883 uint64_t port_bit:32; 880 uint64_t port_bit:32;
1884#else
1885 uint64_t port_bit:32;
1886 uint64_t reserved_32_35:4;
1887 uint64_t port_bit2:4;
1888 uint64_t reserved_40_63:24;
1889#endif
1890 } s; 881 } s;
1891 struct cvmx_ipd_sub_port_fcs_cn30xx { 882 struct cvmx_ipd_sub_port_fcs_cn30xx {
1892#ifdef __BIG_ENDIAN_BITFIELD
1893 uint64_t reserved_3_63:61; 883 uint64_t reserved_3_63:61;
1894 uint64_t port_bit:3; 884 uint64_t port_bit:3;
1895#else
1896 uint64_t port_bit:3;
1897 uint64_t reserved_3_63:61;
1898#endif
1899 } cn30xx; 885 } cn30xx;
1900 struct cvmx_ipd_sub_port_fcs_cn30xx cn31xx; 886 struct cvmx_ipd_sub_port_fcs_cn30xx cn31xx;
1901 struct cvmx_ipd_sub_port_fcs_cn38xx { 887 struct cvmx_ipd_sub_port_fcs_cn38xx {
1902#ifdef __BIG_ENDIAN_BITFIELD
1903 uint64_t reserved_32_63:32; 888 uint64_t reserved_32_63:32;
1904 uint64_t port_bit:32; 889 uint64_t port_bit:32;
1905#else
1906 uint64_t port_bit:32;
1907 uint64_t reserved_32_63:32;
1908#endif
1909 } cn38xx; 890 } cn38xx;
1910 struct cvmx_ipd_sub_port_fcs_cn38xx cn38xxp2; 891 struct cvmx_ipd_sub_port_fcs_cn38xx cn38xxp2;
1911 struct cvmx_ipd_sub_port_fcs_cn30xx cn50xx; 892 struct cvmx_ipd_sub_port_fcs_cn30xx cn50xx;
@@ -1915,49 +896,30 @@ union cvmx_ipd_sub_port_fcs {
1915 struct cvmx_ipd_sub_port_fcs_s cn56xxp1; 896 struct cvmx_ipd_sub_port_fcs_s cn56xxp1;
1916 struct cvmx_ipd_sub_port_fcs_cn38xx cn58xx; 897 struct cvmx_ipd_sub_port_fcs_cn38xx cn58xx;
1917 struct cvmx_ipd_sub_port_fcs_cn38xx cn58xxp1; 898 struct cvmx_ipd_sub_port_fcs_cn38xx cn58xxp1;
1918 struct cvmx_ipd_sub_port_fcs_s cn61xx;
1919 struct cvmx_ipd_sub_port_fcs_s cn63xx; 899 struct cvmx_ipd_sub_port_fcs_s cn63xx;
1920 struct cvmx_ipd_sub_port_fcs_s cn63xxp1; 900 struct cvmx_ipd_sub_port_fcs_s cn63xxp1;
1921 struct cvmx_ipd_sub_port_fcs_s cn66xx;
1922 struct cvmx_ipd_sub_port_fcs_s cnf71xx;
1923}; 901};
1924 902
1925union cvmx_ipd_sub_port_qos_cnt { 903union cvmx_ipd_sub_port_qos_cnt {
1926 uint64_t u64; 904 uint64_t u64;
1927 struct cvmx_ipd_sub_port_qos_cnt_s { 905 struct cvmx_ipd_sub_port_qos_cnt_s {
1928#ifdef __BIG_ENDIAN_BITFIELD
1929 uint64_t reserved_41_63:23; 906 uint64_t reserved_41_63:23;
1930 uint64_t port_qos:9; 907 uint64_t port_qos:9;
1931 uint64_t cnt:32; 908 uint64_t cnt:32;
1932#else
1933 uint64_t cnt:32;
1934 uint64_t port_qos:9;
1935 uint64_t reserved_41_63:23;
1936#endif
1937 } s; 909 } s;
1938 struct cvmx_ipd_sub_port_qos_cnt_s cn52xx; 910 struct cvmx_ipd_sub_port_qos_cnt_s cn52xx;
1939 struct cvmx_ipd_sub_port_qos_cnt_s cn52xxp1; 911 struct cvmx_ipd_sub_port_qos_cnt_s cn52xxp1;
1940 struct cvmx_ipd_sub_port_qos_cnt_s cn56xx; 912 struct cvmx_ipd_sub_port_qos_cnt_s cn56xx;
1941 struct cvmx_ipd_sub_port_qos_cnt_s cn56xxp1; 913 struct cvmx_ipd_sub_port_qos_cnt_s cn56xxp1;
1942 struct cvmx_ipd_sub_port_qos_cnt_s cn61xx;
1943 struct cvmx_ipd_sub_port_qos_cnt_s cn63xx; 914 struct cvmx_ipd_sub_port_qos_cnt_s cn63xx;
1944 struct cvmx_ipd_sub_port_qos_cnt_s cn63xxp1; 915 struct cvmx_ipd_sub_port_qos_cnt_s cn63xxp1;
1945 struct cvmx_ipd_sub_port_qos_cnt_s cn66xx;
1946 struct cvmx_ipd_sub_port_qos_cnt_s cn68xx;
1947 struct cvmx_ipd_sub_port_qos_cnt_s cn68xxp1;
1948 struct cvmx_ipd_sub_port_qos_cnt_s cnf71xx;
1949}; 916};
1950 917
1951union cvmx_ipd_wqe_fpa_queue { 918union cvmx_ipd_wqe_fpa_queue {
1952 uint64_t u64; 919 uint64_t u64;
1953 struct cvmx_ipd_wqe_fpa_queue_s { 920 struct cvmx_ipd_wqe_fpa_queue_s {
1954#ifdef __BIG_ENDIAN_BITFIELD
1955 uint64_t reserved_3_63:61; 921 uint64_t reserved_3_63:61;
1956 uint64_t wqe_pool:3; 922 uint64_t wqe_pool:3;
1957#else
1958 uint64_t wqe_pool:3;
1959 uint64_t reserved_3_63:61;
1960#endif
1961 } s; 923 } s;
1962 struct cvmx_ipd_wqe_fpa_queue_s cn30xx; 924 struct cvmx_ipd_wqe_fpa_queue_s cn30xx;
1963 struct cvmx_ipd_wqe_fpa_queue_s cn31xx; 925 struct cvmx_ipd_wqe_fpa_queue_s cn31xx;
@@ -1970,25 +932,15 @@ union cvmx_ipd_wqe_fpa_queue {
1970 struct cvmx_ipd_wqe_fpa_queue_s cn56xxp1; 932 struct cvmx_ipd_wqe_fpa_queue_s cn56xxp1;
1971 struct cvmx_ipd_wqe_fpa_queue_s cn58xx; 933 struct cvmx_ipd_wqe_fpa_queue_s cn58xx;
1972 struct cvmx_ipd_wqe_fpa_queue_s cn58xxp1; 934 struct cvmx_ipd_wqe_fpa_queue_s cn58xxp1;
1973 struct cvmx_ipd_wqe_fpa_queue_s cn61xx;
1974 struct cvmx_ipd_wqe_fpa_queue_s cn63xx; 935 struct cvmx_ipd_wqe_fpa_queue_s cn63xx;
1975 struct cvmx_ipd_wqe_fpa_queue_s cn63xxp1; 936 struct cvmx_ipd_wqe_fpa_queue_s cn63xxp1;
1976 struct cvmx_ipd_wqe_fpa_queue_s cn66xx;
1977 struct cvmx_ipd_wqe_fpa_queue_s cn68xx;
1978 struct cvmx_ipd_wqe_fpa_queue_s cn68xxp1;
1979 struct cvmx_ipd_wqe_fpa_queue_s cnf71xx;
1980}; 937};
1981 938
1982union cvmx_ipd_wqe_ptr_valid { 939union cvmx_ipd_wqe_ptr_valid {
1983 uint64_t u64; 940 uint64_t u64;
1984 struct cvmx_ipd_wqe_ptr_valid_s { 941 struct cvmx_ipd_wqe_ptr_valid_s {
1985#ifdef __BIG_ENDIAN_BITFIELD
1986 uint64_t reserved_29_63:35; 942 uint64_t reserved_29_63:35;
1987 uint64_t ptr:29; 943 uint64_t ptr:29;
1988#else
1989 uint64_t ptr:29;
1990 uint64_t reserved_29_63:35;
1991#endif
1992 } s; 944 } s;
1993 struct cvmx_ipd_wqe_ptr_valid_s cn30xx; 945 struct cvmx_ipd_wqe_ptr_valid_s cn30xx;
1994 struct cvmx_ipd_wqe_ptr_valid_s cn31xx; 946 struct cvmx_ipd_wqe_ptr_valid_s cn31xx;
@@ -2000,11 +952,8 @@ union cvmx_ipd_wqe_ptr_valid {
2000 struct cvmx_ipd_wqe_ptr_valid_s cn56xxp1; 952 struct cvmx_ipd_wqe_ptr_valid_s cn56xxp1;
2001 struct cvmx_ipd_wqe_ptr_valid_s cn58xx; 953 struct cvmx_ipd_wqe_ptr_valid_s cn58xx;
2002 struct cvmx_ipd_wqe_ptr_valid_s cn58xxp1; 954 struct cvmx_ipd_wqe_ptr_valid_s cn58xxp1;
2003 struct cvmx_ipd_wqe_ptr_valid_s cn61xx;
2004 struct cvmx_ipd_wqe_ptr_valid_s cn63xx; 955 struct cvmx_ipd_wqe_ptr_valid_s cn63xx;
2005 struct cvmx_ipd_wqe_ptr_valid_s cn63xxp1; 956 struct cvmx_ipd_wqe_ptr_valid_s cn63xxp1;
2006 struct cvmx_ipd_wqe_ptr_valid_s cn66xx;
2007 struct cvmx_ipd_wqe_ptr_valid_s cnf71xx;
2008}; 957};
2009 958
2010#endif 959#endif
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-19 09:26:52 -0400