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Diffstat (limited to 'arch/mips/include/asm/mach-db1x00/db1200.h')
-rw-r--r--arch/mips/include/asm/mach-db1x00/db1200.h13
1 files changed, 4 insertions, 9 deletions
diff --git a/arch/mips/include/asm/mach-db1x00/db1200.h b/arch/mips/include/asm/mach-db1x00/db1200.h
index b2a8319521e..3404248f509 100644
--- a/arch/mips/include/asm/mach-db1x00/db1200.h
+++ b/arch/mips/include/asm/mach-db1x00/db1200.h
@@ -43,20 +43,17 @@
43#define BCSR_INT_PC1EJECT 0x0800 43#define BCSR_INT_PC1EJECT 0x0800
44#define BCSR_INT_SD0INSERT 0x1000 44#define BCSR_INT_SD0INSERT 0x1000
45#define BCSR_INT_SD0EJECT 0x2000 45#define BCSR_INT_SD0EJECT 0x2000
46#define BCSR_INT_SD1INSERT 0x4000
47#define BCSR_INT_SD1EJECT 0x8000
48 46
47#define IDE_PHYS_ADDR 0x18800000
49#define IDE_REG_SHIFT 5 48#define IDE_REG_SHIFT 5
49#define IDE_DDMA_REQ DSCR_CMD0_DMA_REQ1
50#define IDE_RQSIZE 128
50 51
51#define DB1200_IDE_PHYS_ADDR 0x18800000 52#define DB1200_IDE_PHYS_ADDR IDE_PHYS_ADDR
52#define DB1200_IDE_PHYS_LEN (16 << IDE_REG_SHIFT) 53#define DB1200_IDE_PHYS_LEN (16 << IDE_REG_SHIFT)
53#define DB1200_ETH_PHYS_ADDR 0x19000300 54#define DB1200_ETH_PHYS_ADDR 0x19000300
54#define DB1200_NAND_PHYS_ADDR 0x20000000 55#define DB1200_NAND_PHYS_ADDR 0x20000000
55 56
56#define PB1200_IDE_PHYS_ADDR 0x0C800000
57#define PB1200_ETH_PHYS_ADDR 0x0D000300
58#define PB1200_NAND_PHYS_ADDR 0x1C000000
59
60/* 57/*
61 * External Interrupts for DBAu1200 as of 8/6/2004. 58 * External Interrupts for DBAu1200 as of 8/6/2004.
62 * Bit positions in the CPLD registers can be calculated by taking 59 * Bit positions in the CPLD registers can be calculated by taking
@@ -82,8 +79,6 @@ enum external_db1200_ints {
82 DB1200_PC1_EJECT_INT, 79 DB1200_PC1_EJECT_INT,
83 DB1200_SD0_INSERT_INT, 80 DB1200_SD0_INSERT_INT,
84 DB1200_SD0_EJECT_INT, 81 DB1200_SD0_EJECT_INT,
85 PB1200_SD1_INSERT_INT,
86 PB1200_SD1_EJECT_INT,
87 82
88 DB1200_INT_END = DB1200_INT_BEGIN + 15, 83 DB1200_INT_END = DB1200_INT_BEGIN + 15,
89}; 84};