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-rw-r--r--arch/mips/alchemy/gpr/board_setup.c12
-rw-r--r--arch/mips/alchemy/gpr/platform.c47
2 files changed, 47 insertions, 12 deletions
diff --git a/arch/mips/alchemy/gpr/board_setup.c b/arch/mips/alchemy/gpr/board_setup.c
index 5f8f0691ed2..dea45c78fdc 100644
--- a/arch/mips/alchemy/gpr/board_setup.c
+++ b/arch/mips/alchemy/gpr/board_setup.c
@@ -36,10 +36,6 @@
36 36
37#include <prom.h> 37#include <prom.h>
38 38
39char irq_tab_alchemy[][5] __initdata = {
40 [0] = { -1, AU1500_PCI_INTA, AU1500_PCI_INTB, 0xff, 0xff },
41};
42
43static void gpr_reset(char *c) 39static void gpr_reset(char *c)
44{ 40{
45 /* switch System-LED to orange (red# and green# on) */ 41 /* switch System-LED to orange (red# and green# on) */
@@ -76,12 +72,4 @@ void __init board_setup(void)
76 72
77 /* Take away Reset of UMTS-card */ 73 /* Take away Reset of UMTS-card */
78 alchemy_gpio_direction_output(215, 1); 74 alchemy_gpio_direction_output(215, 1);
79
80#ifdef CONFIG_PCI
81#if defined(__MIPSEB__)
82 au_writel(0xf | (2 << 6) | (1 << 4), Au1500_PCI_CFG);
83#else
84 au_writel(0xf, Au1500_PCI_CFG);
85#endif
86#endif
87} 75}
diff --git a/arch/mips/alchemy/gpr/platform.c b/arch/mips/alchemy/gpr/platform.c
index 14b46629cfc..982ce85db60 100644
--- a/arch/mips/alchemy/gpr/platform.c
+++ b/arch/mips/alchemy/gpr/platform.c
@@ -167,6 +167,45 @@ static struct i2c_board_info gpr_i2c_info[] __initdata = {
167 } 167 }
168}; 168};
169 169
170
171
172static struct resource alchemy_pci_host_res[] = {
173 [0] = {
174 .start = AU1500_PCI_PHYS_ADDR,
175 .end = AU1500_PCI_PHYS_ADDR + 0xfff,
176 .flags = IORESOURCE_MEM,
177 },
178};
179
180static int gpr_map_pci_irq(const struct pci_dev *d, u8 slot, u8 pin)
181{
182 if ((slot == 0) && (pin == 1))
183 return AU1550_PCI_INTA;
184 else if ((slot == 0) && (pin == 2))
185 return AU1550_PCI_INTB;
186
187 return -1;
188}
189
190static struct alchemy_pci_platdata gpr_pci_pd = {
191 .board_map_irq = gpr_map_pci_irq,
192 .pci_cfg_set = PCI_CONFIG_AEN | PCI_CONFIG_R2H | PCI_CONFIG_R1H |
193 PCI_CONFIG_CH |
194#if defined(__MIPSEB__)
195 PCI_CONFIG_SIC_HWA_DAT | PCI_CONFIG_SM,
196#else
197 0,
198#endif
199};
200
201static struct platform_device gpr_pci_host_dev = {
202 .dev.platform_data = &gpr_pci_pd,
203 .name = "alchemy-pci",
204 .id = 0,
205 .num_resources = ARRAY_SIZE(alchemy_pci_host_res),
206 .resource = alchemy_pci_host_res,
207};
208
170static struct platform_device *gpr_devices[] __initdata = { 209static struct platform_device *gpr_devices[] __initdata = {
171 &gpr_wdt_device, 210 &gpr_wdt_device,
172 &gpr_mtd_device, 211 &gpr_mtd_device,
@@ -174,6 +213,14 @@ static struct platform_device *gpr_devices[] __initdata = {
174 &gpr_led_devices, 213 &gpr_led_devices,
175}; 214};
176 215
216static int __init gpr_pci_init(void)
217{
218 return platform_device_register(&gpr_pci_host_dev);
219}
220/* must be arch_initcall; MIPS PCI scans busses in a subsys_initcall */
221arch_initcall(gpr_pci_init);
222
223
177static int __init gpr_dev_init(void) 224static int __init gpr_dev_init(void)
178{ 225{
179 i2c_register_board_info(0, gpr_i2c_info, ARRAY_SIZE(gpr_i2c_info)); 226 i2c_register_board_info(0, gpr_i2c_info, ARRAY_SIZE(gpr_i2c_info));