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-rw-r--r--arch/mips/alchemy/devboards/pb1200/Makefile5
-rw-r--r--arch/mips/alchemy/devboards/pb1200/board_setup.c174
-rw-r--r--arch/mips/alchemy/devboards/pb1200/platform.c203
3 files changed, 382 insertions, 0 deletions
diff --git a/arch/mips/alchemy/devboards/pb1200/Makefile b/arch/mips/alchemy/devboards/pb1200/Makefile
new file mode 100644
index 00000000000..18c1bd53e4c
--- /dev/null
+++ b/arch/mips/alchemy/devboards/pb1200/Makefile
@@ -0,0 +1,5 @@
1#
2# Makefile for the Alchemy Semiconductor Pb1200/DBAu1200 boards.
3#
4
5obj-y := board_setup.o platform.o
diff --git a/arch/mips/alchemy/devboards/pb1200/board_setup.c b/arch/mips/alchemy/devboards/pb1200/board_setup.c
new file mode 100644
index 00000000000..6d06b07c238
--- /dev/null
+++ b/arch/mips/alchemy/devboards/pb1200/board_setup.c
@@ -0,0 +1,174 @@
1/*
2 *
3 * BRIEF MODULE DESCRIPTION
4 * Alchemy Pb1200/Db1200 board setup.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 *
11 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
12 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
13 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
14 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
15 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
16 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
17 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
18 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
19 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
20 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
21 *
22 * You should have received a copy of the GNU General Public License along
23 * with this program; if not, write to the Free Software Foundation, Inc.,
24 * 675 Mass Ave, Cambridge, MA 02139, USA.
25 */
26
27#include <linux/init.h>
28#include <linux/interrupt.h>
29#include <linux/sched.h>
30
31#include <asm/mach-au1x00/au1000.h>
32#include <asm/mach-db1x00/bcsr.h>
33
34#ifdef CONFIG_MIPS_PB1200
35#include <asm/mach-pb1x00/pb1200.h>
36#endif
37
38#ifdef CONFIG_MIPS_DB1200
39#include <asm/mach-db1x00/db1200.h>
40#define PB1200_INT_BEGIN DB1200_INT_BEGIN
41#define PB1200_INT_END DB1200_INT_END
42#endif
43
44#include <prom.h>
45
46const char *get_system_type(void)
47{
48 return "Alchemy Pb1200";
49}
50
51void __init board_setup(void)
52{
53 printk(KERN_INFO "AMD Alchemy Pb1200 Board\n");
54 bcsr_init(PB1200_BCSR_PHYS_ADDR,
55 PB1200_BCSR_PHYS_ADDR + PB1200_BCSR_HEXLED_OFS);
56
57#if 0
58 {
59 u32 pin_func;
60
61 /*
62 * Enable PSC1 SYNC for AC97. Normaly done in audio driver,
63 * but it is board specific code, so put it here.
64 */
65 pin_func = au_readl(SYS_PINFUNC);
66 au_sync();
67 pin_func |= SYS_PF_MUST_BE_SET | SYS_PF_PSC1_S1;
68 au_writel(pin_func, SYS_PINFUNC);
69
70 au_writel(0, (u32)bcsr | 0x10); /* turn off PCMCIA power */
71 au_sync();
72 }
73#endif
74
75#if defined(CONFIG_I2C_AU1550)
76 {
77 u32 freq0, clksrc;
78 u32 pin_func;
79
80 /* Select SMBus in CPLD */
81 bcsr_mod(BCSR_RESETS, BCSR_RESETS_PSC0MUX, 0);
82
83 pin_func = au_readl(SYS_PINFUNC);
84 au_sync();
85 pin_func &= ~(SYS_PINFUNC_P0A | SYS_PINFUNC_P0B);
86 /* Set GPIOs correctly */
87 pin_func |= 2 << 17;
88 au_writel(pin_func, SYS_PINFUNC);
89 au_sync();
90
91 /* The I2C driver depends on 50 MHz clock */
92 freq0 = au_readl(SYS_FREQCTRL0);
93 au_sync();
94 freq0 &= ~(SYS_FC_FRDIV1_MASK | SYS_FC_FS1 | SYS_FC_FE1);
95 freq0 |= 3 << SYS_FC_FRDIV1_BIT;
96 /* 396 MHz / (3 + 1) * 2 == 49.5 MHz */
97 au_writel(freq0, SYS_FREQCTRL0);
98 au_sync();
99 freq0 |= SYS_FC_FE1;
100 au_writel(freq0, SYS_FREQCTRL0);
101 au_sync();
102
103 clksrc = au_readl(SYS_CLKSRC);
104 au_sync();
105 clksrc &= ~(SYS_CS_CE0 | SYS_CS_DE0 | SYS_CS_ME0_MASK);
106 /* Bit 22 is EXTCLK0 for PSC0 */
107 clksrc |= SYS_CS_MUX_FQ1 << SYS_CS_ME0_BIT;
108 au_writel(clksrc, SYS_CLKSRC);
109 au_sync();
110 }
111#endif
112
113 /*
114 * The Pb1200 development board uses external MUX for PSC0 to
115 * support SMB/SPI. bcsr_resets bit 12: 0=SMB 1=SPI
116 */
117#ifdef CONFIG_I2C_AU1550
118 bcsr_mod(BCSR_RESETS, BCSR_RESETS_PSC0MUX, 0);
119#endif
120 au_sync();
121}
122
123static int __init pb1200_init_irq(void)
124{
125 /* We have a problem with CPLD rev 3. */
126 if (BCSR_WHOAMI_CPLD(bcsr_read(BCSR_WHOAMI)) <= 3) {
127 printk(KERN_ERR "WARNING!!!\n");
128 printk(KERN_ERR "WARNING!!!\n");
129 printk(KERN_ERR "WARNING!!!\n");
130 printk(KERN_ERR "WARNING!!!\n");
131 printk(KERN_ERR "WARNING!!!\n");
132 printk(KERN_ERR "WARNING!!!\n");
133 printk(KERN_ERR "Pb1200 must be at CPLD rev 4. Please have Pb1200\n");
134 printk(KERN_ERR "updated to latest revision. This software will\n");
135 printk(KERN_ERR "not work on anything less than CPLD rev 4.\n");
136 printk(KERN_ERR "WARNING!!!\n");
137 printk(KERN_ERR "WARNING!!!\n");
138 printk(KERN_ERR "WARNING!!!\n");
139 printk(KERN_ERR "WARNING!!!\n");
140 printk(KERN_ERR "WARNING!!!\n");
141 printk(KERN_ERR "WARNING!!!\n");
142 panic("Game over. Your score is 0.");
143 }
144
145 irq_set_irq_type(AU1200_GPIO7_INT, IRQF_TRIGGER_LOW);
146 bcsr_init_irq(PB1200_INT_BEGIN, PB1200_INT_END, AU1200_GPIO7_INT);
147
148 return 0;
149}
150arch_initcall(pb1200_init_irq);
151
152
153int board_au1200fb_panel(void)
154{
155 return (bcsr_read(BCSR_SWITCHES) >> 8) & 0x0f;
156}
157
158int board_au1200fb_panel_init(void)
159{
160 /* Apply power */
161 bcsr_mod(BCSR_BOARD, 0, BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD |
162 BCSR_BOARD_LCDBL);
163 /* printk(KERN_DEBUG "board_au1200fb_panel_init()\n"); */
164 return 0;
165}
166
167int board_au1200fb_panel_shutdown(void)
168{
169 /* Remove power */
170 bcsr_mod(BCSR_BOARD, BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD |
171 BCSR_BOARD_LCDBL, 0);
172 /* printk(KERN_DEBUG "board_au1200fb_panel_shutdown()\n"); */
173 return 0;
174}
diff --git a/arch/mips/alchemy/devboards/pb1200/platform.c b/arch/mips/alchemy/devboards/pb1200/platform.c
new file mode 100644
index 00000000000..3ef2dceeb79
--- /dev/null
+++ b/arch/mips/alchemy/devboards/pb1200/platform.c
@@ -0,0 +1,203 @@
1/*
2 * Pb1200/DBAu1200 board platform device registration
3 *
4 * Copyright (C) 2008 MontaVista Software Inc. <source@mvista.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 */
20
21#include <linux/dma-mapping.h>
22#include <linux/init.h>
23#include <linux/leds.h>
24#include <linux/platform_device.h>
25#include <linux/smc91x.h>
26
27#include <asm/mach-au1x00/au1xxx.h>
28#include <asm/mach-au1x00/au1100_mmc.h>
29#include <asm/mach-db1x00/bcsr.h>
30
31#include "../platform.h"
32
33static int mmc_activity;
34
35static void pb1200mmc0_set_power(void *mmc_host, int state)
36{
37 if (state)
38 bcsr_mod(BCSR_BOARD, 0, BCSR_BOARD_SD0PWR);
39 else
40 bcsr_mod(BCSR_BOARD, BCSR_BOARD_SD0PWR, 0);
41
42 msleep(1);
43}
44
45static int pb1200mmc0_card_readonly(void *mmc_host)
46{
47 return (bcsr_read(BCSR_STATUS) & BCSR_STATUS_SD0WP) ? 1 : 0;
48}
49
50static int pb1200mmc0_card_inserted(void *mmc_host)
51{
52 return (bcsr_read(BCSR_SIGSTAT) & BCSR_INT_SD0INSERT) ? 1 : 0;
53}
54
55static void pb1200_mmcled_set(struct led_classdev *led,
56 enum led_brightness brightness)
57{
58 if (brightness != LED_OFF) {
59 if (++mmc_activity == 1)
60 bcsr_mod(BCSR_LEDS, BCSR_LEDS_LED0, 0);
61 } else {
62 if (--mmc_activity == 0)
63 bcsr_mod(BCSR_LEDS, 0, BCSR_LEDS_LED0);
64 }
65}
66
67static struct led_classdev pb1200mmc_led = {
68 .brightness_set = pb1200_mmcled_set,
69};
70
71static void pb1200mmc1_set_power(void *mmc_host, int state)
72{
73 if (state)
74 bcsr_mod(BCSR_BOARD, 0, BCSR_BOARD_SD1PWR);
75 else
76 bcsr_mod(BCSR_BOARD, BCSR_BOARD_SD1PWR, 0);
77
78 msleep(1);
79}
80
81static int pb1200mmc1_card_readonly(void *mmc_host)
82{
83 return (bcsr_read(BCSR_STATUS) & BCSR_STATUS_SD1WP) ? 1 : 0;
84}
85
86static int pb1200mmc1_card_inserted(void *mmc_host)
87{
88 return (bcsr_read(BCSR_SIGSTAT) & BCSR_INT_SD1INSERT) ? 1 : 0;
89}
90
91const struct au1xmmc_platform_data au1xmmc_platdata[2] = {
92 [0] = {
93 .set_power = pb1200mmc0_set_power,
94 .card_inserted = pb1200mmc0_card_inserted,
95 .card_readonly = pb1200mmc0_card_readonly,
96 .cd_setup = NULL, /* use poll-timer in driver */
97 .led = &pb1200mmc_led,
98 },
99 [1] = {
100 .set_power = pb1200mmc1_set_power,
101 .card_inserted = pb1200mmc1_card_inserted,
102 .card_readonly = pb1200mmc1_card_readonly,
103 .cd_setup = NULL, /* use poll-timer in driver */
104 .led = &pb1200mmc_led,
105 },
106};
107
108static struct resource ide_resources[] = {
109 [0] = {
110 .start = IDE_PHYS_ADDR,
111 .end = IDE_PHYS_ADDR + IDE_PHYS_LEN - 1,
112 .flags = IORESOURCE_MEM
113 },
114 [1] = {
115 .start = IDE_INT,
116 .end = IDE_INT,
117 .flags = IORESOURCE_IRQ
118 }
119};
120
121static u64 ide_dmamask = DMA_BIT_MASK(32);
122
123static struct platform_device ide_device = {
124 .name = "au1200-ide",
125 .id = 0,
126 .dev = {
127 .dma_mask = &ide_dmamask,
128 .coherent_dma_mask = DMA_BIT_MASK(32),
129 },
130 .num_resources = ARRAY_SIZE(ide_resources),
131 .resource = ide_resources
132};
133
134static struct smc91x_platdata smc_data = {
135 .flags = SMC91X_NOWAIT | SMC91X_USE_16BIT,
136 .leda = RPC_LED_100_10,
137 .ledb = RPC_LED_TX_RX,
138};
139
140static struct resource smc91c111_resources[] = {
141 [0] = {
142 .name = "smc91x-regs",
143 .start = SMC91C111_PHYS_ADDR,
144 .end = SMC91C111_PHYS_ADDR + 0xf,
145 .flags = IORESOURCE_MEM
146 },
147 [1] = {
148 .start = SMC91C111_INT,
149 .end = SMC91C111_INT,
150 .flags = IORESOURCE_IRQ
151 },
152};
153
154static struct platform_device smc91c111_device = {
155 .dev = {
156 .platform_data = &smc_data,
157 },
158 .name = "smc91x",
159 .id = -1,
160 .num_resources = ARRAY_SIZE(smc91c111_resources),
161 .resource = smc91c111_resources
162};
163
164static struct platform_device *board_platform_devices[] __initdata = {
165 &ide_device,
166 &smc91c111_device
167};
168
169static int __init board_register_devices(void)
170{
171 int swapped;
172
173 db1x_register_pcmcia_socket(PCMCIA_ATTR_PHYS_ADDR,
174 PCMCIA_ATTR_PHYS_ADDR + 0x000400000 - 1,
175 PCMCIA_MEM_PHYS_ADDR,
176 PCMCIA_MEM_PHYS_ADDR + 0x000400000 - 1,
177 PCMCIA_IO_PHYS_ADDR,
178 PCMCIA_IO_PHYS_ADDR + 0x000010000 - 1,
179 PB1200_PC0_INT,
180 PB1200_PC0_INSERT_INT,
181 /*PB1200_PC0_STSCHG_INT*/0,
182 PB1200_PC0_EJECT_INT,
183 0);
184
185 db1x_register_pcmcia_socket(PCMCIA_ATTR_PHYS_ADDR + 0x008000000,
186 PCMCIA_ATTR_PHYS_ADDR + 0x008400000 - 1,
187 PCMCIA_MEM_PHYS_ADDR + 0x008000000,
188 PCMCIA_MEM_PHYS_ADDR + 0x008400000 - 1,
189 PCMCIA_IO_PHYS_ADDR + 0x008000000,
190 PCMCIA_IO_PHYS_ADDR + 0x008010000 - 1,
191 PB1200_PC1_INT,
192 PB1200_PC1_INSERT_INT,
193 /*PB1200_PC1_STSCHG_INT*/0,
194 PB1200_PC1_EJECT_INT,
195 1);
196
197 swapped = bcsr_read(BCSR_STATUS) & BCSR_STATUS_DB1200_SWAPBOOT;
198 db1x_register_norflash(128 * 1024 * 1024, 2, swapped);
199
200 return platform_add_devices(board_platform_devices,
201 ARRAY_SIZE(board_platform_devices));
202}
203device_initcall(board_register_devices);
generated by cgit v1.2.2 (git 2.25.0) at 2025-04-01 16:47:01 -0400