diff options
Diffstat (limited to 'arch/m68knommu/platform/5206e')
-rw-r--r-- | arch/m68knommu/platform/5206e/Makefile | 2 | ||||
-rw-r--r-- | arch/m68knommu/platform/5206e/config.c | 58 | ||||
-rw-r--r-- | arch/m68knommu/platform/5206e/gpio.c | 49 |
3 files changed, 72 insertions, 37 deletions
diff --git a/arch/m68knommu/platform/5206e/Makefile b/arch/m68knommu/platform/5206e/Makefile index a439d9ab3f2..113c3339006 100644 --- a/arch/m68knommu/platform/5206e/Makefile +++ b/arch/m68knommu/platform/5206e/Makefile | |||
@@ -14,5 +14,5 @@ | |||
14 | 14 | ||
15 | asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1 | 15 | asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1 |
16 | 16 | ||
17 | obj-y := config.o | 17 | obj-y := config.o gpio.o |
18 | 18 | ||
diff --git a/arch/m68knommu/platform/5206e/config.c b/arch/m68knommu/platform/5206e/config.c index 65887799db8..0f41ba82a3b 100644 --- a/arch/m68knommu/platform/5206e/config.c +++ b/arch/m68knommu/platform/5206e/config.c | |||
@@ -15,6 +15,7 @@ | |||
15 | #include <asm/machdep.h> | 15 | #include <asm/machdep.h> |
16 | #include <asm/coldfire.h> | 16 | #include <asm/coldfire.h> |
17 | #include <asm/mcfsim.h> | 17 | #include <asm/mcfsim.h> |
18 | #include <asm/mcfuart.h> | ||
18 | #include <asm/mcfdma.h> | 19 | #include <asm/mcfdma.h> |
19 | #include <asm/mcfuart.h> | 20 | #include <asm/mcfuart.h> |
20 | 21 | ||
@@ -49,11 +50,11 @@ static void __init m5206e_uart_init_line(int line, int irq) | |||
49 | if (line == 0) { | 50 | if (line == 0) { |
50 | writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR); | 51 | writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR); |
51 | writeb(irq, MCFUART_BASE1 + MCFUART_UIVR); | 52 | writeb(irq, MCFUART_BASE1 + MCFUART_UIVR); |
52 | mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_UART1); | 53 | mcf_mapirq2imr(irq, MCFINTC_UART0); |
53 | } else if (line == 1) { | 54 | } else if (line == 1) { |
54 | writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR); | 55 | writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR); |
55 | writeb(irq, MCFUART_BASE2 + MCFUART_UIVR); | 56 | writeb(irq, MCFUART_BASE2 + MCFUART_UIVR); |
56 | mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_UART2); | 57 | mcf_mapirq2imr(irq, MCFINTC_UART1); |
57 | } | 58 | } |
58 | } | 59 | } |
59 | 60 | ||
@@ -68,38 +69,19 @@ static void __init m5206e_uarts_init(void) | |||
68 | 69 | ||
69 | /***************************************************************************/ | 70 | /***************************************************************************/ |
70 | 71 | ||
71 | void mcf_autovector(unsigned int vec) | 72 | static void __init m5206e_timers_init(void) |
72 | { | ||
73 | volatile unsigned char *mbar; | ||
74 | unsigned char icr; | ||
75 | |||
76 | if ((vec >= 25) && (vec <= 31)) { | ||
77 | vec -= 25; | ||
78 | mbar = (volatile unsigned char *) MCF_MBAR; | ||
79 | icr = MCFSIM_ICR_AUTOVEC | (vec << 3); | ||
80 | *(mbar + MCFSIM_ICR1 + vec) = icr; | ||
81 | vec = 0x1 << (vec + 1); | ||
82 | mcf_setimr(mcf_getimr() & ~vec); | ||
83 | } | ||
84 | } | ||
85 | |||
86 | /***************************************************************************/ | ||
87 | |||
88 | void mcf_settimericr(unsigned int timer, unsigned int level) | ||
89 | { | 73 | { |
90 | volatile unsigned char *icrp; | 74 | /* Timer1 is always used as system timer */ |
91 | unsigned int icr, imr; | 75 | writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI3, |
92 | 76 | MCF_MBAR + MCFSIM_TIMER1ICR); | |
93 | if (timer <= 2) { | 77 | mcf_mapirq2imr(MCF_IRQ_TIMER, MCFINTC_TIMER1); |
94 | switch (timer) { | 78 | |
95 | case 2: icr = MCFSIM_TIMER2ICR; imr = MCFSIM_IMR_TIMER2; break; | 79 | #ifdef CONFIG_HIGHPROFILE |
96 | default: icr = MCFSIM_TIMER1ICR; imr = MCFSIM_IMR_TIMER1; break; | 80 | /* Timer2 is to be used as a high speed profile timer */ |
97 | } | 81 | writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL7 | MCFSIM_ICR_PRI3, |
98 | 82 | MCF_MBAR + MCFSIM_TIMER2ICR); | |
99 | icrp = (volatile unsigned char *) (MCF_MBAR + icr); | 83 | mcf_mapirq2imr(MCF_IRQ_PROFILER, MCFINTC_TIMER2); |
100 | *icrp = MCFSIM_ICR_AUTOVEC | (level << 2) | MCFSIM_ICR_PRI3; | 84 | #endif |
101 | mcf_setimr(mcf_getimr() & ~imr); | ||
102 | } | ||
103 | } | 85 | } |
104 | 86 | ||
105 | /***************************************************************************/ | 87 | /***************************************************************************/ |
@@ -117,8 +99,6 @@ void m5206e_cpu_reset(void) | |||
117 | 99 | ||
118 | void __init config_BSP(char *commandp, int size) | 100 | void __init config_BSP(char *commandp, int size) |
119 | { | 101 | { |
120 | mcf_setimr(MCFSIM_IMR_MASKALL); | ||
121 | |||
122 | #if defined(CONFIG_NETtel) | 102 | #if defined(CONFIG_NETtel) |
123 | /* Copy command line from FLASH to local buffer... */ | 103 | /* Copy command line from FLASH to local buffer... */ |
124 | memcpy(commandp, (char *) 0xf0004000, size); | 104 | memcpy(commandp, (char *) 0xf0004000, size); |
@@ -126,13 +106,19 @@ void __init config_BSP(char *commandp, int size) | |||
126 | #endif /* CONFIG_NETtel */ | 106 | #endif /* CONFIG_NETtel */ |
127 | 107 | ||
128 | mach_reset = m5206e_cpu_reset; | 108 | mach_reset = m5206e_cpu_reset; |
109 | m5206e_timers_init(); | ||
110 | m5206e_uarts_init(); | ||
111 | |||
112 | /* Only support the external interrupts on their primary level */ | ||
113 | mcf_mapirq2imr(25, MCFINTC_EINT1); | ||
114 | mcf_mapirq2imr(28, MCFINTC_EINT4); | ||
115 | mcf_mapirq2imr(31, MCFINTC_EINT7); | ||
129 | } | 116 | } |
130 | 117 | ||
131 | /***************************************************************************/ | 118 | /***************************************************************************/ |
132 | 119 | ||
133 | static int __init init_BSP(void) | 120 | static int __init init_BSP(void) |
134 | { | 121 | { |
135 | m5206e_uarts_init(); | ||
136 | platform_add_devices(m5206e_devices, ARRAY_SIZE(m5206e_devices)); | 122 | platform_add_devices(m5206e_devices, ARRAY_SIZE(m5206e_devices)); |
137 | return 0; | 123 | return 0; |
138 | } | 124 | } |
diff --git a/arch/m68knommu/platform/5206e/gpio.c b/arch/m68knommu/platform/5206e/gpio.c new file mode 100644 index 00000000000..60f779ce165 --- /dev/null +++ b/arch/m68knommu/platform/5206e/gpio.c | |||
@@ -0,0 +1,49 @@ | |||
1 | /* | ||
2 | * Coldfire generic GPIO support | ||
3 | * | ||
4 | * (C) Copyright 2009, Steven King <sfking@fdwdc.com> | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; version 2 of the License. | ||
9 | * | ||
10 | * This program is distributed in the hope that it will be useful, | ||
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
13 | * GNU General Public License for more details. | ||
14 | */ | ||
15 | |||
16 | #include <linux/kernel.h> | ||
17 | #include <linux/init.h> | ||
18 | |||
19 | #include <asm/coldfire.h> | ||
20 | #include <asm/mcfsim.h> | ||
21 | #include <asm/mcfgpio.h> | ||
22 | |||
23 | static struct mcf_gpio_chip mcf_gpio_chips[] = { | ||
24 | { | ||
25 | .gpio_chip = { | ||
26 | .label = "PP", | ||
27 | .request = mcf_gpio_request, | ||
28 | .free = mcf_gpio_free, | ||
29 | .direction_input = mcf_gpio_direction_input, | ||
30 | .direction_output = mcf_gpio_direction_output, | ||
31 | .get = mcf_gpio_get_value, | ||
32 | .set = mcf_gpio_set_value, | ||
33 | .ngpio = 8, | ||
34 | }, | ||
35 | .pddr = MCFSIM_PADDR, | ||
36 | .podr = MCFSIM_PADAT, | ||
37 | .ppdr = MCFSIM_PADAT, | ||
38 | }, | ||
39 | }; | ||
40 | |||
41 | static int __init mcf_gpio_init(void) | ||
42 | { | ||
43 | unsigned i = 0; | ||
44 | while (i < ARRAY_SIZE(mcf_gpio_chips)) | ||
45 | (void)gpiochip_add((struct gpio_chip *)&mcf_gpio_chips[i++]); | ||
46 | return 0; | ||
47 | } | ||
48 | |||
49 | core_initcall(mcf_gpio_init); | ||