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Diffstat (limited to 'arch/m68k/include/asm/cacheflush_no.h')
-rw-r--r--arch/m68k/include/asm/cacheflush_no.h38
1 files changed, 34 insertions, 4 deletions
diff --git a/arch/m68k/include/asm/cacheflush_no.h b/arch/m68k/include/asm/cacheflush_no.h
index f931e182983..cb88aa96c4f 100644
--- a/arch/m68k/include/asm/cacheflush_no.h
+++ b/arch/m68k/include/asm/cacheflush_no.h
@@ -12,14 +12,12 @@
12#define flush_cache_dup_mm(mm) do { } while (0) 12#define flush_cache_dup_mm(mm) do { } while (0)
13#define flush_cache_range(vma, start, end) do { } while (0) 13#define flush_cache_range(vma, start, end) do { } while (0)
14#define flush_cache_page(vma, vmaddr) do { } while (0) 14#define flush_cache_page(vma, vmaddr) do { } while (0)
15#ifndef flush_dcache_range 15#define flush_dcache_range(start, len) __flush_dcache_all()
16#define flush_dcache_range(start,len) __flush_cache_all()
17#endif
18#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 0 16#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 0
19#define flush_dcache_page(page) do { } while (0) 17#define flush_dcache_page(page) do { } while (0)
20#define flush_dcache_mmap_lock(mapping) do { } while (0) 18#define flush_dcache_mmap_lock(mapping) do { } while (0)
21#define flush_dcache_mmap_unlock(mapping) do { } while (0) 19#define flush_dcache_mmap_unlock(mapping) do { } while (0)
22#define flush_icache_range(start,len) __flush_cache_all() 20#define flush_icache_range(start, len) __flush_icache_all()
23#define flush_icache_page(vma,pg) do { } while (0) 21#define flush_icache_page(vma,pg) do { } while (0)
24#define flush_icache_user_range(vma,pg,adr,len) do { } while (0) 22#define flush_icache_user_range(vma,pg,adr,len) do { } while (0)
25#define flush_cache_vmap(start, end) do { } while (0) 23#define flush_cache_vmap(start, end) do { } while (0)
@@ -46,4 +44,36 @@ static inline void __flush_cache_all(void)
46#endif 44#endif
47} 45}
48 46
47/*
48 * Some ColdFire parts implement separate instruction and data caches,
49 * on those we should just flush the appropriate cache. If we don't need
50 * to do any specific flushing then this will be optimized away.
51 */
52static inline void __flush_icache_all(void)
53{
54#ifdef CACHE_INVALIDATEI
55 __asm__ __volatile__ (
56 "movel %0, %%d0\n\t"
57 "movec %%d0, %%CACR\n\t"
58 "nop\n\t"
59 : : "i" (CACHE_INVALIDATEI) : "d0" );
60#endif
61}
62
63static inline void __flush_dcache_all(void)
64{
65#ifdef CACHE_PUSH
66 mcf_cache_push();
67#endif
68#ifdef CACHE_INVALIDATED
69 __asm__ __volatile__ (
70 "movel %0, %%d0\n\t"
71 "movec %%d0, %%CACR\n\t"
72 "nop\n\t"
73 : : "i" (CACHE_INVALIDATED) : "d0" );
74#else
75 /* Flush the wrtite buffer */
76 __asm__ __volatile__ ( "nop" );
77#endif
78}
49#endif /* _M68KNOMMU_CACHEFLUSH_H */ 79#endif /* _M68KNOMMU_CACHEFLUSH_H */