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Diffstat (limited to 'arch/m32r/platforms/m32104ut/setup.c')
-rw-r--r--arch/m32r/platforms/m32104ut/setup.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/m32r/platforms/m32104ut/setup.c b/arch/m32r/platforms/m32104ut/setup.c
index 4a693d02c1e..34671d32cef 100644
--- a/arch/m32r/platforms/m32104ut/setup.c
+++ b/arch/m32r/platforms/m32104ut/setup.c
@@ -76,7 +76,7 @@ void __init init_IRQ(void)
76 76
77#if defined(CONFIG_SMC91X) 77#if defined(CONFIG_SMC91X)
78 /* INT#0: LAN controller on M32104UT-LAN (SMC91C111)*/ 78 /* INT#0: LAN controller on M32104UT-LAN (SMC91C111)*/
79 set_irq_chip_and_handler(M32R_IRQ_INT0, &m32104ut_irq_type, 79 irq_set_chip_and_handler(M32R_IRQ_INT0, &m32104ut_irq_type,
80 handle_level_irq); 80 handle_level_irq);
81 /* "H" level sense */ 81 /* "H" level sense */
82 cu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD11; 82 cu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD11;
@@ -84,20 +84,20 @@ void __init init_IRQ(void)
84#endif /* CONFIG_SMC91X */ 84#endif /* CONFIG_SMC91X */
85 85
86 /* MFT2 : system timer */ 86 /* MFT2 : system timer */
87 set_irq_chip_and_handler(M32R_IRQ_MFT2, &m32104ut_irq_type, 87 irq_set_chip_and_handler(M32R_IRQ_MFT2, &m32104ut_irq_type,
88 handle_level_irq); 88 handle_level_irq);
89 icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN; 89 icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
90 disable_m32104ut_irq(M32R_IRQ_MFT2); 90 disable_m32104ut_irq(M32R_IRQ_MFT2);
91 91
92#ifdef CONFIG_SERIAL_M32R_SIO 92#ifdef CONFIG_SERIAL_M32R_SIO
93 /* SIO0_R : uart receive data */ 93 /* SIO0_R : uart receive data */
94 set_irq_chip_and_handler(M32R_IRQ_SIO0_R, &m32104ut_irq_type, 94 irq_set_chip_and_handler(M32R_IRQ_SIO0_R, &m32104ut_irq_type,
95 handle_level_irq); 95 handle_level_irq);
96 icu_data[M32R_IRQ_SIO0_R].icucr = M32R_ICUCR_IEN; 96 icu_data[M32R_IRQ_SIO0_R].icucr = M32R_ICUCR_IEN;
97 disable_m32104ut_irq(M32R_IRQ_SIO0_R); 97 disable_m32104ut_irq(M32R_IRQ_SIO0_R);
98 98
99 /* SIO0_S : uart send data */ 99 /* SIO0_S : uart send data */
100 set_irq_chip_and_handler(M32R_IRQ_SIO0_S, &m32104ut_irq_type, 100 irq_set_chip_and_handler(M32R_IRQ_SIO0_S, &m32104ut_irq_type,
101 handle_level_irq); 101 handle_level_irq);
102 icu_data[M32R_IRQ_SIO0_S].icucr = M32R_ICUCR_IEN; 102 icu_data[M32R_IRQ_SIO0_S].icucr = M32R_ICUCR_IEN;
103 disable_m32104ut_irq(M32R_IRQ_SIO0_S); 103 disable_m32104ut_irq(M32R_IRQ_SIO0_S);