1 files changed, 16 insertions, 16 deletions

diff --git a/arch/ia64/sn/pci/tioca_provider.c b/arch/ia64/sn/pci/tioca_provider.c
index 19bced34d5f..46b646a6d34 100644
--- a/arch/ia64/sn/pci/tioca_provider.c
+++ b/arch/ia64/sn/pci/tioca_provider.c
@@ -11,6 +11,7 @@
 #include <linux/pci.h>
 #include <asm/sn/sn_sal.h>
 #include <asm/sn/addrs.h>
+#include <asm/sn/io.h>
 #include <asm/sn/pcidev.h>
 #include <asm/sn/pcibus_provider_defs.h>
 #include <asm/sn/tioca_provider.h>
@@ -37,7 +38,7 @@ tioca_gart_init(struct tioca_kernel *tioca_kern)
         uint64_t offset;
         struct page *tmp;
         struct tioca_common *tioca_common;
-        volatile struct tioca *ca_base;
+        struct tioca *ca_base;
 
         tioca_common = tioca_kern->ca_common;
         ca_base = (struct tioca *)tioca_common->ca_common.bs_base;
@@ -174,27 +175,29 @@ tioca_gart_init(struct tioca_kernel *tioca_kern)
          *      DISABLE GART PREFETCHING due to hw bug tracked in SGI PV930029
          */
 
-        ca_base->ca_control1 |= CA_AGPDMA_OP_ENB_COMBDELAY;     /* PV895469 ? */
-        ca_base->ca_control2 &= ~(CA_GART_MEM_PARAM);
-        ca_base->ca_control2 |= (0x2ull << CA_GART_MEM_PARAM_SHFT);
+        __sn_setq_relaxed(&ca_base->ca_control1,
+                        CA_AGPDMA_OP_ENB_COMBDELAY);    /* PV895469 ? */
+        __sn_clrq_relaxed(&ca_base->ca_control2, CA_GART_MEM_PARAM);
+        __sn_setq_relaxed(&ca_base->ca_control2,
+                        (0x2ull << CA_GART_MEM_PARAM_SHFT));
         tioca_kern->ca_gart_iscoherent = 1;
-        ca_base->ca_control2 &=
-            ~(CA_GART_WR_PREFETCH_ENB | CA_GART_RD_PREFETCH_ENB);
+        __sn_clrq_relaxed(&ca_base->ca_control2,
+                        (CA_GART_WR_PREFETCH_ENB | CA_GART_RD_PREFETCH_ENB));
 
         /*
          * Unmask GART fetch error interrupts.  Clear residual errors first.
          */
 
-        ca_base->ca_int_status_alias = CA_GART_FETCH_ERR;
-        ca_base->ca_mult_error_alias = CA_GART_FETCH_ERR;
-        ca_base->ca_int_mask &= ~CA_GART_FETCH_ERR;
+        writeq(CA_GART_FETCH_ERR, &ca_base->ca_int_status_alias);
+        writeq(CA_GART_FETCH_ERR, &ca_base->ca_mult_error_alias);
+        __sn_clrq_relaxed(&ca_base->ca_int_mask, CA_GART_FETCH_ERR);
 
         /*
          * Program the aperature and gart registers in TIOCA
          */
 
-        ca_base->ca_gart_aperature = ap_reg;
-        ca_base->ca_gart_ptr_table = tioca_kern->ca_gart_coretalk_addr | 1;
+        writeq(ap_reg, &ca_base->ca_gart_aperature);
+        writeq(tioca_kern->ca_gart_coretalk_addr|1, &ca_base->ca_gart_ptr_table);
 
         return 0;
 }
@@ -211,7 +214,6 @@ void
 tioca_fastwrite_enable(struct tioca_kernel *tioca_kern)
 {
         int cap_ptr;
-        uint64_t ca_control1;
         uint32_t reg;
         struct tioca *tioca_base;
         struct pci_dev *pdev;
@@ -256,9 +258,7 @@ tioca_fastwrite_enable(struct tioca_kernel *tioca_kern)
          */
 
         tioca_base = (struct tioca *)common->ca_common.bs_base;
-        ca_control1 = tioca_base->ca_control1;
-        ca_control1 |= CA_AGP_FW_ENABLE;
-        tioca_base->ca_control1 = ca_control1;
+        __sn_setq_relaxed(&tioca_base->ca_control1, CA_AGP_FW_ENABLE);
 }
 
 EXPORT_SYMBOL(tioca_fastwrite_enable);  /* used by agp-sgi */
@@ -345,7 +345,7 @@ tioca_dma_d48(struct pci_dev *pdev, uint64_t paddr)
                 return 0;
         }
 
-        agp_dma_extn = ca_base->ca_agp_dma_addr_extn;
+        agp_dma_extn = __sn_readq_relaxed(&ca_base->ca_agp_dma_addr_extn);
         if (node_upper != (agp_dma_extn >> CA_AGP_DMA_NODE_ID_SHFT)) {
                 printk(KERN_ERR "%s:  coretalk upper node (%u) "
                        "mismatch with ca_agp_dma_addr_extn (%lu)\n",