aboutsummaryrefslogtreecommitdiffstats
path: root/arch/hexagon/kernel/time.c
diff options
context:
space:
mode:
Diffstat (limited to 'arch/hexagon/kernel/time.c')
-rw-r--r--arch/hexagon/kernel/time.c249
1 files changed, 0 insertions, 249 deletions
diff --git a/arch/hexagon/kernel/time.c b/arch/hexagon/kernel/time.c
deleted file mode 100644
index 9903fad997f..00000000000
--- a/arch/hexagon/kernel/time.c
+++ /dev/null
@@ -1,249 +0,0 @@
1/*
2 * Time related functions for Hexagon architecture
3 *
4 * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 and
8 * only version 2 as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
18 * 02110-1301, USA.
19 */
20
21#include <linux/init.h>
22#include <linux/clockchips.h>
23#include <linux/clocksource.h>
24#include <linux/interrupt.h>
25#include <linux/err.h>
26#include <linux/platform_device.h>
27#include <linux/ioport.h>
28#include <linux/of.h>
29#include <linux/of_address.h>
30#include <linux/of_irq.h>
31#include <linux/module.h>
32
33#include <asm/timer-regs.h>
34#include <asm/hexagon_vm.h>
35
36/*
37 * For the clocksource we need:
38 * pcycle frequency (600MHz)
39 * For the loops_per_jiffy we need:
40 * thread/cpu frequency (100MHz)
41 * And for the timer, we need:
42 * sleep clock rate
43 */
44
45cycles_t pcycle_freq_mhz;
46cycles_t thread_freq_mhz;
47cycles_t sleep_clk_freq;
48
49static struct resource rtos_timer_resources[] = {
50 {
51 .start = RTOS_TIMER_REGS_ADDR,
52 .end = RTOS_TIMER_REGS_ADDR+PAGE_SIZE-1,
53 .flags = IORESOURCE_MEM,
54 },
55};
56
57static struct platform_device rtos_timer_device = {
58 .name = "rtos_timer",
59 .id = -1,
60 .num_resources = ARRAY_SIZE(rtos_timer_resources),
61 .resource = rtos_timer_resources,
62};
63
64/* A lot of this stuff should move into a platform specific section. */
65struct adsp_hw_timer_struct {
66 u32 match; /* Match value */
67 u32 count;
68 u32 enable; /* [1] - CLR_ON_MATCH_EN, [0] - EN */
69 u32 clear; /* one-shot register that clears the count */
70};
71
72/* Look for "TCX0" for related constants. */
73static __iomem struct adsp_hw_timer_struct *rtos_timer;
74
75static cycle_t timer_get_cycles(struct clocksource *cs)
76{
77 return (cycle_t) __vmgettime();
78}
79
80static struct clocksource hexagon_clocksource = {
81 .name = "pcycles",
82 .rating = 250,
83 .read = timer_get_cycles,
84 .mask = CLOCKSOURCE_MASK(64),
85 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
86};
87
88static int set_next_event(unsigned long delta, struct clock_event_device *evt)
89{
90 /* Assuming the timer will be disabled when we enter here. */
91
92 iowrite32(1, &rtos_timer->clear);
93 iowrite32(0, &rtos_timer->clear);
94
95 iowrite32(delta, &rtos_timer->match);
96 iowrite32(1 << TIMER_ENABLE, &rtos_timer->enable);
97 return 0;
98}
99
100/*
101 * Sets the mode (periodic, shutdown, oneshot, etc) of a timer.
102 */
103static void set_mode(enum clock_event_mode mode,
104 struct clock_event_device *evt)
105{
106 switch (mode) {
107 case CLOCK_EVT_MODE_SHUTDOWN:
108 /* XXX implement me */
109 default:
110 break;
111 }
112}
113
114#ifdef CONFIG_SMP
115/* Broadcast mechanism */
116static void broadcast(const struct cpumask *mask)
117{
118 send_ipi(mask, IPI_TIMER);
119}
120#endif
121
122static struct clock_event_device hexagon_clockevent_dev = {
123 .name = "clockevent",
124 .features = CLOCK_EVT_FEAT_ONESHOT,
125 .rating = 400,
126 .irq = RTOS_TIMER_INT,
127 .set_next_event = set_next_event,
128 .set_mode = set_mode,
129#ifdef CONFIG_SMP
130 .broadcast = broadcast,
131#endif
132};
133
134#ifdef CONFIG_SMP
135static DEFINE_PER_CPU(struct clock_event_device, clock_events);
136
137void setup_percpu_clockdev(void)
138{
139 int cpu = smp_processor_id();
140 struct clock_event_device *ce_dev = &hexagon_clockevent_dev;
141 struct clock_event_device *dummy_clock_dev =
142 &per_cpu(clock_events, cpu);
143
144 memcpy(dummy_clock_dev, ce_dev, sizeof(*dummy_clock_dev));
145 INIT_LIST_HEAD(&dummy_clock_dev->list);
146
147 dummy_clock_dev->features = CLOCK_EVT_FEAT_DUMMY;
148 dummy_clock_dev->cpumask = cpumask_of(cpu);
149 dummy_clock_dev->mode = CLOCK_EVT_MODE_UNUSED;
150
151 clockevents_register_device(dummy_clock_dev);
152}
153
154/* Called from smp.c for each CPU's timer ipi call */
155void ipi_timer(void)
156{
157 int cpu = smp_processor_id();
158 struct clock_event_device *ce_dev = &per_cpu(clock_events, cpu);
159
160 ce_dev->event_handler(ce_dev);
161}
162#endif /* CONFIG_SMP */
163
164static irqreturn_t timer_interrupt(int irq, void *devid)
165{
166 struct clock_event_device *ce_dev = &hexagon_clockevent_dev;
167
168 iowrite32(0, &rtos_timer->enable);
169 ce_dev->event_handler(ce_dev);
170
171 return IRQ_HANDLED;
172}
173
174/* This should also be pulled from devtree */
175static struct irqaction rtos_timer_intdesc = {
176 .handler = timer_interrupt,
177 .flags = IRQF_TIMER | IRQF_TRIGGER_RISING,
178 .name = "rtos_timer"
179};
180
181/*
182 * time_init_deferred - called by start_kernel to set up timer/clock source
183 *
184 * Install the IRQ handler for the clock, setup timers.
185 * This is done late, as that way, we can use ioremap().
186 *
187 * This runs just before the delay loop is calibrated, and
188 * is used for delay calibration.
189 */
190void __init time_init_deferred(void)
191{
192 struct resource *resource = NULL;
193 struct clock_event_device *ce_dev = &hexagon_clockevent_dev;
194 struct device_node *dn;
195 struct resource r;
196 int err;
197
198 ce_dev->cpumask = cpu_all_mask;
199
200 if (!resource)
201 resource = rtos_timer_device.resource;
202
203 /* ioremap here means this has to run later, after paging init */
204 rtos_timer = ioremap(resource->start, resource_size(resource));
205
206 if (!rtos_timer) {
207 release_mem_region(resource->start, resource_size(resource));
208 }
209 clocksource_register_khz(&hexagon_clocksource, pcycle_freq_mhz * 1000);
210
211 /* Note: the sim generic RTOS clock is apparently really 18750Hz */
212
213 /*
214 * Last arg is some guaranteed seconds for which the conversion will
215 * work without overflow.
216 */
217 clockevents_calc_mult_shift(ce_dev, sleep_clk_freq, 4);
218
219 ce_dev->max_delta_ns = clockevent_delta2ns(0x7fffffff, ce_dev);
220 ce_dev->min_delta_ns = clockevent_delta2ns(0xf, ce_dev);
221
222#ifdef CONFIG_SMP
223 setup_percpu_clockdev();
224#endif
225
226 clockevents_register_device(ce_dev);
227 setup_irq(ce_dev->irq, &rtos_timer_intdesc);
228}
229
230void __init time_init(void)
231{
232 late_time_init = time_init_deferred;
233}
234
235/*
236 * This could become parametric or perhaps even computed at run-time,
237 * but for now we take the observed simulator jitter.
238 */
239static long long fudgefactor = 350; /* Maybe lower if kernel optimized. */
240
241void __udelay(unsigned long usecs)
242{
243 unsigned long long start = __vmgettime();
244 unsigned long long finish = (pcycle_freq_mhz * usecs) - fudgefactor;
245
246 while ((__vmgettime() - start) < finish)
247 cpu_relax(); /* not sure how this improves readability */
248}
249EXPORT_SYMBOL(__udelay);
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-05 21:28:53 -0500