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-rw-r--r--arch/blackfin/mach-common/cache.S15
1 files changed, 4 insertions, 11 deletions
diff --git a/arch/blackfin/mach-common/cache.S b/arch/blackfin/mach-common/cache.S
index ea540318a22..790c767ca95 100644
--- a/arch/blackfin/mach-common/cache.S
+++ b/arch/blackfin/mach-common/cache.S
@@ -11,7 +11,11 @@
11#include <asm/cache.h> 11#include <asm/cache.h>
12#include <asm/page.h> 12#include <asm/page.h>
13 13
14#ifdef CONFIG_CACHE_FLUSH_L1
15.section .l1.text
16#else
14.text 17.text
18#endif
15 19
16/* 05000443 - IFLUSH cannot be last instruction in hardware loop */ 20/* 05000443 - IFLUSH cannot be last instruction in hardware loop */
17#if ANOMALY_05000443 21#if ANOMALY_05000443
@@ -64,17 +68,6 @@
64 68
65/* Invalidate all instruction cache lines assocoiated with this memory area */ 69/* Invalidate all instruction cache lines assocoiated with this memory area */
66ENTRY(_blackfin_icache_flush_range) 70ENTRY(_blackfin_icache_flush_range)
67/*
68 * Walkaround to avoid loading wrong instruction after invalidating icache
69 * and following sequence is met.
70 *
71 * 1) One instruction address is cached in the instruction cache.
72 * 2) This instruction in SDRAM is changed.
73 * 3) IFLASH[P0] is executed only once in blackfin_icache_flush_range().
74 * 4) This instruction is executed again, but the old one is loaded.
75 */
76 P0 = R0;
77 IFLUSH[P0];
78 do_flush IFLUSH 71 do_flush IFLUSH
79ENDPROC(_blackfin_icache_flush_range) 72ENDPROC(_blackfin_icache_flush_range)
80 73