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-rw-r--r--arch/blackfin/mach-bf561/head.S16
1 files changed, 8 insertions, 8 deletions
diff --git a/arch/blackfin/mach-bf561/head.S b/arch/blackfin/mach-bf561/head.S
index 96a3d456fb6..279e2e812a2 100644
--- a/arch/blackfin/mach-bf561/head.S
+++ b/arch/blackfin/mach-bf561/head.S
@@ -139,26 +139,26 @@ ENTRY(__start)
139 139
140 /* Initialise UART - when booting from u-boot, the UART is not disabled 140 /* Initialise UART - when booting from u-boot, the UART is not disabled
141 * so if we dont initalize here, our serial console gets hosed */ 141 * so if we dont initalize here, our serial console gets hosed */
142 p0.h = hi(UART_LCR); 142 p0.h = hi(BFIN_UART_LCR);
143 p0.l = lo(UART_LCR); 143 p0.l = lo(BFIN_UART_LCR);
144 r0 = 0x0(Z); 144 r0 = 0x0(Z);
145 w[p0] = r0.L; /* To enable DLL writes */ 145 w[p0] = r0.L; /* To enable DLL writes */
146 ssync; 146 ssync;
147 147
148 p0.h = hi(UART_DLL); 148 p0.h = hi(BFIN_UART_DLL);
149 p0.l = lo(UART_DLL); 149 p0.l = lo(BFIN_UART_DLL);
150 r0 = 0x0(Z); 150 r0 = 0x0(Z);
151 w[p0] = r0.L; 151 w[p0] = r0.L;
152 ssync; 152 ssync;
153 153
154 p0.h = hi(UART_DLH); 154 p0.h = hi(BFIN_UART_DLH);
155 p0.l = lo(UART_DLH); 155 p0.l = lo(BFIN_UART_DLH);
156 r0 = 0x00(Z); 156 r0 = 0x00(Z);
157 w[p0] = r0.L; 157 w[p0] = r0.L;
158 ssync; 158 ssync;
159 159
160 p0.h = hi(UART_GCTL); 160 p0.h = hi(BFIN_UART_GCTL);
161 p0.l = lo(UART_GCTL); 161 p0.l = lo(BFIN_UART_GCTL);
162 r0 = 0x0(Z); 162 r0 = 0x0(Z);
163 w[p0] = r0.L; /* To enable UART clock */ 163 w[p0] = r0.L; /* To enable UART clock */
164 ssync; 164 ssync;