2 files changed, 2 insertions, 81 deletions
diff --git a/arch/blackfin/mach-bf527/include/mach/bfin_serial_5xx.h b/arch/blackfin/mach-bf527/include/mach/bfin_serial_5xx.h
deleted file mode 100644
index 960e08919de..00000000000
--- a/arch/blackfin/mach-bf527/include/mach/bfin_serial_5xx.h
+++ /dev/null
@@ -1,79 +0,0 @@
-/*
- * Copyright 2007-2009 Analog Devices Inc.
- *
- * Licensed under the GPL-2 or later
- */
-#include <asm/dma.h>
-#include <asm/portmux.h>
-#if defined(CONFIG_BFIN_UART0_CTSRTS) || defined(CONFIG_BFIN_UART1_CTSRTS)
-# define CONFIG_SERIAL_BFIN_CTSRTS
-# ifndef CONFIG_UART0_CTS_PIN
-#  define CONFIG_UART0_CTS_PIN -1
-# endif
-# ifndef CONFIG_UART0_RTS_PIN
-#  define CONFIG_UART0_RTS_PIN -1
-# endif
-# ifndef CONFIG_UART1_CTS_PIN
-#  define CONFIG_UART1_CTS_PIN -1
-# endif
-# ifndef CONFIG_UART1_RTS_PIN
-#  define CONFIG_UART1_RTS_PIN -1
-# endif
-#endif
-struct bfin_serial_res {
-        unsigned long uart_base_addr;
-        int uart_irq;
-        int uart_status_irq;
-#ifdef CONFIG_SERIAL_BFIN_DMA
-        unsigned int uart_tx_dma_channel;
-        unsigned int uart_rx_dma_channel;
-#endif
-#ifdef CONFIG_SERIAL_BFIN_CTSRTS
-        int uart_cts_pin;
-        int uart_rts_pin;
-#endif
-};
-struct bfin_serial_res bfin_serial_resource[] = {
-#ifdef CONFIG_SERIAL_BFIN_UART0
-        {
-         0xFFC00400,
-         IRQ_UART0_RX,
-         IRQ_UART0_ERROR,
-#ifdef CONFIG_SERIAL_BFIN_DMA
-         CH_UART0_TX,
-         CH_UART0_RX,
-#endif
-#ifdef CONFIG_SERIAL_BFIN_CTSRTS
-         CONFIG_UART0_CTS_PIN,
-         CONFIG_UART0_RTS_PIN,
-#endif
-         },
-#endif
-#ifdef CONFIG_SERIAL_BFIN_UART1
-        {
-         0xFFC02000,
-         IRQ_UART1_RX,
-         IRQ_UART1_ERROR,
-#ifdef CONFIG_SERIAL_BFIN_DMA
-         CH_UART1_TX,
-         CH_UART1_RX,
-#endif
-#ifdef CONFIG_SERIAL_BFIN_CTSRTS
-         CONFIG_UART1_CTS_PIN,
-         CONFIG_UART1_RTS_PIN,
-#endif
-         },
-#endif
-};
-#define DRIVER_NAME "bfin-uart"
-#include <asm/bfin_serial.h>
diff --git a/arch/blackfin/mach-bf527/include/mach/defBF525.h b/arch/blackfin/mach-bf527/include/mach/defBF525.h
index cc383adfdff..aab80bb1a68 100644
--- a/arch/blackfin/mach-bf527/include/mach/defBF525.h
+++ b/arch/blackfin/mach-bf527/include/mach/defBF525.h
@@ -185,8 +185,8 @@
 #define                USB_EP_NI7_TXTYPE  0xffc03bd4   /* Sets the transaction protocol and peripheral endpoint number for the Host Tx endpoint7 */
 #define            USB_EP_NI7_TXINTERVAL  0xffc03bd8   /* Sets the NAK response timeout on Endpoint7 */
 #define                USB_EP_NI7_RXTYPE  0xffc03bdc   /* Sets the transaction protocol and peripheral endpoint number for the Host Rx endpoint7 */
-#define            USB_EP_NI7_RXINTERVAL  0xffc03bf0   /* Sets the polling interval for Interrupt/Isochronous transfers or the NAK response timeout on Bulk transfers for Host Rx endpoint7 */
+#define            USB_EP_NI7_RXINTERVAL  0xffc03be0   /* Sets the polling interval for Interrupt/Isochronous transfers or the NAK response timeout on Bulk transfers for Host Rx endpoint7 */
-#define               USB_EP_NI7_TXCOUNT  0xffc03bf8   /* Number of bytes to be written to the endpoint7 Tx FIFO */
+#define               USB_EP_NI7_TXCOUNT  0xffc03be8   /* Number of bytes to be written to the endpoint7 Tx FIFO */
 #define                USB_DMA_INTERRUPT  0xffc03c00   /* Indicates pending interrupts for the DMA channels */

diff --git a/arch/blackfin/mach-bf527/include/mach/bfin_serial_5xx.h b/arch/blackfin/mach-bf527/include/mach/bfin_serial_5xx.h deleted file mode 100644 index 960e08919de..00000000000 --- a/arch/blackfin/mach-bf527/include/mach/bfin_serial_5xx.h +++ /dev/null
@@ -1,79 +0,0 @@
1	/*
2	* Copyright 2007-2009 Analog Devices Inc.
3	*
4	* Licensed under the GPL-2 or later
5	*/
6
7	#include <asm/dma.h>
8	#include <asm/portmux.h>
9
10	#if defined(CONFIG_BFIN_UART0_CTSRTS) \|\| defined(CONFIG_BFIN_UART1_CTSRTS)
11	# define CONFIG_SERIAL_BFIN_CTSRTS
12
13	# ifndef CONFIG_UART0_CTS_PIN
14	# define CONFIG_UART0_CTS_PIN -1
15	# endif
16
17	# ifndef CONFIG_UART0_RTS_PIN
18	# define CONFIG_UART0_RTS_PIN -1
19	# endif
20
21	# ifndef CONFIG_UART1_CTS_PIN
22	# define CONFIG_UART1_CTS_PIN -1
23	# endif
24
25	# ifndef CONFIG_UART1_RTS_PIN
26	# define CONFIG_UART1_RTS_PIN -1
27	# endif
28	#endif
29
30	struct bfin_serial_res {
31	unsigned long uart_base_addr;
32	int uart_irq;
33	int uart_status_irq;
34	#ifdef CONFIG_SERIAL_BFIN_DMA
35	unsigned int uart_tx_dma_channel;
36	unsigned int uart_rx_dma_channel;
37	#endif
38	#ifdef CONFIG_SERIAL_BFIN_CTSRTS
39	int uart_cts_pin;
40	int uart_rts_pin;
41	#endif
42	};
43
44	struct bfin_serial_res bfin_serial_resource[] = {
45	#ifdef CONFIG_SERIAL_BFIN_UART0
46	{
47	0xFFC00400,
48	IRQ_UART0_RX,
49	IRQ_UART0_ERROR,
50	#ifdef CONFIG_SERIAL_BFIN_DMA
51	CH_UART0_TX,
52	CH_UART0_RX,
53	#endif
54	#ifdef CONFIG_SERIAL_BFIN_CTSRTS
55	CONFIG_UART0_CTS_PIN,
56	CONFIG_UART0_RTS_PIN,
57	#endif
58	},
59	#endif
60	#ifdef CONFIG_SERIAL_BFIN_UART1
61	{
62	0xFFC02000,
63	IRQ_UART1_RX,
64	IRQ_UART1_ERROR,
65	#ifdef CONFIG_SERIAL_BFIN_DMA
66	CH_UART1_TX,
67	CH_UART1_RX,
68	#endif
69	#ifdef CONFIG_SERIAL_BFIN_CTSRTS
70	CONFIG_UART1_CTS_PIN,
71	CONFIG_UART1_RTS_PIN,
72	#endif
73	},
74	#endif
75	};
76
77	#define DRIVER_NAME "bfin-uart"
78
79	#include <asm/bfin_serial.h>


diff --git a/arch/blackfin/mach-bf527/include/mach/defBF525.h b/arch/blackfin/mach-bf527/include/mach/defBF525.h index cc383adfdff..aab80bb1a68 100644 --- a/arch/blackfin/mach-bf527/include/mach/defBF525.h +++ b/arch/blackfin/mach-bf527/include/mach/defBF525.h
@@ -185,8 +185,8 @@
185	#define USB_EP_NI7_TXTYPE 0xffc03bd4 /* Sets the transaction protocol and peripheral endpoint number for the Host Tx endpoint7 */	185	#define USB_EP_NI7_TXTYPE 0xffc03bd4 /* Sets the transaction protocol and peripheral endpoint number for the Host Tx endpoint7 */
186	#define USB_EP_NI7_TXINTERVAL 0xffc03bd8 /* Sets the NAK response timeout on Endpoint7 */	186	#define USB_EP_NI7_TXINTERVAL 0xffc03bd8 /* Sets the NAK response timeout on Endpoint7 */
187	#define USB_EP_NI7_RXTYPE 0xffc03bdc /* Sets the transaction protocol and peripheral endpoint number for the Host Rx endpoint7 */	187	#define USB_EP_NI7_RXTYPE 0xffc03bdc /* Sets the transaction protocol and peripheral endpoint number for the Host Rx endpoint7 */
188	#define USB_EP_NI7_RXINTERVAL 0xffc03bf0 /* Sets the polling interval for Interrupt/Isochronous transfers or the NAK response timeout on Bulk transfers for Host Rx endpoint7 */	188	#define USB_EP_NI7_RXINTERVAL 0xffc03be0 /* Sets the polling interval for Interrupt/Isochronous transfers or the NAK response timeout on Bulk transfers for Host Rx endpoint7 */
189	#define USB_EP_NI7_TXCOUNT 0xffc03bf8 /* Number of bytes to be written to the endpoint7 Tx FIFO */	189	#define USB_EP_NI7_TXCOUNT 0xffc03be8 /* Number of bytes to be written to the endpoint7 Tx FIFO */
190		190
191	#define USB_DMA_INTERRUPT 0xffc03c00 /* Indicates pending interrupts for the DMA channels */	191	#define USB_DMA_INTERRUPT 0xffc03c00 /* Indicates pending interrupts for the DMA channels */
192		192