1 files changed, 11 insertions, 50 deletions

diff --git a/arch/blackfin/kernel/cplb-mpu/cplbmgr.c b/arch/blackfin/kernel/cplb-mpu/cplbmgr.c
index bcdfe9b0b71..651b12773e0 100644
--- a/arch/blackfin/kernel/cplb-mpu/cplbmgr.c
+++ b/arch/blackfin/kernel/cplb-mpu/cplbmgr.c
@@ -22,6 +22,7 @@
 
 #include <asm/blackfin.h>
 #include <asm/cacheflush.h>
+#include <asm/cplb.h>
 #include <asm/cplbinit.h>
 #include <asm/mmu_context.h>
 
@@ -41,46 +42,6 @@ int nr_dcplb_miss[NR_CPUS], nr_icplb_miss[NR_CPUS];
 int nr_icplb_supv_miss[NR_CPUS], nr_dcplb_prot[NR_CPUS];
 int nr_cplb_flush[NR_CPUS];
 
-static inline void disable_dcplb(void)
-{
-        unsigned long ctrl;
-        SSYNC();
-        ctrl = bfin_read_DMEM_CONTROL();
-        ctrl &= ~ENDCPLB;
-        bfin_write_DMEM_CONTROL(ctrl);
-        SSYNC();
-}
-
-static inline void enable_dcplb(void)
-{
-        unsigned long ctrl;
-        SSYNC();
-        ctrl = bfin_read_DMEM_CONTROL();
-        ctrl |= ENDCPLB;
-        bfin_write_DMEM_CONTROL(ctrl);
-        SSYNC();
-}
-
-static inline void disable_icplb(void)
-{
-        unsigned long ctrl;
-        SSYNC();
-        ctrl = bfin_read_IMEM_CONTROL();
-        ctrl &= ~ENICPLB;
-        bfin_write_IMEM_CONTROL(ctrl);
-        SSYNC();
-}
-
-static inline void enable_icplb(void)
-{
-        unsigned long ctrl;
-        SSYNC();
-        ctrl = bfin_read_IMEM_CONTROL();
-        ctrl |= ENICPLB;
-        bfin_write_IMEM_CONTROL(ctrl);
-        SSYNC();
-}
-
 /*
  * Given the contents of the status register, return the index of the
  * CPLB that caused the fault.
@@ -198,10 +159,10 @@ static noinline int dcplb_miss(unsigned int cpu)
         dcplb_tbl[cpu][idx].addr = addr;
         dcplb_tbl[cpu][idx].data = d_data;
 
-        disable_dcplb();
+        _disable_dcplb();
         bfin_write32(DCPLB_DATA0 + idx * 4, d_data);
         bfin_write32(DCPLB_ADDR0 + idx * 4, addr);
-        enable_dcplb();
+        _enable_dcplb();
 
         return 0;
 }
@@ -288,10 +249,10 @@ static noinline int icplb_miss(unsigned int cpu)
         icplb_tbl[cpu][idx].addr = addr;
         icplb_tbl[cpu][idx].data = i_data;
 
-        disable_icplb();
+        _disable_icplb();
         bfin_write32(ICPLB_DATA0 + idx * 4, i_data);
         bfin_write32(ICPLB_ADDR0 + idx * 4, addr);
-        enable_icplb();
+        _enable_icplb();
 
         return 0;
 }
@@ -340,19 +301,19 @@ void flush_switched_cplbs(unsigned int cpu)
         nr_cplb_flush[cpu]++;
 
         local_irq_save_hw(flags);
-        disable_icplb();
+        _disable_icplb();
         for (i = first_switched_icplb; i < MAX_CPLBS; i++) {
                 icplb_tbl[cpu][i].data = 0;
                 bfin_write32(ICPLB_DATA0 + i * 4, 0);
         }
-        enable_icplb();
+        _enable_icplb();
 
-        disable_dcplb();
+        _disable_dcplb();
         for (i = first_switched_dcplb; i < MAX_CPLBS; i++) {
                 dcplb_tbl[cpu][i].data = 0;
                 bfin_write32(DCPLB_DATA0 + i * 4, 0);
         }
-        enable_dcplb();
+        _enable_dcplb();
         local_irq_restore_hw(flags);
 
 }
@@ -385,7 +346,7 @@ void set_mask_dcplbs(unsigned long *masks, unsigned int cpu)
 #endif
         }
 
-        disable_dcplb();
+        _disable_dcplb();
         for (i = first_mask_dcplb; i < first_switched_dcplb; i++) {
                 dcplb_tbl[cpu][i].addr = addr;
                 dcplb_tbl[cpu][i].data = d_data;
@@ -393,6 +354,6 @@ void set_mask_dcplbs(unsigned long *masks, unsigned int cpu)
                 bfin_write32(DCPLB_ADDR0 + i * 4, addr);
                 addr += PAGE_SIZE;
         }
-        enable_dcplb();
+        _enable_dcplb();
         local_irq_restore_hw(flags);
 }