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-rw-r--r--arch/arm/mach-u300/clock.h2
-rw-r--r--arch/arm/mach-u300/include/mach/u300-regs.h22
2 files changed, 11 insertions, 13 deletions
diff --git a/arch/arm/mach-u300/clock.h b/arch/arm/mach-u300/clock.h
index c34f3ea3017..4f50ca8f901 100644
--- a/arch/arm/mach-u300/clock.h
+++ b/arch/arm/mach-u300/clock.h
@@ -31,7 +31,7 @@ struct clk {
31 bool reset; 31 bool reset;
32 __u16 clk_val; 32 __u16 clk_val;
33 __s8 usecount; 33 __s8 usecount;
34 __u32 res_reg; 34 void __iomem * res_reg;
35 __u16 res_mask; 35 __u16 res_mask;
36 36
37 bool hw_ctrld; 37 bool hw_ctrld;
diff --git a/arch/arm/mach-u300/include/mach/u300-regs.h b/arch/arm/mach-u300/include/mach/u300-regs.h
index 8b85df4c8d8..035fdc9dbdb 100644
--- a/arch/arm/mach-u300/include/mach/u300-regs.h
+++ b/arch/arm/mach-u300/include/mach/u300-regs.h
@@ -18,6 +18,12 @@
18 * the defines are used for setting up the I/O memory mapping. 18 * the defines are used for setting up the I/O memory mapping.
19 */ 19 */
20 20
21#ifdef __ASSEMBLER__
22#define IOMEM(a) (a)
23#else
24#define IOMEM(a) (void __iomem *) a
25#endif
26
21/* NAND Flash CS0 */ 27/* NAND Flash CS0 */
22#define U300_NAND_CS0_PHYS_BASE 0x80000000 28#define U300_NAND_CS0_PHYS_BASE 0x80000000
23 29
@@ -48,13 +54,6 @@
48#endif 54#endif
49 55
50/* 56/*
51 * All the following peripherals are specified at their PHYSICAL address,
52 * so if you need to access them (in the kernel), you MUST use the macros
53 * defined in <asm/io.h> to map to the IO_ADDRESS_AHB() IO_ADDRESS_FAST()
54 * etc.
55 */
56
57/*
58 * AHB peripherals 57 * AHB peripherals
59 */ 58 */
60 59
@@ -63,11 +62,11 @@
63 62
64/* Vectored Interrupt Controller 0, servicing 32 interrupts */ 63/* Vectored Interrupt Controller 0, servicing 32 interrupts */
65#define U300_INTCON0_BASE (U300_AHB_PER_PHYS_BASE+0x1000) 64#define U300_INTCON0_BASE (U300_AHB_PER_PHYS_BASE+0x1000)
66#define U300_INTCON0_VBASE (U300_AHB_PER_VIRT_BASE+0x1000) 65#define U300_INTCON0_VBASE IOMEM(U300_AHB_PER_VIRT_BASE+0x1000)
67 66
68/* Vectored Interrupt Controller 1, servicing 32 interrupts */ 67/* Vectored Interrupt Controller 1, servicing 32 interrupts */
69#define U300_INTCON1_BASE (U300_AHB_PER_PHYS_BASE+0x2000) 68#define U300_INTCON1_BASE (U300_AHB_PER_PHYS_BASE+0x2000)
70#define U300_INTCON1_VBASE (U300_AHB_PER_VIRT_BASE+0x2000) 69#define U300_INTCON1_VBASE IOMEM(U300_AHB_PER_VIRT_BASE+0x2000)
71 70
72/* Memory Stick Pro (MSPRO) controller */ 71/* Memory Stick Pro (MSPRO) controller */
73#define U300_MSPRO_BASE (U300_AHB_PER_PHYS_BASE+0x3000) 72#define U300_MSPRO_BASE (U300_AHB_PER_PHYS_BASE+0x3000)
@@ -115,7 +114,7 @@
115 114
116/* SYSCON */ 115/* SYSCON */
117#define U300_SYSCON_BASE (U300_SLOW_PER_PHYS_BASE+0x1000) 116#define U300_SYSCON_BASE (U300_SLOW_PER_PHYS_BASE+0x1000)
118#define U300_SYSCON_VBASE (U300_SLOW_PER_VIRT_BASE+0x1000) 117#define U300_SYSCON_VBASE IOMEM(U300_SLOW_PER_VIRT_BASE+0x1000)
119 118
120/* Watchdog */ 119/* Watchdog */
121#define U300_WDOG_BASE (U300_SLOW_PER_PHYS_BASE+0x2000) 120#define U300_WDOG_BASE (U300_SLOW_PER_PHYS_BASE+0x2000)
@@ -125,7 +124,7 @@
125 124
126/* APP side special timer */ 125/* APP side special timer */
127#define U300_TIMER_APP_BASE (U300_SLOW_PER_PHYS_BASE+0x4000) 126#define U300_TIMER_APP_BASE (U300_SLOW_PER_PHYS_BASE+0x4000)
128#define U300_TIMER_APP_VBASE (U300_SLOW_PER_VIRT_BASE+0x4000) 127#define U300_TIMER_APP_VBASE IOMEM(U300_SLOW_PER_VIRT_BASE+0x4000)
129 128
130/* Keypad */ 129/* Keypad */
131#define U300_KEYPAD_BASE (U300_SLOW_PER_PHYS_BASE+0x5000) 130#define U300_KEYPAD_BASE (U300_SLOW_PER_PHYS_BASE+0x5000)
@@ -181,5 +180,4 @@
181 * Virtual accessor macros for static devices 180 * Virtual accessor macros for static devices
182 */ 181 */
183 182
184
185#endif 183#endif