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-rw-r--r--arch/arm/mach-omap1/board-fsample.c6
-rw-r--r--arch/arm/mach-omap1/board-innovator.c26
-rw-r--r--arch/arm/mach-omap1/board-perseus2.c6
-rw-r--r--arch/arm/mach-omap1/common.h1
-rw-r--r--arch/arm/mach-omap1/fpga.c2
-rw-r--r--arch/arm/mach-omap1/include/mach/omap1510.h113
-rw-r--r--arch/arm/mach-omap1/serial.c1
-rw-r--r--arch/arm/plat-omap/debug-leds.c2
-rw-r--r--arch/arm/plat-omap/fpga.h74
-rw-r--r--arch/arm/plat-omap/include/plat/fpga.h193
10 files changed, 210 insertions, 214 deletions
diff --git a/arch/arm/mach-omap1/board-fsample.c b/arch/arm/mach-omap1/board-fsample.c
index 4b6de70c47a..6f496df3d18 100644
--- a/arch/arm/mach-omap1/board-fsample.c
+++ b/arch/arm/mach-omap1/board-fsample.c
@@ -30,7 +30,7 @@
30#include <plat/tc.h> 30#include <plat/tc.h>
31#include <mach/mux.h> 31#include <mach/mux.h>
32#include <mach/flash.h> 32#include <mach/flash.h>
33#include <plat/fpga.h> 33#include <../plat-omap/fpga.h>
34#include <linux/platform_data/keypad-omap.h> 34#include <linux/platform_data/keypad-omap.h>
35 35
36#include <mach/hardware.h> 36#include <mach/hardware.h>
@@ -123,9 +123,9 @@ static struct resource smc91x_resources[] = {
123 123
124static void __init fsample_init_smc91x(void) 124static void __init fsample_init_smc91x(void)
125{ 125{
126 fpga_write(1, H2P2_DBG_FPGA_LAN_RESET); 126 __raw_writeb(1, H2P2_DBG_FPGA_LAN_RESET);
127 mdelay(50); 127 mdelay(50);
128 fpga_write(fpga_read(H2P2_DBG_FPGA_LAN_RESET) & ~1, 128 __raw_writeb(__raw_readb(H2P2_DBG_FPGA_LAN_RESET) & ~1,
129 H2P2_DBG_FPGA_LAN_RESET); 129 H2P2_DBG_FPGA_LAN_RESET);
130 mdelay(50); 130 mdelay(50);
131} 131}
diff --git a/arch/arm/mach-omap1/board-innovator.c b/arch/arm/mach-omap1/board-innovator.c
index 411cc5b14ce..c2317c9f615 100644
--- a/arch/arm/mach-omap1/board-innovator.c
+++ b/arch/arm/mach-omap1/board-innovator.c
@@ -33,7 +33,7 @@
33 33
34#include <mach/mux.h> 34#include <mach/mux.h>
35#include <mach/flash.h> 35#include <mach/flash.h>
36#include <plat/fpga.h> 36#include <../plat-omap/fpga.h>
37#include <plat/tc.h> 37#include <plat/tc.h>
38#include <linux/platform_data/keypad-omap.h> 38#include <linux/platform_data/keypad-omap.h>
39 39
@@ -215,7 +215,7 @@ static struct platform_device *innovator1510_devices[] __initdata = {
215 215
216static int innovator_get_pendown_state(void) 216static int innovator_get_pendown_state(void)
217{ 217{
218 return !(fpga_read(OMAP1510_FPGA_TOUCHSCREEN) & (1 << 5)); 218 return !(__raw_readb(OMAP1510_FPGA_TOUCHSCREEN) & (1 << 5));
219} 219}
220 220
221static const struct ads7846_platform_data innovator1510_ts_info = { 221static const struct ads7846_platform_data innovator1510_ts_info = {
@@ -279,7 +279,7 @@ static struct platform_device *innovator1610_devices[] __initdata = {
279static void __init innovator_init_smc91x(void) 279static void __init innovator_init_smc91x(void)
280{ 280{
281 if (cpu_is_omap1510()) { 281 if (cpu_is_omap1510()) {
282 fpga_write(fpga_read(OMAP1510_FPGA_RST) & ~1, 282 __raw_writeb(__raw_readb(OMAP1510_FPGA_RST) & ~1,
283 OMAP1510_FPGA_RST); 283 OMAP1510_FPGA_RST);
284 udelay(750); 284 udelay(750);
285 } else { 285 } else {
@@ -335,10 +335,10 @@ static int mmc_set_power(struct device *dev, int slot, int power_on,
335 int vdd) 335 int vdd)
336{ 336{
337 if (power_on) 337 if (power_on)
338 fpga_write(fpga_read(OMAP1510_FPGA_POWER) | (1 << 3), 338 __raw_writeb(__raw_readb(OMAP1510_FPGA_POWER) | (1 << 3),
339 OMAP1510_FPGA_POWER); 339 OMAP1510_FPGA_POWER);
340 else 340 else
341 fpga_write(fpga_read(OMAP1510_FPGA_POWER) & ~(1 << 3), 341 __raw_writeb(__raw_readb(OMAP1510_FPGA_POWER) & ~(1 << 3),
342 OMAP1510_FPGA_POWER); 342 OMAP1510_FPGA_POWER);
343 343
344 return 0; 344 return 0;
@@ -390,14 +390,14 @@ static void __init innovator_init(void)
390 omap_cfg_reg(UART3_TX); 390 omap_cfg_reg(UART3_TX);
391 omap_cfg_reg(UART3_RX); 391 omap_cfg_reg(UART3_RX);
392 392
393 reg = fpga_read(OMAP1510_FPGA_POWER); 393 reg = __raw_readb(OMAP1510_FPGA_POWER);
394 reg |= OMAP1510_FPGA_PCR_COM1_EN; 394 reg |= OMAP1510_FPGA_PCR_COM1_EN;
395 fpga_write(reg, OMAP1510_FPGA_POWER); 395 __raw_writeb(reg, OMAP1510_FPGA_POWER);
396 udelay(10); 396 udelay(10);
397 397
398 reg = fpga_read(OMAP1510_FPGA_POWER); 398 reg = __raw_readb(OMAP1510_FPGA_POWER);
399 reg |= OMAP1510_FPGA_PCR_COM2_EN; 399 reg |= OMAP1510_FPGA_PCR_COM2_EN;
400 fpga_write(reg, OMAP1510_FPGA_POWER); 400 __raw_writeb(reg, OMAP1510_FPGA_POWER);
401 udelay(10); 401 udelay(10);
402 402
403 platform_add_devices(innovator1510_devices, ARRAY_SIZE(innovator1510_devices)); 403 platform_add_devices(innovator1510_devices, ARRAY_SIZE(innovator1510_devices));
@@ -437,6 +437,7 @@ static void __init innovator_init(void)
437 */ 437 */
438static void __init innovator_map_io(void) 438static void __init innovator_map_io(void)
439{ 439{
440#ifdef CONFIG_ARCH_OMAP15XX
440 omap15xx_map_io(); 441 omap15xx_map_io();
441 442
442 iotable_init(innovator1510_io_desc, ARRAY_SIZE(innovator1510_io_desc)); 443 iotable_init(innovator1510_io_desc, ARRAY_SIZE(innovator1510_io_desc));
@@ -444,9 +445,10 @@ static void __init innovator_map_io(void)
444 445
445 /* Dump the Innovator FPGA rev early - useful info for support. */ 446 /* Dump the Innovator FPGA rev early - useful info for support. */
446 pr_debug("Innovator FPGA Rev %d.%d Board Rev %d\n", 447 pr_debug("Innovator FPGA Rev %d.%d Board Rev %d\n",
447 fpga_read(OMAP1510_FPGA_REV_HIGH), 448 __raw_readb(OMAP1510_FPGA_REV_HIGH),
448 fpga_read(OMAP1510_FPGA_REV_LOW), 449 __raw_readb(OMAP1510_FPGA_REV_LOW),
449 fpga_read(OMAP1510_FPGA_BOARD_REV)); 450 __raw_readb(OMAP1510_FPGA_BOARD_REV));
451#endif
450} 452}
451 453
452MACHINE_START(OMAP_INNOVATOR, "TI-Innovator") 454MACHINE_START(OMAP_INNOVATOR, "TI-Innovator")
diff --git a/arch/arm/mach-omap1/board-perseus2.c b/arch/arm/mach-omap1/board-perseus2.c
index 198b05417bf..a1cdeeb43f4 100644
--- a/arch/arm/mach-omap1/board-perseus2.c
+++ b/arch/arm/mach-omap1/board-perseus2.c
@@ -30,7 +30,7 @@
30 30
31#include <plat/tc.h> 31#include <plat/tc.h>
32#include <mach/mux.h> 32#include <mach/mux.h>
33#include <plat/fpga.h> 33#include <../plat-omap/fpga.h>
34#include <mach/flash.h> 34#include <mach/flash.h>
35 35
36#include <mach/hardware.h> 36#include <mach/hardware.h>
@@ -231,9 +231,9 @@ static struct omap_lcd_config perseus2_lcd_config __initdata = {
231 231
232static void __init perseus2_init_smc91x(void) 232static void __init perseus2_init_smc91x(void)
233{ 233{
234 fpga_write(1, H2P2_DBG_FPGA_LAN_RESET); 234 __raw_writeb(1, H2P2_DBG_FPGA_LAN_RESET);
235 mdelay(50); 235 mdelay(50);
236 fpga_write(fpga_read(H2P2_DBG_FPGA_LAN_RESET) & ~1, 236 __raw_writeb(__raw_readb(H2P2_DBG_FPGA_LAN_RESET) & ~1,
237 H2P2_DBG_FPGA_LAN_RESET); 237 H2P2_DBG_FPGA_LAN_RESET);
238 mdelay(50); 238 mdelay(50);
239} 239}
diff --git a/arch/arm/mach-omap1/common.h b/arch/arm/mach-omap1/common.h
index c2552b24f9f..a65f50aeda6 100644
--- a/arch/arm/mach-omap1/common.h
+++ b/arch/arm/mach-omap1/common.h
@@ -38,6 +38,7 @@ static inline void omap7xx_map_io(void)
38#endif 38#endif
39 39
40#ifdef CONFIG_ARCH_OMAP15XX 40#ifdef CONFIG_ARCH_OMAP15XX
41void omap1510_fpga_init_irq(void);
41void omap15xx_map_io(void); 42void omap15xx_map_io(void);
42#else 43#else
43static inline void omap15xx_map_io(void) 44static inline void omap15xx_map_io(void)
diff --git a/arch/arm/mach-omap1/fpga.c b/arch/arm/mach-omap1/fpga.c
index 29ec50fc688..4ec220d8da5 100644
--- a/arch/arm/mach-omap1/fpga.c
+++ b/arch/arm/mach-omap1/fpga.c
@@ -27,7 +27,7 @@
27#include <asm/irq.h> 27#include <asm/irq.h>
28#include <asm/mach/irq.h> 28#include <asm/mach/irq.h>
29 29
30#include <plat/fpga.h> 30#include <../plat-omap/fpga.h>
31 31
32#include <mach/hardware.h> 32#include <mach/hardware.h>
33 33
diff --git a/arch/arm/mach-omap1/include/mach/omap1510.h b/arch/arm/mach-omap1/include/mach/omap1510.h
index 8fe05d6137c..3d235244bf5 100644
--- a/arch/arm/mach-omap1/include/mach/omap1510.h
+++ b/arch/arm/mach-omap1/include/mach/omap1510.h
@@ -45,5 +45,118 @@
45 45
46#define OMAP1510_DSP_MMU_BASE (0xfffed200) 46#define OMAP1510_DSP_MMU_BASE (0xfffed200)
47 47
48/*
49 * ---------------------------------------------------------------------------
50 * OMAP-1510 FPGA
51 * ---------------------------------------------------------------------------
52 */
53#define OMAP1510_FPGA_BASE 0xE8000000 /* VA */
54#define OMAP1510_FPGA_SIZE SZ_4K
55#define OMAP1510_FPGA_START 0x08000000 /* PA */
56
57/* Revision */
58#define OMAP1510_FPGA_REV_LOW IOMEM(OMAP1510_FPGA_BASE + 0x0)
59#define OMAP1510_FPGA_REV_HIGH IOMEM(OMAP1510_FPGA_BASE + 0x1)
60#define OMAP1510_FPGA_LCD_PANEL_CONTROL IOMEM(OMAP1510_FPGA_BASE + 0x2)
61#define OMAP1510_FPGA_LED_DIGIT IOMEM(OMAP1510_FPGA_BASE + 0x3)
62#define INNOVATOR_FPGA_HID_SPI IOMEM(OMAP1510_FPGA_BASE + 0x4)
63#define OMAP1510_FPGA_POWER IOMEM(OMAP1510_FPGA_BASE + 0x5)
64
65/* Interrupt status */
66#define OMAP1510_FPGA_ISR_LO IOMEM(OMAP1510_FPGA_BASE + 0x6)
67#define OMAP1510_FPGA_ISR_HI IOMEM(OMAP1510_FPGA_BASE + 0x7)
68
69/* Interrupt mask */
70#define OMAP1510_FPGA_IMR_LO IOMEM(OMAP1510_FPGA_BASE + 0x8)
71#define OMAP1510_FPGA_IMR_HI IOMEM(OMAP1510_FPGA_BASE + 0x9)
72
73/* Reset registers */
74#define OMAP1510_FPGA_HOST_RESET IOMEM(OMAP1510_FPGA_BASE + 0xa)
75#define OMAP1510_FPGA_RST IOMEM(OMAP1510_FPGA_BASE + 0xb)
76
77#define OMAP1510_FPGA_AUDIO IOMEM(OMAP1510_FPGA_BASE + 0xc)
78#define OMAP1510_FPGA_DIP IOMEM(OMAP1510_FPGA_BASE + 0xe)
79#define OMAP1510_FPGA_FPGA_IO IOMEM(OMAP1510_FPGA_BASE + 0xf)
80#define OMAP1510_FPGA_UART1 IOMEM(OMAP1510_FPGA_BASE + 0x14)
81#define OMAP1510_FPGA_UART2 IOMEM(OMAP1510_FPGA_BASE + 0x15)
82#define OMAP1510_FPGA_OMAP1510_STATUS IOMEM(OMAP1510_FPGA_BASE + 0x16)
83#define OMAP1510_FPGA_BOARD_REV IOMEM(OMAP1510_FPGA_BASE + 0x18)
84#define INNOVATOR_FPGA_CAM_USB_CONTROL IOMEM(OMAP1510_FPGA_BASE + 0x20c)
85#define OMAP1510P1_PPT_DATA IOMEM(OMAP1510_FPGA_BASE + 0x100)
86#define OMAP1510P1_PPT_STATUS IOMEM(OMAP1510_FPGA_BASE + 0x101)
87#define OMAP1510P1_PPT_CONTROL IOMEM(OMAP1510_FPGA_BASE + 0x102)
88
89#define OMAP1510_FPGA_TOUCHSCREEN IOMEM(OMAP1510_FPGA_BASE + 0x204)
90
91#define INNOVATOR_FPGA_INFO IOMEM(OMAP1510_FPGA_BASE + 0x205)
92#define INNOVATOR_FPGA_LCD_BRIGHT_LO IOMEM(OMAP1510_FPGA_BASE + 0x206)
93#define INNOVATOR_FPGA_LCD_BRIGHT_HI IOMEM(OMAP1510_FPGA_BASE + 0x207)
94#define INNOVATOR_FPGA_LED_GRN_LO IOMEM(OMAP1510_FPGA_BASE + 0x208)
95#define INNOVATOR_FPGA_LED_GRN_HI IOMEM(OMAP1510_FPGA_BASE + 0x209)
96#define INNOVATOR_FPGA_LED_RED_LO IOMEM(OMAP1510_FPGA_BASE + 0x20a)
97#define INNOVATOR_FPGA_LED_RED_HI IOMEM(OMAP1510_FPGA_BASE + 0x20b)
98#define INNOVATOR_FPGA_EXP_CONTROL IOMEM(OMAP1510_FPGA_BASE + 0x20d)
99#define INNOVATOR_FPGA_ISR2 IOMEM(OMAP1510_FPGA_BASE + 0x20e)
100#define INNOVATOR_FPGA_IMR2 IOMEM(OMAP1510_FPGA_BASE + 0x210)
101
102#define OMAP1510_FPGA_ETHR_START (OMAP1510_FPGA_START + 0x300)
103
104/*
105 * Power up Giga UART driver, turn on HID clock.
106 * Turn off BT power, since we're not using it and it
107 * draws power.
108 */
109#define OMAP1510_FPGA_RESET_VALUE 0x42
110
111#define OMAP1510_FPGA_PCR_IF_PD0 (1 << 7)
112#define OMAP1510_FPGA_PCR_COM2_EN (1 << 6)
113#define OMAP1510_FPGA_PCR_COM1_EN (1 << 5)
114#define OMAP1510_FPGA_PCR_EXP_PD0 (1 << 4)
115#define OMAP1510_FPGA_PCR_EXP_PD1 (1 << 3)
116#define OMAP1510_FPGA_PCR_48MHZ_CLK (1 << 2)
117#define OMAP1510_FPGA_PCR_4MHZ_CLK (1 << 1)
118#define OMAP1510_FPGA_PCR_RSRVD_BIT0 (1 << 0)
119
120/*
121 * Innovator/OMAP1510 FPGA HID register bit definitions
122 */
123#define OMAP1510_FPGA_HID_SCLK (1<<0) /* output */
124#define OMAP1510_FPGA_HID_MOSI (1<<1) /* output */
125#define OMAP1510_FPGA_HID_nSS (1<<2) /* output 0/1 chip idle/select */
126#define OMAP1510_FPGA_HID_nHSUS (1<<3) /* output 0/1 host active/suspended */
127#define OMAP1510_FPGA_HID_MISO (1<<4) /* input */
128#define OMAP1510_FPGA_HID_ATN (1<<5) /* input 0/1 chip idle/ATN */
129#define OMAP1510_FPGA_HID_rsrvd (1<<6)
130#define OMAP1510_FPGA_HID_RESETn (1<<7) /* output - 0/1 USAR reset/run */
131
132/* The FPGA IRQ is cascaded through GPIO_13 */
133#define OMAP1510_INT_FPGA (IH_GPIO_BASE + 13)
134
135/* IRQ Numbers for interrupts muxed through the FPGA */
136#define OMAP1510_INT_FPGA_ATN (OMAP_FPGA_IRQ_BASE + 0)
137#define OMAP1510_INT_FPGA_ACK (OMAP_FPGA_IRQ_BASE + 1)
138#define OMAP1510_INT_FPGA2 (OMAP_FPGA_IRQ_BASE + 2)
139#define OMAP1510_INT_FPGA3 (OMAP_FPGA_IRQ_BASE + 3)
140#define OMAP1510_INT_FPGA4 (OMAP_FPGA_IRQ_BASE + 4)
141#define OMAP1510_INT_FPGA5 (OMAP_FPGA_IRQ_BASE + 5)
142#define OMAP1510_INT_FPGA6 (OMAP_FPGA_IRQ_BASE + 6)
143#define OMAP1510_INT_FPGA7 (OMAP_FPGA_IRQ_BASE + 7)
144#define OMAP1510_INT_FPGA8 (OMAP_FPGA_IRQ_BASE + 8)
145#define OMAP1510_INT_FPGA9 (OMAP_FPGA_IRQ_BASE + 9)
146#define OMAP1510_INT_FPGA10 (OMAP_FPGA_IRQ_BASE + 10)
147#define OMAP1510_INT_FPGA11 (OMAP_FPGA_IRQ_BASE + 11)
148#define OMAP1510_INT_FPGA12 (OMAP_FPGA_IRQ_BASE + 12)
149#define OMAP1510_INT_ETHER (OMAP_FPGA_IRQ_BASE + 13)
150#define OMAP1510_INT_FPGAUART1 (OMAP_FPGA_IRQ_BASE + 14)
151#define OMAP1510_INT_FPGAUART2 (OMAP_FPGA_IRQ_BASE + 15)
152#define OMAP1510_INT_FPGA_TS (OMAP_FPGA_IRQ_BASE + 16)
153#define OMAP1510_INT_FPGA17 (OMAP_FPGA_IRQ_BASE + 17)
154#define OMAP1510_INT_FPGA_CAM (OMAP_FPGA_IRQ_BASE + 18)
155#define OMAP1510_INT_FPGA_RTC_A (OMAP_FPGA_IRQ_BASE + 19)
156#define OMAP1510_INT_FPGA_RTC_B (OMAP_FPGA_IRQ_BASE + 20)
157#define OMAP1510_INT_FPGA_CD (OMAP_FPGA_IRQ_BASE + 21)
158#define OMAP1510_INT_FPGA22 (OMAP_FPGA_IRQ_BASE + 22)
159#define OMAP1510_INT_FPGA23 (OMAP_FPGA_IRQ_BASE + 23)
160
48#endif /* __ASM_ARCH_OMAP15XX_H */ 161#endif /* __ASM_ARCH_OMAP15XX_H */
49 162
diff --git a/arch/arm/mach-omap1/serial.c b/arch/arm/mach-omap1/serial.c
index b9d6834af83..d1ac08016f0 100644
--- a/arch/arm/mach-omap1/serial.c
+++ b/arch/arm/mach-omap1/serial.c
@@ -23,7 +23,6 @@
23#include <asm/mach-types.h> 23#include <asm/mach-types.h>
24 24
25#include <mach/mux.h> 25#include <mach/mux.h>
26#include <plat/fpga.h>
27 26
28#include "pm.h" 27#include "pm.h"
29 28
diff --git a/arch/arm/plat-omap/debug-leds.c b/arch/arm/plat-omap/debug-leds.c
index ea29bbe8e5c..feca128bc8e 100644
--- a/arch/arm/plat-omap/debug-leds.c
+++ b/arch/arm/plat-omap/debug-leds.c
@@ -20,7 +20,7 @@
20#include <mach/hardware.h> 20#include <mach/hardware.h>
21#include <asm/mach-types.h> 21#include <asm/mach-types.h>
22 22
23#include <plat/fpga.h> 23#include "fpga.h"
24 24
25/* Many OMAP development platforms reuse the same "debug board"; these 25/* Many OMAP development platforms reuse the same "debug board"; these
26 * platforms include H2, H3, H4, and Perseus2. There are 16 LEDs on the 26 * platforms include H2, H3, H4, and Perseus2. There are 16 LEDs on the
diff --git a/arch/arm/plat-omap/fpga.h b/arch/arm/plat-omap/fpga.h
new file mode 100644
index 00000000000..54faaa93e6f
--- /dev/null
+++ b/arch/arm/plat-omap/fpga.h
@@ -0,0 +1,74 @@
1/*
2 * arch/arm/plat-omap/include/mach/fpga.h
3 *
4 * Interrupt handler for OMAP-1510 FPGA
5 *
6 * Copyright (C) 2001 RidgeRun, Inc.
7 * Author: Greg Lonnon <glonnon@ridgerun.com>
8 *
9 * Copyright (C) 2002 MontaVista Software, Inc.
10 *
11 * Separated FPGA interrupts from innovator1510.c and cleaned up for 2.6
12 * Copyright (C) 2004 Nokia Corporation by Tony Lindrgen <tony@atomide.com>
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License version 2 as
16 * published by the Free Software Foundation.
17 */
18
19#ifndef __ASM_ARCH_OMAP_FPGA_H
20#define __ASM_ARCH_OMAP_FPGA_H
21
22/*
23 * ---------------------------------------------------------------------------
24 * H2/P2 Debug board FPGA
25 * ---------------------------------------------------------------------------
26 */
27/* maps in the FPGA registers and the ETHR registers */
28#define H2P2_DBG_FPGA_BASE 0xE8000000 /* VA */
29#define H2P2_DBG_FPGA_SIZE SZ_4K /* SIZE */
30#define H2P2_DBG_FPGA_START 0x04000000 /* PA */
31
32#define H2P2_DBG_FPGA_ETHR_START (H2P2_DBG_FPGA_START + 0x300)
33#define H2P2_DBG_FPGA_FPGA_REV IOMEM(H2P2_DBG_FPGA_BASE + 0x10) /* FPGA Revision */
34#define H2P2_DBG_FPGA_BOARD_REV IOMEM(H2P2_DBG_FPGA_BASE + 0x12) /* Board Revision */
35#define H2P2_DBG_FPGA_GPIO IOMEM(H2P2_DBG_FPGA_BASE + 0x14) /* GPIO outputs */
36#define H2P2_DBG_FPGA_LEDS IOMEM(H2P2_DBG_FPGA_BASE + 0x16) /* LEDs outputs */
37#define H2P2_DBG_FPGA_MISC_INPUTS IOMEM(H2P2_DBG_FPGA_BASE + 0x18) /* Misc inputs */
38#define H2P2_DBG_FPGA_LAN_STATUS IOMEM(H2P2_DBG_FPGA_BASE + 0x1A) /* LAN Status line */
39#define H2P2_DBG_FPGA_LAN_RESET IOMEM(H2P2_DBG_FPGA_BASE + 0x1C) /* LAN Reset line */
40
41/* NOTE: most boards don't have a static mapping for the FPGA ... */
42struct h2p2_dbg_fpga {
43 /* offset 0x00 */
44 u16 smc91x[8];
45 /* offset 0x10 */
46 u16 fpga_rev;
47 u16 board_rev;
48 u16 gpio_outputs;
49 u16 leds;
50 /* offset 0x18 */
51 u16 misc_inputs;
52 u16 lan_status;
53 u16 lan_reset;
54 u16 reserved0;
55 /* offset 0x20 */
56 u16 ps2_data;
57 u16 ps2_ctrl;
58 /* plus also 4 rs232 ports ... */
59};
60
61/* LEDs definition on debug board (16 LEDs, all physically green) */
62#define H2P2_DBG_FPGA_LED_GREEN (1 << 15)
63#define H2P2_DBG_FPGA_LED_AMBER (1 << 14)
64#define H2P2_DBG_FPGA_LED_RED (1 << 13)
65#define H2P2_DBG_FPGA_LED_BLUE (1 << 12)
66/* cpu0 load-meter LEDs */
67#define H2P2_DBG_FPGA_LOAD_METER (1 << 0) // A bit of fun on our board ...
68#define H2P2_DBG_FPGA_LOAD_METER_SIZE 11
69#define H2P2_DBG_FPGA_LOAD_METER_MASK ((1 << H2P2_DBG_FPGA_LOAD_METER_SIZE) - 1)
70
71#define H2P2_DBG_FPGA_P2_LED_TIMER (1 << 0)
72#define H2P2_DBG_FPGA_P2_LED_IDLE (1 << 1)
73
74#endif
diff --git a/arch/arm/plat-omap/include/plat/fpga.h b/arch/arm/plat-omap/include/plat/fpga.h
deleted file mode 100644
index bd3c6324ae1..00000000000
--- a/arch/arm/plat-omap/include/plat/fpga.h
+++ /dev/null
@@ -1,193 +0,0 @@
1/*
2 * arch/arm/plat-omap/include/mach/fpga.h
3 *
4 * Interrupt handler for OMAP-1510 FPGA
5 *
6 * Copyright (C) 2001 RidgeRun, Inc.
7 * Author: Greg Lonnon <glonnon@ridgerun.com>
8 *
9 * Copyright (C) 2002 MontaVista Software, Inc.
10 *
11 * Separated FPGA interrupts from innovator1510.c and cleaned up for 2.6
12 * Copyright (C) 2004 Nokia Corporation by Tony Lindrgen <tony@atomide.com>
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License version 2 as
16 * published by the Free Software Foundation.
17 */
18
19#ifndef __ASM_ARCH_OMAP_FPGA_H
20#define __ASM_ARCH_OMAP_FPGA_H
21
22extern void omap1510_fpga_init_irq(void);
23
24#define fpga_read(reg) __raw_readb(reg)
25#define fpga_write(val, reg) __raw_writeb(val, reg)
26
27/*
28 * ---------------------------------------------------------------------------
29 * H2/P2 Debug board FPGA
30 * ---------------------------------------------------------------------------
31 */
32/* maps in the FPGA registers and the ETHR registers */
33#define H2P2_DBG_FPGA_BASE 0xE8000000 /* VA */
34#define H2P2_DBG_FPGA_SIZE SZ_4K /* SIZE */
35#define H2P2_DBG_FPGA_START 0x04000000 /* PA */
36
37#define H2P2_DBG_FPGA_ETHR_START (H2P2_DBG_FPGA_START + 0x300)
38#define H2P2_DBG_FPGA_FPGA_REV IOMEM(H2P2_DBG_FPGA_BASE + 0x10) /* FPGA Revision */
39#define H2P2_DBG_FPGA_BOARD_REV IOMEM(H2P2_DBG_FPGA_BASE + 0x12) /* Board Revision */
40#define H2P2_DBG_FPGA_GPIO IOMEM(H2P2_DBG_FPGA_BASE + 0x14) /* GPIO outputs */
41#define H2P2_DBG_FPGA_LEDS IOMEM(H2P2_DBG_FPGA_BASE + 0x16) /* LEDs outputs */
42#define H2P2_DBG_FPGA_MISC_INPUTS IOMEM(H2P2_DBG_FPGA_BASE + 0x18) /* Misc inputs */
43#define H2P2_DBG_FPGA_LAN_STATUS IOMEM(H2P2_DBG_FPGA_BASE + 0x1A) /* LAN Status line */
44#define H2P2_DBG_FPGA_LAN_RESET IOMEM(H2P2_DBG_FPGA_BASE + 0x1C) /* LAN Reset line */
45
46/* NOTE: most boards don't have a static mapping for the FPGA ... */
47struct h2p2_dbg_fpga {
48 /* offset 0x00 */
49 u16 smc91x[8];
50 /* offset 0x10 */
51 u16 fpga_rev;
52 u16 board_rev;
53 u16 gpio_outputs;
54 u16 leds;
55 /* offset 0x18 */
56 u16 misc_inputs;
57 u16 lan_status;
58 u16 lan_reset;
59 u16 reserved0;
60 /* offset 0x20 */
61 u16 ps2_data;
62 u16 ps2_ctrl;
63 /* plus also 4 rs232 ports ... */
64};
65
66/* LEDs definition on debug board (16 LEDs, all physically green) */
67#define H2P2_DBG_FPGA_LED_GREEN (1 << 15)
68#define H2P2_DBG_FPGA_LED_AMBER (1 << 14)
69#define H2P2_DBG_FPGA_LED_RED (1 << 13)
70#define H2P2_DBG_FPGA_LED_BLUE (1 << 12)
71/* cpu0 load-meter LEDs */
72#define H2P2_DBG_FPGA_LOAD_METER (1 << 0) // A bit of fun on our board ...
73#define H2P2_DBG_FPGA_LOAD_METER_SIZE 11
74#define H2P2_DBG_FPGA_LOAD_METER_MASK ((1 << H2P2_DBG_FPGA_LOAD_METER_SIZE) - 1)
75
76#define H2P2_DBG_FPGA_P2_LED_TIMER (1 << 0)
77#define H2P2_DBG_FPGA_P2_LED_IDLE (1 << 1)
78
79/*
80 * ---------------------------------------------------------------------------
81 * OMAP-1510 FPGA
82 * ---------------------------------------------------------------------------
83 */
84#define OMAP1510_FPGA_BASE 0xE8000000 /* VA */
85#define OMAP1510_FPGA_SIZE SZ_4K
86#define OMAP1510_FPGA_START 0x08000000 /* PA */
87
88/* Revision */
89#define OMAP1510_FPGA_REV_LOW IOMEM(OMAP1510_FPGA_BASE + 0x0)
90#define OMAP1510_FPGA_REV_HIGH IOMEM(OMAP1510_FPGA_BASE + 0x1)
91
92#define OMAP1510_FPGA_LCD_PANEL_CONTROL IOMEM(OMAP1510_FPGA_BASE + 0x2)
93#define OMAP1510_FPGA_LED_DIGIT IOMEM(OMAP1510_FPGA_BASE + 0x3)
94#define INNOVATOR_FPGA_HID_SPI IOMEM(OMAP1510_FPGA_BASE + 0x4)
95#define OMAP1510_FPGA_POWER IOMEM(OMAP1510_FPGA_BASE + 0x5)
96
97/* Interrupt status */
98#define OMAP1510_FPGA_ISR_LO IOMEM(OMAP1510_FPGA_BASE + 0x6)
99#define OMAP1510_FPGA_ISR_HI IOMEM(OMAP1510_FPGA_BASE + 0x7)
100
101/* Interrupt mask */
102#define OMAP1510_FPGA_IMR_LO IOMEM(OMAP1510_FPGA_BASE + 0x8)
103#define OMAP1510_FPGA_IMR_HI IOMEM(OMAP1510_FPGA_BASE + 0x9)
104
105/* Reset registers */
106#define OMAP1510_FPGA_HOST_RESET IOMEM(OMAP1510_FPGA_BASE + 0xa)
107#define OMAP1510_FPGA_RST IOMEM(OMAP1510_FPGA_BASE + 0xb)
108
109#define OMAP1510_FPGA_AUDIO IOMEM(OMAP1510_FPGA_BASE + 0xc)
110#define OMAP1510_FPGA_DIP IOMEM(OMAP1510_FPGA_BASE + 0xe)
111#define OMAP1510_FPGA_FPGA_IO IOMEM(OMAP1510_FPGA_BASE + 0xf)
112#define OMAP1510_FPGA_UART1 IOMEM(OMAP1510_FPGA_BASE + 0x14)
113#define OMAP1510_FPGA_UART2 IOMEM(OMAP1510_FPGA_BASE + 0x15)
114#define OMAP1510_FPGA_OMAP1510_STATUS IOMEM(OMAP1510_FPGA_BASE + 0x16)
115#define OMAP1510_FPGA_BOARD_REV IOMEM(OMAP1510_FPGA_BASE + 0x18)
116#define OMAP1510P1_PPT_DATA IOMEM(OMAP1510_FPGA_BASE + 0x100)
117#define OMAP1510P1_PPT_STATUS IOMEM(OMAP1510_FPGA_BASE + 0x101)
118#define OMAP1510P1_PPT_CONTROL IOMEM(OMAP1510_FPGA_BASE + 0x102)
119
120#define OMAP1510_FPGA_TOUCHSCREEN IOMEM(OMAP1510_FPGA_BASE + 0x204)
121
122#define INNOVATOR_FPGA_INFO IOMEM(OMAP1510_FPGA_BASE + 0x205)
123#define INNOVATOR_FPGA_LCD_BRIGHT_LO IOMEM(OMAP1510_FPGA_BASE + 0x206)
124#define INNOVATOR_FPGA_LCD_BRIGHT_HI IOMEM(OMAP1510_FPGA_BASE + 0x207)
125#define INNOVATOR_FPGA_LED_GRN_LO IOMEM(OMAP1510_FPGA_BASE + 0x208)
126#define INNOVATOR_FPGA_LED_GRN_HI IOMEM(OMAP1510_FPGA_BASE + 0x209)
127#define INNOVATOR_FPGA_LED_RED_LO IOMEM(OMAP1510_FPGA_BASE + 0x20a)
128#define INNOVATOR_FPGA_LED_RED_HI IOMEM(OMAP1510_FPGA_BASE + 0x20b)
129#define INNOVATOR_FPGA_CAM_USB_CONTROL IOMEM(OMAP1510_FPGA_BASE + 0x20c)
130#define INNOVATOR_FPGA_EXP_CONTROL IOMEM(OMAP1510_FPGA_BASE + 0x20d)
131#define INNOVATOR_FPGA_ISR2 IOMEM(OMAP1510_FPGA_BASE + 0x20e)
132#define INNOVATOR_FPGA_IMR2 IOMEM(OMAP1510_FPGA_BASE + 0x210)
133
134#define OMAP1510_FPGA_ETHR_START (OMAP1510_FPGA_START + 0x300)
135
136/*
137 * Power up Giga UART driver, turn on HID clock.
138 * Turn off BT power, since we're not using it and it
139 * draws power.
140 */
141#define OMAP1510_FPGA_RESET_VALUE 0x42
142
143#define OMAP1510_FPGA_PCR_IF_PD0 (1 << 7)
144#define OMAP1510_FPGA_PCR_COM2_EN (1 << 6)
145#define OMAP1510_FPGA_PCR_COM1_EN (1 << 5)
146#define OMAP1510_FPGA_PCR_EXP_PD0 (1 << 4)
147#define OMAP1510_FPGA_PCR_EXP_PD1 (1 << 3)
148#define OMAP1510_FPGA_PCR_48MHZ_CLK (1 << 2)
149#define OMAP1510_FPGA_PCR_4MHZ_CLK (1 << 1)
150#define OMAP1510_FPGA_PCR_RSRVD_BIT0 (1 << 0)
151
152/*
153 * Innovator/OMAP1510 FPGA HID register bit definitions
154 */
155#define OMAP1510_FPGA_HID_SCLK (1<<0) /* output */
156#define OMAP1510_FPGA_HID_MOSI (1<<1) /* output */
157#define OMAP1510_FPGA_HID_nSS (1<<2) /* output 0/1 chip idle/select */
158#define OMAP1510_FPGA_HID_nHSUS (1<<3) /* output 0/1 host active/suspended */
159#define OMAP1510_FPGA_HID_MISO (1<<4) /* input */
160#define OMAP1510_FPGA_HID_ATN (1<<5) /* input 0/1 chip idle/ATN */
161#define OMAP1510_FPGA_HID_rsrvd (1<<6)
162#define OMAP1510_FPGA_HID_RESETn (1<<7) /* output - 0/1 USAR reset/run */
163
164/* The FPGA IRQ is cascaded through GPIO_13 */
165#define OMAP1510_INT_FPGA (IH_GPIO_BASE + 13)
166
167/* IRQ Numbers for interrupts muxed through the FPGA */
168#define OMAP1510_INT_FPGA_ATN (OMAP_FPGA_IRQ_BASE + 0)
169#define OMAP1510_INT_FPGA_ACK (OMAP_FPGA_IRQ_BASE + 1)
170#define OMAP1510_INT_FPGA2 (OMAP_FPGA_IRQ_BASE + 2)
171#define OMAP1510_INT_FPGA3 (OMAP_FPGA_IRQ_BASE + 3)
172#define OMAP1510_INT_FPGA4 (OMAP_FPGA_IRQ_BASE + 4)
173#define OMAP1510_INT_FPGA5 (OMAP_FPGA_IRQ_BASE + 5)
174#define OMAP1510_INT_FPGA6 (OMAP_FPGA_IRQ_BASE + 6)
175#define OMAP1510_INT_FPGA7 (OMAP_FPGA_IRQ_BASE + 7)
176#define OMAP1510_INT_FPGA8 (OMAP_FPGA_IRQ_BASE + 8)
177#define OMAP1510_INT_FPGA9 (OMAP_FPGA_IRQ_BASE + 9)
178#define OMAP1510_INT_FPGA10 (OMAP_FPGA_IRQ_BASE + 10)
179#define OMAP1510_INT_FPGA11 (OMAP_FPGA_IRQ_BASE + 11)
180#define OMAP1510_INT_FPGA12 (OMAP_FPGA_IRQ_BASE + 12)
181#define OMAP1510_INT_ETHER (OMAP_FPGA_IRQ_BASE + 13)
182#define OMAP1510_INT_FPGAUART1 (OMAP_FPGA_IRQ_BASE + 14)
183#define OMAP1510_INT_FPGAUART2 (OMAP_FPGA_IRQ_BASE + 15)
184#define OMAP1510_INT_FPGA_TS (OMAP_FPGA_IRQ_BASE + 16)
185#define OMAP1510_INT_FPGA17 (OMAP_FPGA_IRQ_BASE + 17)
186#define OMAP1510_INT_FPGA_CAM (OMAP_FPGA_IRQ_BASE + 18)
187#define OMAP1510_INT_FPGA_RTC_A (OMAP_FPGA_IRQ_BASE + 19)
188#define OMAP1510_INT_FPGA_RTC_B (OMAP_FPGA_IRQ_BASE + 20)
189#define OMAP1510_INT_FPGA_CD (OMAP_FPGA_IRQ_BASE + 21)
190#define OMAP1510_INT_FPGA22 (OMAP_FPGA_IRQ_BASE + 22)
191#define OMAP1510_INT_FPGA23 (OMAP_FPGA_IRQ_BASE + 23)
192
193#endif
generated by cgit v1.2.2 (git 2.25.0) at 2026-01-09 12:58:09 -0500