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-rw-r--r--arch/arm/Kconfig6
-rw-r--r--arch/arm/Kconfig.debug156
-rw-r--r--arch/arm/include/asm/hardware/entry-macro-iomd.S8
-rw-r--r--arch/arm/include/asm/system.h1
-rw-r--r--arch/arm/kernel/entry-armv.S3
-rw-r--r--arch/arm/kernel/entry-common.S8
-rw-r--r--arch/arm/kernel/process.c27
-rw-r--r--arch/arm/mach-at91/at91cap9.c8
-rw-r--r--arch/arm/mach-at91/at91rm9200.c10
-rw-r--r--arch/arm/mach-at91/at91sam9260.c8
-rw-r--r--arch/arm/mach-at91/at91sam9261.c8
-rw-r--r--arch/arm/mach-at91/at91sam9263.c8
-rw-r--r--arch/arm/mach-at91/at91sam9g45.c7
-rw-r--r--arch/arm/mach-at91/at91sam9rl.c8
-rw-r--r--arch/arm/mach-at91/at91x40.c12
-rw-r--r--arch/arm/mach-at91/include/mach/entry-macro.S6
-rw-r--r--arch/arm/mach-at91/include/mach/system.h50
-rw-r--r--arch/arm/mach-bcmring/core.c23
-rw-r--r--arch/arm/mach-bcmring/include/mach/entry-macro.S6
-rw-r--r--arch/arm/mach-bcmring/include/mach/system.h28
-rw-r--r--arch/arm/mach-clps711x/common.c16
-rw-r--r--arch/arm/mach-clps711x/include/mach/entry-macro.S6
-rw-r--r--arch/arm/mach-clps711x/include/mach/system.h35
-rw-r--r--arch/arm/mach-cns3xxx/include/mach/entry-macro.S15
-rw-r--r--arch/arm/mach-cns3xxx/include/mach/system.h25
-rw-r--r--arch/arm/mach-davinci/include/mach/entry-macro.S6
-rw-r--r--arch/arm/mach-davinci/include/mach/system.h21
-rw-r--r--arch/arm/mach-dove/include/mach/entry-macro.S6
-rw-r--r--arch/arm/mach-dove/include/mach/system.h17
-rw-r--r--arch/arm/mach-ebsa110/core.c25
-rw-r--r--arch/arm/mach-ebsa110/include/mach/entry-macro.S6
-rw-r--r--arch/arm/mach-ebsa110/include/mach/system.h37
-rw-r--r--arch/arm/mach-ep93xx/core.c46
-rw-r--r--arch/arm/mach-ep93xx/include/mach/entry-macro.S17
-rw-r--r--arch/arm/mach-ep93xx/include/mach/system.h7
-rw-r--r--arch/arm/mach-exynos/common.c12
-rw-r--r--arch/arm/mach-exynos/dma.c38
-rw-r--r--arch/arm/mach-exynos/include/mach/entry-macro.S16
-rw-r--r--arch/arm/mach-exynos/include/mach/system.h20
-rw-r--r--arch/arm/mach-footbridge/include/mach/entry-macro.S6
-rw-r--r--arch/arm/mach-footbridge/include/mach/system.h13
-rw-r--r--arch/arm/mach-gemini/Makefile2
-rw-r--r--arch/arm/mach-gemini/idle.c29
-rw-r--r--arch/arm/mach-gemini/include/mach/entry-macro.S6
-rw-r--r--arch/arm/mach-gemini/include/mach/system.h14
-rw-r--r--arch/arm/mach-gemini/irq.c4
-rw-r--r--arch/arm/mach-h720x/common.c18
-rw-r--r--arch/arm/mach-h720x/include/mach/entry-macro.S6
-rw-r--r--arch/arm/mach-h720x/include/mach/system.h27
-rw-r--r--arch/arm/mach-highbank/include/mach/entry-macro.S5
-rw-r--r--arch/arm/mach-highbank/include/mach/system.h24
-rw-r--r--arch/arm/mach-imx/mm-imx3.c52
-rw-r--r--arch/arm/mach-imx/mm-imx5.c28
-rw-r--r--arch/arm/mach-imx/pm-imx27.c3
-rw-r--r--arch/arm/mach-integrator/core.c70
-rw-r--r--arch/arm/mach-integrator/impd1.c9
-rw-r--r--arch/arm/mach-integrator/include/mach/entry-macro.S6
-rw-r--r--arch/arm/mach-integrator/include/mach/system.h33
-rw-r--r--arch/arm/mach-integrator/integrator_cp.c49
-rw-r--r--arch/arm/mach-iop13xx/include/mach/entry-macro.S3
-rw-r--r--arch/arm/mach-iop13xx/include/mach/system.h13
-rw-r--r--arch/arm/mach-iop32x/include/mach/entry-macro.S3
-rw-r--r--arch/arm/mach-iop32x/include/mach/system.h13
-rw-r--r--arch/arm/mach-iop33x/include/mach/entry-macro.S3
-rw-r--r--arch/arm/mach-iop33x/include/mach/system.h13
-rw-r--r--arch/arm/mach-ixp2000/include/mach/entry-macro.S6
-rw-r--r--arch/arm/mach-ixp2000/include/mach/system.h14
-rw-r--r--arch/arm/mach-ixp23xx/core.c3
-rw-r--r--arch/arm/mach-ixp23xx/include/mach/entry-macro.S6
-rw-r--r--arch/arm/mach-ixp23xx/include/mach/system.h16
-rw-r--r--arch/arm/mach-ixp4xx/common.c6
-rw-r--r--arch/arm/mach-ixp4xx/include/mach/entry-macro.S6
-rw-r--r--arch/arm/mach-ixp4xx/include/mach/system.h19
-rw-r--r--arch/arm/mach-kirkwood/include/mach/entry-macro.S6
-rw-r--r--arch/arm/mach-kirkwood/include/mach/system.h17
-rw-r--r--arch/arm/mach-ks8695/include/mach/entry-macro.S6
-rw-r--r--arch/arm/mach-ks8695/include/mach/system.h27
-rw-r--r--arch/arm/mach-lpc32xx/include/mach/entry-macro.S6
-rw-r--r--arch/arm/mach-lpc32xx/include/mach/system.h27
-rw-r--r--arch/arm/mach-lpc32xx/phy3250.c32
-rw-r--r--arch/arm/mach-mmp/include/mach/entry-macro.S6
-rw-r--r--arch/arm/mach-mmp/include/mach/system.h16
-rw-r--r--arch/arm/mach-msm/idle.S36
-rw-r--r--arch/arm/mach-msm/idle.c49
-rw-r--r--arch/arm/mach-msm/include/mach/entry-macro.S6
-rw-r--r--arch/arm/mach-msm/include/mach/system.h1
-rw-r--r--arch/arm/mach-mv78xx0/include/mach/entry-macro.S6
-rw-r--r--arch/arm/mach-mv78xx0/include/mach/system.h17
-rw-r--r--arch/arm/mach-mxs/devices.c8
-rw-r--r--arch/arm/mach-mxs/devices/amba-duart.c2
-rw-r--r--arch/arm/mach-mxs/include/mach/entry-macro.S6
-rw-r--r--arch/arm/mach-mxs/include/mach/system.h25
-rw-r--r--arch/arm/mach-mxs/pm.c3
-rw-r--r--arch/arm/mach-netx/fb.c13
-rw-r--r--arch/arm/mach-netx/include/mach/entry-macro.S26
-rw-r--r--arch/arm/mach-netx/include/mach/system.h28
-rw-r--r--arch/arm/mach-nomadik/board-nhk8815.c17
-rw-r--r--arch/arm/mach-nomadik/cpu-8815.c9
-rw-r--r--arch/arm/mach-nomadik/include/mach/entry-macro.S13
-rw-r--r--arch/arm/mach-nomadik/include/mach/system.h32
-rw-r--r--arch/arm/mach-omap1/ams-delta-fiq-handler.S3
-rw-r--r--arch/arm/mach-omap1/ams-delta-fiq.c1
-rw-r--r--arch/arm/mach-omap1/board-ams-delta.c10
-rw-r--r--arch/arm/mach-omap1/board-fsample.c7
-rw-r--r--arch/arm/mach-omap1/board-h2.c6
-rw-r--r--arch/arm/mach-omap1/board-h3.c8
-rw-r--r--arch/arm/mach-omap1/board-htcherald.c5
-rw-r--r--arch/arm/mach-omap1/board-innovator.c7
-rw-r--r--arch/arm/mach-omap1/board-nokia770.c6
-rw-r--r--arch/arm/mach-omap1/board-osk.c7
-rw-r--r--arch/arm/mach-omap1/board-palmte.c4
-rw-r--r--arch/arm/mach-omap1/board-palmtt.c9
-rw-r--r--arch/arm/mach-omap1/board-palmz71.c9
-rw-r--r--arch/arm/mach-omap1/board-perseus2.c7
-rw-r--r--arch/arm/mach-omap1/board-sx1.c6
-rw-r--r--arch/arm/mach-omap1/board-voiceblue.c6
-rw-r--r--arch/arm/mach-omap1/clock.c5
-rw-r--r--arch/arm/mach-omap1/clock_data.c5
-rw-r--r--arch/arm/mach-omap1/common.h1
-rw-r--r--arch/arm/mach-omap1/devices.c8
-rw-r--r--arch/arm/mach-omap1/dma.c2
-rw-r--r--arch/arm/mach-omap1/flash.c4
-rw-r--r--arch/arm/mach-omap1/fpga.c5
-rw-r--r--arch/arm/mach-omap1/gpio16xx.c7
-rw-r--r--arch/arm/mach-omap1/id.c3
-rw-r--r--arch/arm/mach-omap1/include/mach/entry-macro.S8
-rw-r--r--arch/arm/mach-omap1/include/mach/hardware.h36
-rw-r--r--arch/arm/mach-omap1/include/mach/io.h43
-rw-r--r--arch/arm/mach-omap1/include/mach/memory.h3
-rw-r--r--arch/arm/mach-omap1/include/mach/system.h5
-rw-r--r--arch/arm/mach-omap1/io.c3
-rw-r--r--arch/arm/mach-omap1/iomap.h42
-rw-r--r--arch/arm/mach-omap1/irq.c4
-rw-r--r--arch/arm/mach-omap1/lcd_dma.c3
-rw-r--r--arch/arm/mach-omap1/mcbsp.c5
-rw-r--r--arch/arm/mach-omap1/pm.c23
-rw-r--r--arch/arm/mach-omap1/reset.c3
-rw-r--r--arch/arm/mach-omap1/sleep.S4
-rw-r--r--arch/arm/mach-omap1/sram.S4
-rw-r--r--arch/arm/mach-omap1/time.c3
-rw-r--r--arch/arm/mach-omap1/timer32k.c7
-rw-r--r--arch/arm/mach-omap2/board-cm-t35.c1
-rw-r--r--arch/arm/mach-omap2/board-n8x0.c1
-rw-r--r--arch/arm/mach-omap2/board-rx51-peripherals.c3
-rw-r--r--arch/arm/mach-omap2/board-zoom-display.c1
-rw-r--r--arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c1
-rw-r--r--arch/arm/mach-omap2/clkt_dpll.c1
-rw-r--r--arch/arm/mach-omap2/clock2420_data.c3
-rw-r--r--arch/arm/mach-omap2/clock2430.c2
-rw-r--r--arch/arm/mach-omap2/clock2430_data.c2
-rw-r--r--arch/arm/mach-omap2/clock2xxx.c1
-rw-r--r--arch/arm/mach-omap2/clock3xxx.c1
-rw-r--r--arch/arm/mach-omap2/clock3xxx_data.c3
-rw-r--r--arch/arm/mach-omap2/clock44xx_data.c3
-rw-r--r--arch/arm/mach-omap2/cm2xxx_3xxx.c2
-rw-r--r--arch/arm/mach-omap2/cm44xx.c2
-rw-r--r--arch/arm/mach-omap2/cminst44xx.c2
-rw-r--r--arch/arm/mach-omap2/common-board-devices.c1
-rw-r--r--arch/arm/mach-omap2/common.c4
-rw-r--r--arch/arm/mach-omap2/common.h7
-rw-r--r--arch/arm/mach-omap2/control.c3
-rw-r--r--arch/arm/mach-omap2/control.h1
-rw-r--r--arch/arm/mach-omap2/devices.c2
-rw-r--r--arch/arm/mach-omap2/display.c1
-rw-r--r--arch/arm/mach-omap2/emu.c30
-rw-r--r--arch/arm/mach-omap2/gpmc-nand.c1
-rw-r--r--arch/arm/mach-omap2/gpmc-onenand.c1
-rw-r--r--arch/arm/mach-omap2/include/mach/entry-macro.S18
-rw-r--r--arch/arm/mach-omap2/include/mach/io.h46
-rw-r--r--arch/arm/mach-omap2/include/mach/system.h5
-rw-r--r--arch/arm/mach-omap2/io.c57
-rw-r--r--arch/arm/mach-omap2/iomap.h (renamed from arch/arm/plat-omap/include/plat/io.h)80
-rw-r--r--arch/arm/mach-omap2/irq.c5
-rw-r--r--arch/arm/mach-omap2/omap-mpuss-lowpower.c2
-rw-r--r--arch/arm/mach-omap2/omap-smp.c3
-rw-r--r--arch/arm/mach-omap2/opp2420_data.c2
-rw-r--r--arch/arm/mach-omap2/opp2430_data.c2
-rw-r--r--arch/arm/mach-omap2/pm-debug.c6
-rw-r--r--arch/arm/mach-omap2/pm.c113
-rw-r--r--arch/arm/mach-omap2/pm.h2
-rw-r--r--arch/arm/mach-omap2/pm24xx.c104
-rw-r--r--arch/arm/mach-omap2/pm34xx.c80
-rw-r--r--arch/arm/mach-omap2/pm44xx.c65
-rw-r--r--arch/arm/mach-omap2/prcm_mpu44xx.c2
-rw-r--r--arch/arm/mach-omap2/prm44xx.c3
-rw-r--r--arch/arm/mach-omap2/prm_common.c1
-rw-r--r--arch/arm/mach-omap2/prminst44xx.c2
-rw-r--r--arch/arm/mach-omap2/sdram-nokia.c1
-rw-r--r--arch/arm/mach-omap2/sdrc2xxx.c5
-rw-r--r--arch/arm/mach-omap2/sleep24xx.S1
-rw-r--r--arch/arm/mach-omap2/sleep34xx.S5
-rw-r--r--arch/arm/mach-omap2/sram242x.S4
-rw-r--r--arch/arm/mach-omap2/sram243x.S4
-rw-r--r--arch/arm/mach-omap2/sram34xx.S5
-rw-r--r--arch/arm/mach-orion5x/include/mach/entry-macro.S6
-rw-r--r--arch/arm/mach-orion5x/include/mach/system.h19
-rw-r--r--arch/arm/mach-picoxcell/include/mach/entry-macro.S16
-rw-r--r--arch/arm/mach-picoxcell/include/mach/system.h26
-rw-r--r--arch/arm/mach-pnx4008/include/mach/entry-macro.S6
-rw-r--r--arch/arm/mach-pnx4008/include/mach/system.h29
-rw-r--r--arch/arm/mach-prima2/include/mach/entry-macro.S7
-rw-r--r--arch/arm/mach-prima2/include/mach/system.h17
-rw-r--r--arch/arm/mach-pxa/include/mach/entry-macro.S15
-rw-r--r--arch/arm/mach-pxa/include/mach/system.h15
-rw-r--r--arch/arm/mach-realview/core.h20
-rw-r--r--arch/arm/mach-realview/include/mach/entry-macro.S16
-rw-r--r--arch/arm/mach-realview/include/mach/irqs-pb1176.h2
-rw-r--r--arch/arm/mach-realview/include/mach/system.h33
-rw-r--r--arch/arm/mach-realview/realview_eb.c78
-rw-r--r--arch/arm/mach-realview/realview_pb1176.c78
-rw-r--r--arch/arm/mach-realview/realview_pb11mp.c78
-rw-r--r--arch/arm/mach-realview/realview_pba8.c78
-rw-r--r--arch/arm/mach-realview/realview_pbx.c78
-rw-r--r--arch/arm/mach-rpc/Makefile2
-rw-r--r--arch/arm/mach-rpc/fiq.S16
-rw-r--r--arch/arm/mach-rpc/include/mach/entry-macro.S4
-rw-r--r--arch/arm/mach-rpc/include/mach/system.h13
-rw-r--r--arch/arm/mach-rpc/irq.c6
-rw-r--r--arch/arm/mach-s3c2410/include/mach/entry-macro.S8
-rw-r--r--arch/arm/mach-s3c2410/include/mach/system.h54
-rw-r--r--arch/arm/mach-s3c2412/s3c2412.c4
-rw-r--r--arch/arm/mach-s3c2416/s3c2416.c3
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/entry-macro.S19
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/system.h19
-rw-r--r--arch/arm/mach-s5p64x0/common.c15
-rw-r--r--arch/arm/mach-s5p64x0/dma.c22
-rw-r--r--arch/arm/mach-s5p64x0/include/mach/entry-macro.S17
-rw-r--r--arch/arm/mach-s5p64x0/include/mach/system.h21
-rw-r--r--arch/arm/mach-s5pc100/common.c12
-rw-r--r--arch/arm/mach-s5pc100/dma.c38
-rw-r--r--arch/arm/mach-s5pc100/include/mach/entry-macro.S6
-rw-r--r--arch/arm/mach-s5pc100/include/mach/system.h19
-rw-r--r--arch/arm/mach-s5pv210/common.c12
-rw-r--r--arch/arm/mach-s5pv210/dma.c38
-rw-r--r--arch/arm/mach-s5pv210/include/mach/entry-macro.S17
-rw-r--r--arch/arm/mach-s5pv210/include/mach/system.h21
-rw-r--r--arch/arm/mach-sa1100/include/mach/entry-macro.S6
-rw-r--r--arch/arm/mach-sa1100/include/mach/system.h9
-rw-r--r--arch/arm/mach-shark/core.c6
-rw-r--r--arch/arm/mach-shark/include/mach/entry-macro.S6
-rw-r--r--arch/arm/mach-shark/include/mach/system.h13
-rw-r--r--arch/arm/mach-shmobile/include/mach/entry-macro.S22
-rw-r--r--arch/arm/mach-shmobile/include/mach/system.h5
-rw-r--r--arch/arm/mach-spear3xx/include/mach/entry-macro.S18
-rw-r--r--arch/arm/mach-spear3xx/include/mach/system.h19
-rw-r--r--arch/arm/mach-spear3xx/spear300.c14
-rw-r--r--arch/arm/mach-spear3xx/spear3xx.c27
-rw-r--r--arch/arm/mach-spear6xx/include/mach/entry-macro.S18
-rw-r--r--arch/arm/mach-spear6xx/include/mach/system.h19
-rw-r--r--arch/arm/mach-spear6xx/spear6xx.c10
-rw-r--r--arch/arm/mach-tegra/common.c3
-rw-r--r--arch/arm/mach-tegra/include/mach/entry-macro.S20
-rw-r--r--arch/arm/mach-tegra/include/mach/system.h28
-rw-r--r--arch/arm/mach-u300/core.c85
-rw-r--r--arch/arm/mach-u300/include/mach/entry-macro.S16
-rw-r--r--arch/arm/mach-u300/include/mach/system.h14
-rw-r--r--arch/arm/mach-ux500/devices-common.c13
-rw-r--r--arch/arm/mach-ux500/include/mach/entry-macro.S18
-rw-r--r--arch/arm/mach-ux500/include/mach/system.h20
-rw-r--r--arch/arm/mach-versatile/core.c70
-rw-r--r--arch/arm/mach-versatile/core.h20
-rw-r--r--arch/arm/mach-versatile/include/mach/entry-macro.S15
-rw-r--r--arch/arm/mach-versatile/include/mach/system.h33
-rw-r--r--arch/arm/mach-versatile/versatile_pb.c18
-rw-r--r--arch/arm/mach-vexpress/core.h17
-rw-r--r--arch/arm/mach-vexpress/ct-ca9x4.c8
-rw-r--r--arch/arm/mach-vexpress/include/mach/ct-ca9x4.h2
-rw-r--r--arch/arm/mach-vexpress/include/mach/entry-macro.S5
-rw-r--r--arch/arm/mach-vexpress/include/mach/system.h33
-rw-r--r--arch/arm/mach-vexpress/v2m.c20
-rw-r--r--arch/arm/mach-vt8500/include/mach/entry-macro.S6
-rw-r--r--arch/arm/mach-vt8500/include/mach/system.h5
-rw-r--r--arch/arm/mach-w90x900/dev.c1
-rw-r--r--arch/arm/mach-w90x900/include/mach/entry-macro.S8
-rw-r--r--arch/arm/mach-w90x900/include/mach/system.h19
-rw-r--r--arch/arm/mach-zynq/include/mach/entry-macro.S27
-rw-r--r--arch/arm/mach-zynq/include/mach/system.h23
-rw-r--r--arch/arm/plat-mxc/include/mach/entry-macro.S16
-rw-r--r--arch/arm/plat-mxc/include/mach/system.h25
-rw-r--r--arch/arm/plat-omap/counter_32k.c1
-rw-r--r--arch/arm/plat-omap/dma.c2
-rw-r--r--arch/arm/plat-omap/dmtimer.c2
-rw-r--r--arch/arm/plat-omap/include/plat/hardware.h6
-rw-r--r--arch/arm/plat-omap/include/plat/keypad.h2
-rw-r--r--arch/arm/plat-omap/include/plat/mcspi.h3
-rw-r--r--arch/arm/plat-omap/include/plat/omap_device.h2
-rw-r--r--arch/arm/plat-omap/include/plat/system.h15
-rw-r--r--arch/arm/plat-omap/include/plat/tc.h17
-rw-r--r--arch/arm/plat-omap/include/plat/usb.h41
-rw-r--r--arch/arm/plat-omap/mux.c5
-rw-r--r--arch/arm/plat-omap/omap-pm-noop.c2
-rw-r--r--arch/arm/plat-omap/omap_device.c24
-rw-r--r--arch/arm/plat-omap/sram.c9
-rw-r--r--arch/arm/plat-omap/usb.c4
-rw-r--r--arch/arm/plat-s3c24xx/cpu.c27
-rw-r--r--arch/arm/plat-spear/include/plat/system.h26
296 files changed, 1369 insertions, 3372 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index a48aecc17ea..7d809b7e050 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -186,6 +186,9 @@ config GENERIC_ISA_DMA
186config FIQ 186config FIQ
187 bool 187 bool
188 188
189config NEED_RET_TO_USER
190 bool
191
189config ARCH_MTD_XIP 192config ARCH_MTD_XIP
190 bool 193 bool
191 194
@@ -479,6 +482,7 @@ config ARCH_IOP13XX
479 select ARCH_SUPPORTS_MSI 482 select ARCH_SUPPORTS_MSI
480 select VMSPLIT_1G 483 select VMSPLIT_1G
481 select NEED_MACH_MEMORY_H 484 select NEED_MACH_MEMORY_H
485 select NEED_RET_TO_USER
482 help 486 help
483 Support for Intel's IOP13XX (XScale) family of processors. 487 Support for Intel's IOP13XX (XScale) family of processors.
484 488
@@ -486,6 +490,7 @@ config ARCH_IOP32X
486 bool "IOP32x-based" 490 bool "IOP32x-based"
487 depends on MMU 491 depends on MMU
488 select CPU_XSCALE 492 select CPU_XSCALE
493 select NEED_RET_TO_USER
489 select PLAT_IOP 494 select PLAT_IOP
490 select PCI 495 select PCI
491 select ARCH_REQUIRE_GPIOLIB 496 select ARCH_REQUIRE_GPIOLIB
@@ -497,6 +502,7 @@ config ARCH_IOP33X
497 bool "IOP33x-based" 502 bool "IOP33x-based"
498 depends on MMU 503 depends on MMU
499 select CPU_XSCALE 504 select CPU_XSCALE
505 select NEED_RET_TO_USER
500 select PLAT_IOP 506 select PLAT_IOP
501 select PCI 507 select PCI
502 select ARCH_REQUIRE_GPIOLIB 508 select ARCH_REQUIRE_GPIOLIB
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index e0d236d7ff7..03646c4c13d 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -81,25 +81,6 @@ choice
81 prompt "Kernel low-level debugging port" 81 prompt "Kernel low-level debugging port"
82 depends on DEBUG_LL 82 depends on DEBUG_LL
83 83
84 config DEBUG_LL_UART_NONE
85 bool "No low-level debugging UART"
86 help
87 Say Y here if your platform doesn't provide a UART option
88 below. This relies on your platform choosing the right UART
89 definition internally in order for low-level debugging to
90 work.
91
92 config DEBUG_ICEDCC
93 bool "Kernel low-level debugging via EmbeddedICE DCC channel"
94 help
95 Say Y here if you want the debug print routines to direct
96 their output to the EmbeddedICE macrocell's DCC channel using
97 co-processor 14. This is known to work on the ARM9 style ICE
98 channel and on the XScale with the PEEDI.
99
100 Note that the system will appear to hang during boot if there
101 is nothing connected to read from the DCC.
102
103 config AT91_DEBUG_LL_DBGU0 84 config AT91_DEBUG_LL_DBGU0
104 bool "Kernel low-level debugging on rm9200, 9260/9g20, 9261/9g10 and 9rl" 85 bool "Kernel low-level debugging on rm9200, 9260/9g20, 9261/9g10 and 9rl"
105 depends on HAVE_AT91_DBGU0 86 depends on HAVE_AT91_DBGU0
@@ -108,20 +89,6 @@ choice
108 bool "Kernel low-level debugging on 9263, 9g45 and cap9" 89 bool "Kernel low-level debugging on 9263, 9g45 and cap9"
109 depends on HAVE_AT91_DBGU1 90 depends on HAVE_AT91_DBGU1
110 91
111 config DEBUG_FOOTBRIDGE_COM1
112 bool "Kernel low-level debugging messages via footbridge 8250 at PCI COM1"
113 depends on FOOTBRIDGE
114 help
115 Say Y here if you want the debug print routines to direct
116 their output to the 8250 at PCI COM1.
117
118 config DEBUG_DC21285_PORT
119 bool "Kernel low-level debugging messages via footbridge serial port"
120 depends on FOOTBRIDGE
121 help
122 Say Y here if you want the debug print routines to direct
123 their output to the serial port in the DC21285 (Footbridge).
124
125 config DEBUG_CLPS711X_UART1 92 config DEBUG_CLPS711X_UART1
126 bool "Kernel low-level debugging messages via UART1" 93 bool "Kernel low-level debugging messages via UART1"
127 depends on ARCH_CLPS711X 94 depends on ARCH_CLPS711X
@@ -136,6 +103,20 @@ choice
136 Say Y here if you want the debug print routines to direct 103 Say Y here if you want the debug print routines to direct
137 their output to the second serial port on these devices. 104 their output to the second serial port on these devices.
138 105
106 config DEBUG_DC21285_PORT
107 bool "Kernel low-level debugging messages via footbridge serial port"
108 depends on FOOTBRIDGE
109 help
110 Say Y here if you want the debug print routines to direct
111 their output to the serial port in the DC21285 (Footbridge).
112
113 config DEBUG_FOOTBRIDGE_COM1
114 bool "Kernel low-level debugging messages via footbridge 8250 at PCI COM1"
115 depends on FOOTBRIDGE
116 help
117 Say Y here if you want the debug print routines to direct
118 their output to the 8250 at PCI COM1.
119
139 config DEBUG_HIGHBANK_UART 120 config DEBUG_HIGHBANK_UART
140 bool "Kernel low-level debugging messages via Highbank UART" 121 bool "Kernel low-level debugging messages via Highbank UART"
141 depends on ARCH_HIGHBANK 122 depends on ARCH_HIGHBANK
@@ -206,38 +187,42 @@ choice
206 Say Y here if you want kernel low-level debugging support 187 Say Y here if you want kernel low-level debugging support
207 on i.MX6Q. 188 on i.MX6Q.
208 189
209 config DEBUG_S3C_UART0 190 config DEBUG_MSM_UART1
210 depends on PLAT_SAMSUNG 191 bool "Kernel low-level debugging messages via MSM UART1"
211 bool "Use S3C UART 0 for low-level debug" 192 depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50
212 help 193 help
213 Say Y here if you want the debug print routines to direct 194 Say Y here if you want the debug print routines to direct
214 their output to UART 0. The port must have been initialised 195 their output to the first serial port on MSM devices.
215 by the boot-loader before use.
216
217 The uncompressor code port configuration is now handled
218 by CONFIG_S3C_LOWLEVEL_UART_PORT.
219 196
220 config DEBUG_S3C_UART1 197 config DEBUG_MSM_UART2
221 depends on PLAT_SAMSUNG 198 bool "Kernel low-level debugging messages via MSM UART2"
222 bool "Use S3C UART 1 for low-level debug" 199 depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50
223 help 200 help
224 Say Y here if you want the debug print routines to direct 201 Say Y here if you want the debug print routines to direct
225 their output to UART 1. The port must have been initialised 202 their output to the second serial port on MSM devices.
226 by the boot-loader before use.
227 203
228 The uncompressor code port configuration is now handled 204 config DEBUG_MSM_UART3
229 by CONFIG_S3C_LOWLEVEL_UART_PORT. 205 bool "Kernel low-level debugging messages via MSM UART3"
206 depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50
207 help
208 Say Y here if you want the debug print routines to direct
209 their output to the third serial port on MSM devices.
230 210
231 config DEBUG_S3C_UART2 211 config DEBUG_MSM8660_UART
232 depends on PLAT_SAMSUNG 212 bool "Kernel low-level debugging messages via MSM 8660 UART"
233 bool "Use S3C UART 2 for low-level debug" 213 depends on ARCH_MSM8X60
214 select MSM_HAS_DEBUG_UART_HS
234 help 215 help
235 Say Y here if you want the debug print routines to direct 216 Say Y here if you want the debug print routines to direct
236 their output to UART 2. The port must have been initialised 217 their output to the serial port on MSM 8660 devices.
237 by the boot-loader before use.
238 218
239 The uncompressor code port configuration is now handled 219 config DEBUG_MSM8960_UART
240 by CONFIG_S3C_LOWLEVEL_UART_PORT. 220 bool "Kernel low-level debugging messages via MSM 8960 UART"
221 depends on ARCH_MSM8960
222 select MSM_HAS_DEBUG_UART_HS
223 help
224 Say Y here if you want the debug print routines to direct
225 their output to the serial port on MSM 8960 devices.
241 226
242 config DEBUG_REALVIEW_STD_PORT 227 config DEBUG_REALVIEW_STD_PORT
243 bool "RealView Default UART" 228 bool "RealView Default UART"
@@ -255,42 +240,57 @@ choice
255 their output to the standard serial port on the RealView 240 their output to the standard serial port on the RealView
256 PB1176 platform. 241 PB1176 platform.
257 242
258 config DEBUG_MSM_UART1 243 config DEBUG_S3C_UART0
259 bool "Kernel low-level debugging messages via MSM UART1" 244 depends on PLAT_SAMSUNG
260 depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50 245 bool "Use S3C UART 0 for low-level debug"
261 help 246 help
262 Say Y here if you want the debug print routines to direct 247 Say Y here if you want the debug print routines to direct
263 their output to the first serial port on MSM devices. 248 their output to UART 0. The port must have been initialised
249 by the boot-loader before use.
264 250
265 config DEBUG_MSM_UART2 251 The uncompressor code port configuration is now handled
266 bool "Kernel low-level debugging messages via MSM UART2" 252 by CONFIG_S3C_LOWLEVEL_UART_PORT.
267 depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50 253
254 config DEBUG_S3C_UART1
255 depends on PLAT_SAMSUNG
256 bool "Use S3C UART 1 for low-level debug"
268 help 257 help
269 Say Y here if you want the debug print routines to direct 258 Say Y here if you want the debug print routines to direct
270 their output to the second serial port on MSM devices. 259 their output to UART 1. The port must have been initialised
260 by the boot-loader before use.
271 261
272 config DEBUG_MSM_UART3 262 The uncompressor code port configuration is now handled
273 bool "Kernel low-level debugging messages via MSM UART3" 263 by CONFIG_S3C_LOWLEVEL_UART_PORT.
274 depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50 264
265 config DEBUG_S3C_UART2
266 depends on PLAT_SAMSUNG
267 bool "Use S3C UART 2 for low-level debug"
275 help 268 help
276 Say Y here if you want the debug print routines to direct 269 Say Y here if you want the debug print routines to direct
277 their output to the third serial port on MSM devices. 270 their output to UART 2. The port must have been initialised
271 by the boot-loader before use.
278 272
279 config DEBUG_MSM8660_UART 273 The uncompressor code port configuration is now handled
280 bool "Kernel low-level debugging messages via MSM 8660 UART" 274 by CONFIG_S3C_LOWLEVEL_UART_PORT.
281 depends on ARCH_MSM8X60 275
282 select MSM_HAS_DEBUG_UART_HS 276 config DEBUG_LL_UART_NONE
277 bool "No low-level debugging UART"
283 help 278 help
284 Say Y here if you want the debug print routines to direct 279 Say Y here if your platform doesn't provide a UART option
285 their output to the serial port on MSM 8660 devices. 280 below. This relies on your platform choosing the right UART
281 definition internally in order for low-level debugging to
282 work.
286 283
287 config DEBUG_MSM8960_UART 284 config DEBUG_ICEDCC
288 bool "Kernel low-level debugging messages via MSM 8960 UART" 285 bool "Kernel low-level debugging via EmbeddedICE DCC channel"
289 depends on ARCH_MSM8960
290 select MSM_HAS_DEBUG_UART_HS
291 help 286 help
292 Say Y here if you want the debug print routines to direct 287 Say Y here if you want the debug print routines to direct
293 their output to the serial port on MSM 8960 devices. 288 their output to the EmbeddedICE macrocell's DCC channel using
289 co-processor 14. This is known to work on the ARM9 style ICE
290 channel and on the XScale with the PEEDI.
291
292 Note that the system will appear to hang during boot if there
293 is nothing connected to read from the DCC.
294 294
295endchoice 295endchoice
296 296
diff --git a/arch/arm/include/asm/hardware/entry-macro-iomd.S b/arch/arm/include/asm/hardware/entry-macro-iomd.S
index e0af4983723..8c215acd9b5 100644
--- a/arch/arm/include/asm/hardware/entry-macro-iomd.S
+++ b/arch/arm/include/asm/hardware/entry-macro-iomd.S
@@ -11,14 +11,6 @@
11/* IOC / IOMD based hardware */ 11/* IOC / IOMD based hardware */
12#include <asm/hardware/iomd.h> 12#include <asm/hardware/iomd.h>
13 13
14 .macro disable_fiq
15 mov r12, #ioc_base_high
16 .if ioc_base_low
17 orr r12, r12, #ioc_base_low
18 .endif
19 strb r12, [r12, #0x38] @ Disable FIQ register
20 .endm
21
22 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp 14 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
23 ldrb \irqstat, [\base, #IOMD_IRQREQB] @ get high priority first 15 ldrb \irqstat, [\base, #IOMD_IRQREQB] @ get high priority first
24 ldr \tmp, =irq_prio_h 16 ldr \tmp, =irq_prio_h
diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h
index e4c96cc6ec0..424aa458c48 100644
--- a/arch/arm/include/asm/system.h
+++ b/arch/arm/include/asm/system.h
@@ -110,6 +110,7 @@ extern void cpu_init(void);
110 110
111void soft_restart(unsigned long); 111void soft_restart(unsigned long);
112extern void (*arm_pm_restart)(char str, const char *cmd); 112extern void (*arm_pm_restart)(char str, const char *cmd);
113extern void (*arm_pm_idle)(void);
113 114
114#define UDBG_UNDEFINED (1 << 0) 115#define UDBG_UNDEFINED (1 << 0)
115#define UDBG_SYSCALL (1 << 1) 116#define UDBG_SYSCALL (1 << 1)
diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S
index be16a48007b..22f0ed324f3 100644
--- a/arch/arm/kernel/entry-armv.S
+++ b/arch/arm/kernel/entry-armv.S
@@ -19,7 +19,9 @@
19#include <asm/glue-df.h> 19#include <asm/glue-df.h>
20#include <asm/glue-pf.h> 20#include <asm/glue-pf.h>
21#include <asm/vfpmacros.h> 21#include <asm/vfpmacros.h>
22#ifndef CONFIG_MULTI_IRQ_HANDLER
22#include <mach/entry-macro.S> 23#include <mach/entry-macro.S>
24#endif
23#include <asm/thread_notify.h> 25#include <asm/thread_notify.h>
24#include <asm/unwind.h> 26#include <asm/unwind.h>
25#include <asm/unistd.h> 27#include <asm/unistd.h>
@@ -1101,7 +1103,6 @@ __stubs_start:
1101 * get out of that mode without clobbering one register. 1103 * get out of that mode without clobbering one register.
1102 */ 1104 */
1103vector_fiq: 1105vector_fiq:
1104 disable_fiq
1105 subs pc, lr, #4 1106 subs pc, lr, #4
1106 1107
1107/*============================================================================= 1108/*=============================================================================
diff --git a/arch/arm/kernel/entry-common.S b/arch/arm/kernel/entry-common.S
index 9fd0ba90c1d..54ee265dd81 100644
--- a/arch/arm/kernel/entry-common.S
+++ b/arch/arm/kernel/entry-common.S
@@ -10,9 +10,15 @@
10 10
11#include <asm/unistd.h> 11#include <asm/unistd.h>
12#include <asm/ftrace.h> 12#include <asm/ftrace.h>
13#include <mach/entry-macro.S>
14#include <asm/unwind.h> 13#include <asm/unwind.h>
15 14
15#ifdef CONFIG_NEED_RET_TO_USER
16#include <mach/entry-macro.S>
17#else
18 .macro arch_ret_to_user, tmp1, tmp2
19 .endm
20#endif
21
16#include "entry-header.S" 22#include "entry-header.S"
17 23
18 24
diff --git a/arch/arm/kernel/process.c b/arch/arm/kernel/process.c
index 971d65c253a..008e7ce766a 100644
--- a/arch/arm/kernel/process.c
+++ b/arch/arm/kernel/process.c
@@ -61,8 +61,6 @@ extern void setup_mm_for_reboot(void);
61 61
62static volatile int hlt_counter; 62static volatile int hlt_counter;
63 63
64#include <mach/system.h>
65
66void disable_hlt(void) 64void disable_hlt(void)
67{ 65{
68 hlt_counter++; 66 hlt_counter++;
@@ -181,13 +179,17 @@ void cpu_idle_wait(void)
181EXPORT_SYMBOL_GPL(cpu_idle_wait); 179EXPORT_SYMBOL_GPL(cpu_idle_wait);
182 180
183/* 181/*
184 * This is our default idle handler. We need to disable 182 * This is our default idle handler.
185 * interrupts here to ensure we don't miss a wakeup call.
186 */ 183 */
184
185void (*arm_pm_idle)(void);
186
187static void default_idle(void) 187static void default_idle(void)
188{ 188{
189 if (!need_resched()) 189 if (arm_pm_idle)
190 arch_idle(); 190 arm_pm_idle();
191 else
192 cpu_do_idle();
191 local_irq_enable(); 193 local_irq_enable();
192} 194}
193 195
@@ -215,6 +217,10 @@ void cpu_idle(void)
215 cpu_die(); 217 cpu_die();
216#endif 218#endif
217 219
220 /*
221 * We need to disable interrupts here
222 * to ensure we don't miss a wakeup call.
223 */
218 local_irq_disable(); 224 local_irq_disable();
219#ifdef CONFIG_PL310_ERRATA_769419 225#ifdef CONFIG_PL310_ERRATA_769419
220 wmb(); 226 wmb();
@@ -222,19 +228,18 @@ void cpu_idle(void)
222 if (hlt_counter) { 228 if (hlt_counter) {
223 local_irq_enable(); 229 local_irq_enable();
224 cpu_relax(); 230 cpu_relax();
225 } else { 231 } else if (!need_resched()) {
226 stop_critical_timings(); 232 stop_critical_timings();
227 if (cpuidle_idle_call()) 233 if (cpuidle_idle_call())
228 pm_idle(); 234 pm_idle();
229 start_critical_timings(); 235 start_critical_timings();
230 /* 236 /*
231 * This will eventually be removed - pm_idle 237 * pm_idle functions must always
232 * functions should always return with IRQs 238 * return with IRQs enabled.
233 * enabled.
234 */ 239 */
235 WARN_ON(irqs_disabled()); 240 WARN_ON(irqs_disabled());
241 } else
236 local_irq_enable(); 242 local_irq_enable();
237 }
238 } 243 }
239 leds_event(led_idle_end); 244 leds_event(led_idle_end);
240 rcu_idle_exit(); 245 rcu_idle_exit();
diff --git a/arch/arm/mach-at91/at91cap9.c b/arch/arm/mach-at91/at91cap9.c
index a42edc25a87..8967d75c2ea 100644
--- a/arch/arm/mach-at91/at91cap9.c
+++ b/arch/arm/mach-at91/at91cap9.c
@@ -14,6 +14,7 @@
14 14
15#include <linux/module.h> 15#include <linux/module.h>
16 16
17#include <asm/proc-fns.h>
17#include <asm/irq.h> 18#include <asm/irq.h>
18#include <asm/mach/arch.h> 19#include <asm/mach/arch.h>
19#include <asm/mach/map.h> 20#include <asm/mach/map.h>
@@ -313,6 +314,12 @@ static struct at91_gpio_bank at91cap9_gpio[] __initdata = {
313 } 314 }
314}; 315};
315 316
317static void at91cap9_idle(void)
318{
319 at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK);
320 cpu_do_idle();
321}
322
316/* -------------------------------------------------------------------- 323/* --------------------------------------------------------------------
317 * AT91CAP9 processor initialization 324 * AT91CAP9 processor initialization
318 * -------------------------------------------------------------------- */ 325 * -------------------------------------------------------------------- */
@@ -332,6 +339,7 @@ static void __init at91cap9_ioremap_registers(void)
332 339
333static void __init at91cap9_initialize(void) 340static void __init at91cap9_initialize(void)
334{ 341{
342 arm_pm_idle = at91cap9_idle;
335 arm_pm_restart = at91sam9g45_restart; 343 arm_pm_restart = at91sam9g45_restart;
336 at91_extern_irq = (1 << AT91CAP9_ID_IRQ0) | (1 << AT91CAP9_ID_IRQ1); 344 at91_extern_irq = (1 << AT91CAP9_ID_IRQ0) | (1 << AT91CAP9_ID_IRQ1);
337 345
diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c
index 99c3174e24a..dd6e2de1342 100644
--- a/arch/arm/mach-at91/at91rm9200.c
+++ b/arch/arm/mach-at91/at91rm9200.c
@@ -289,6 +289,15 @@ static struct at91_gpio_bank at91rm9200_gpio[] __initdata = {
289 } 289 }
290}; 290};
291 291
292static void at91rm9200_idle(void)
293{
294 /*
295 * Disable the processor clock. The processor will be automatically
296 * re-enabled by an interrupt or by a reset.
297 */
298 at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK);
299}
300
292static void at91rm9200_restart(char mode, const char *cmd) 301static void at91rm9200_restart(char mode, const char *cmd)
293{ 302{
294 /* 303 /*
@@ -314,6 +323,7 @@ static void __init at91rm9200_ioremap_registers(void)
314 323
315static void __init at91rm9200_initialize(void) 324static void __init at91rm9200_initialize(void)
316{ 325{
326 arm_pm_idle = at91rm9200_idle;
317 arm_pm_restart = at91rm9200_restart; 327 arm_pm_restart = at91rm9200_restart;
318 at91_extern_irq = (1 << AT91RM9200_ID_IRQ0) | (1 << AT91RM9200_ID_IRQ1) 328 at91_extern_irq = (1 << AT91RM9200_ID_IRQ0) | (1 << AT91RM9200_ID_IRQ1)
319 | (1 << AT91RM9200_ID_IRQ2) | (1 << AT91RM9200_ID_IRQ3) 329 | (1 << AT91RM9200_ID_IRQ2) | (1 << AT91RM9200_ID_IRQ3)
diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c
index d4036ba4361..9ac8c6fe336 100644
--- a/arch/arm/mach-at91/at91sam9260.c
+++ b/arch/arm/mach-at91/at91sam9260.c
@@ -12,6 +12,7 @@
12 12
13#include <linux/module.h> 13#include <linux/module.h>
14 14
15#include <asm/proc-fns.h>
15#include <asm/irq.h> 16#include <asm/irq.h>
16#include <asm/mach/arch.h> 17#include <asm/mach/arch.h>
17#include <asm/mach/map.h> 18#include <asm/mach/map.h>
@@ -328,8 +329,15 @@ static void __init at91sam9260_ioremap_registers(void)
328 at91sam9_ioremap_smc(0, AT91SAM9260_BASE_SMC); 329 at91sam9_ioremap_smc(0, AT91SAM9260_BASE_SMC);
329} 330}
330 331
332static void at91sam9260_idle(void)
333{
334 at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK);
335 cpu_do_idle();
336}
337
331static void __init at91sam9260_initialize(void) 338static void __init at91sam9260_initialize(void)
332{ 339{
340 arm_pm_idle = at91sam9260_idle;
333 arm_pm_restart = at91sam9_alt_restart; 341 arm_pm_restart = at91sam9_alt_restart;
334 at91_extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1) 342 at91_extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1)
335 | (1 << AT91SAM9260_ID_IRQ2); 343 | (1 << AT91SAM9260_ID_IRQ2);
diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c
index 023c2ff138d..ab76868f01f 100644
--- a/arch/arm/mach-at91/at91sam9261.c
+++ b/arch/arm/mach-at91/at91sam9261.c
@@ -12,6 +12,7 @@
12 12
13#include <linux/module.h> 13#include <linux/module.h>
14 14
15#include <asm/proc-fns.h>
15#include <asm/irq.h> 16#include <asm/irq.h>
16#include <asm/mach/arch.h> 17#include <asm/mach/arch.h>
17#include <asm/mach/map.h> 18#include <asm/mach/map.h>
@@ -286,8 +287,15 @@ static void __init at91sam9261_ioremap_registers(void)
286 at91sam9_ioremap_smc(0, AT91SAM9261_BASE_SMC); 287 at91sam9_ioremap_smc(0, AT91SAM9261_BASE_SMC);
287} 288}
288 289
290static void at91sam9261_idle(void)
291{
292 at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK);
293 cpu_do_idle();
294}
295
289static void __init at91sam9261_initialize(void) 296static void __init at91sam9261_initialize(void)
290{ 297{
298 arm_pm_idle = at91sam9261_idle;
291 arm_pm_restart = at91sam9_alt_restart; 299 arm_pm_restart = at91sam9_alt_restart;
292 at91_extern_irq = (1 << AT91SAM9261_ID_IRQ0) | (1 << AT91SAM9261_ID_IRQ1) 300 at91_extern_irq = (1 << AT91SAM9261_ID_IRQ0) | (1 << AT91SAM9261_ID_IRQ1)
293 | (1 << AT91SAM9261_ID_IRQ2); 301 | (1 << AT91SAM9261_ID_IRQ2);
diff --git a/arch/arm/mach-at91/at91sam9263.c b/arch/arm/mach-at91/at91sam9263.c
index 75e876c258a..247ab633abc 100644
--- a/arch/arm/mach-at91/at91sam9263.c
+++ b/arch/arm/mach-at91/at91sam9263.c
@@ -12,6 +12,7 @@
12 12
13#include <linux/module.h> 13#include <linux/module.h>
14 14
15#include <asm/proc-fns.h>
15#include <asm/irq.h> 16#include <asm/irq.h>
16#include <asm/mach/arch.h> 17#include <asm/mach/arch.h>
17#include <asm/mach/map.h> 18#include <asm/mach/map.h>
@@ -307,8 +308,15 @@ static void __init at91sam9263_ioremap_registers(void)
307 at91sam9_ioremap_smc(1, AT91SAM9263_BASE_SMC1); 308 at91sam9_ioremap_smc(1, AT91SAM9263_BASE_SMC1);
308} 309}
309 310
311static void at91sam9263_idle(void)
312{
313 at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK);
314 cpu_do_idle();
315}
316
310static void __init at91sam9263_initialize(void) 317static void __init at91sam9263_initialize(void)
311{ 318{
319 arm_pm_idle = at91sam9263_idle;
312 arm_pm_restart = at91sam9_alt_restart; 320 arm_pm_restart = at91sam9_alt_restart;
313 at91_extern_irq = (1 << AT91SAM9263_ID_IRQ0) | (1 << AT91SAM9263_ID_IRQ1); 321 at91_extern_irq = (1 << AT91SAM9263_ID_IRQ0) | (1 << AT91SAM9263_ID_IRQ1);
314 322
diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c
index 1cb6a96b1c1..5b12192e52e 100644
--- a/arch/arm/mach-at91/at91sam9g45.c
+++ b/arch/arm/mach-at91/at91sam9g45.c
@@ -317,6 +317,12 @@ static struct at91_gpio_bank at91sam9g45_gpio[] __initdata = {
317 } 317 }
318}; 318};
319 319
320static void at91sam9g45_idle(void)
321{
322 at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK);
323 cpu_do_idle();
324}
325
320/* -------------------------------------------------------------------- 326/* --------------------------------------------------------------------
321 * AT91SAM9G45 processor initialization 327 * AT91SAM9G45 processor initialization
322 * -------------------------------------------------------------------- */ 328 * -------------------------------------------------------------------- */
@@ -337,6 +343,7 @@ static void __init at91sam9g45_ioremap_registers(void)
337 343
338static void __init at91sam9g45_initialize(void) 344static void __init at91sam9g45_initialize(void)
339{ 345{
346 arm_pm_idle = at91sam9g45_idle;
340 arm_pm_restart = at91sam9g45_restart; 347 arm_pm_restart = at91sam9g45_restart;
341 at91_extern_irq = (1 << AT91SAM9G45_ID_IRQ0); 348 at91_extern_irq = (1 << AT91SAM9G45_ID_IRQ0);
342 349
diff --git a/arch/arm/mach-at91/at91sam9rl.c b/arch/arm/mach-at91/at91sam9rl.c
index d2c91a841cb..fd60e226a98 100644
--- a/arch/arm/mach-at91/at91sam9rl.c
+++ b/arch/arm/mach-at91/at91sam9rl.c
@@ -11,6 +11,7 @@
11 11
12#include <linux/module.h> 12#include <linux/module.h>
13 13
14#include <asm/proc-fns.h>
14#include <asm/irq.h> 15#include <asm/irq.h>
15#include <asm/mach/arch.h> 16#include <asm/mach/arch.h>
16#include <asm/mach/map.h> 17#include <asm/mach/map.h>
@@ -291,8 +292,15 @@ static void __init at91sam9rl_ioremap_registers(void)
291 at91sam9_ioremap_smc(0, AT91SAM9RL_BASE_SMC); 292 at91sam9_ioremap_smc(0, AT91SAM9RL_BASE_SMC);
292} 293}
293 294
295static void at91sam9rl_idle(void)
296{
297 at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK);
298 cpu_do_idle();
299}
300
294static void __init at91sam9rl_initialize(void) 301static void __init at91sam9rl_initialize(void)
295{ 302{
303 arm_pm_idle = at91sam9rl_idle;
296 arm_pm_restart = at91sam9_alt_restart; 304 arm_pm_restart = at91sam9_alt_restart;
297 at91_extern_irq = (1 << AT91SAM9RL_ID_IRQ0); 305 at91_extern_irq = (1 << AT91SAM9RL_ID_IRQ0);
298 306
diff --git a/arch/arm/mach-at91/at91x40.c b/arch/arm/mach-at91/at91x40.c
index 56ba3bd035a..0154b7f44ff 100644
--- a/arch/arm/mach-at91/at91x40.c
+++ b/arch/arm/mach-at91/at91x40.c
@@ -13,6 +13,7 @@
13#include <linux/kernel.h> 13#include <linux/kernel.h>
14#include <linux/init.h> 14#include <linux/init.h>
15#include <linux/irq.h> 15#include <linux/irq.h>
16#include <asm/proc-fns.h>
16#include <asm/mach/arch.h> 17#include <asm/mach/arch.h>
17#include <mach/at91x40.h> 18#include <mach/at91x40.h>
18#include <mach/at91_st.h> 19#include <mach/at91_st.h>
@@ -37,8 +38,19 @@ unsigned long clk_get_rate(struct clk *clk)
37 return AT91X40_MASTER_CLOCK; 38 return AT91X40_MASTER_CLOCK;
38} 39}
39 40
41static void at91x40_idle(void)
42{
43 /*
44 * Disable the processor clock. The processor will be automatically
45 * re-enabled by an interrupt or by a reset.
46 */
47 at91_sys_write(AT91_PS_CR, AT91_PS_CR_CPU);
48 cpu_do_idle();
49}
50
40void __init at91x40_initialize(unsigned long main_clock) 51void __init at91x40_initialize(unsigned long main_clock)
41{ 52{
53 arm_pm_idle = at91x40_idle;
42 at91_extern_irq = (1 << AT91X40_ID_IRQ0) | (1 << AT91X40_ID_IRQ1) 54 at91_extern_irq = (1 << AT91X40_ID_IRQ0) | (1 << AT91X40_ID_IRQ1)
43 | (1 << AT91X40_ID_IRQ2); 55 | (1 << AT91X40_ID_IRQ2);
44} 56}
diff --git a/arch/arm/mach-at91/include/mach/entry-macro.S b/arch/arm/mach-at91/include/mach/entry-macro.S
index 423eea0ed74..903bf205a33 100644
--- a/arch/arm/mach-at91/include/mach/entry-macro.S
+++ b/arch/arm/mach-at91/include/mach/entry-macro.S
@@ -13,17 +13,11 @@
13#include <mach/hardware.h> 13#include <mach/hardware.h>
14#include <mach/at91_aic.h> 14#include <mach/at91_aic.h>
15 15
16 .macro disable_fiq
17 .endm
18
19 .macro get_irqnr_preamble, base, tmp 16 .macro get_irqnr_preamble, base, tmp
20 ldr \base, =at91_aic_base @ base virtual address of AIC peripheral 17 ldr \base, =at91_aic_base @ base virtual address of AIC peripheral
21 ldr \base, [\base] 18 ldr \base, [\base]
22 .endm 19 .endm
23 20
24 .macro arch_ret_to_user, tmp1, tmp2
25 .endm
26
27 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp 21 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
28 ldr \irqnr, [\base, #AT91_AIC_IVR] @ read IRQ vector register: de-asserts nIRQ to processor (and clears interrupt) 22 ldr \irqnr, [\base, #AT91_AIC_IVR] @ read IRQ vector register: de-asserts nIRQ to processor (and clears interrupt)
29 ldr \irqstat, [\base, #AT91_AIC_ISR] @ read interrupt source number 23 ldr \irqstat, [\base, #AT91_AIC_ISR] @ read interrupt source number
diff --git a/arch/arm/mach-at91/include/mach/system.h b/arch/arm/mach-at91/include/mach/system.h
deleted file mode 100644
index cbd64f3bcec..00000000000
--- a/arch/arm/mach-at91/include/mach/system.h
+++ /dev/null
@@ -1,50 +0,0 @@
1/*
2 * arch/arm/mach-at91/include/mach/system.h
3 *
4 * Copyright (C) 2003 SAN People
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
21#ifndef __ASM_ARCH_SYSTEM_H
22#define __ASM_ARCH_SYSTEM_H
23
24#include <mach/hardware.h>
25#include <mach/at91_st.h>
26#include <mach/at91_dbgu.h>
27#include <mach/at91_pmc.h>
28
29static inline void arch_idle(void)
30{
31 /*
32 * Disable the processor clock. The processor will be automatically
33 * re-enabled by an interrupt or by a reset.
34 */
35#ifdef AT91_PS
36 at91_sys_write(AT91_PS_CR, AT91_PS_CR_CPU);
37#else
38 at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK);
39#endif
40#ifndef CONFIG_CPU_ARM920T
41 /*
42 * Set the processor (CP15) into 'Wait for Interrupt' mode.
43 * Post-RM9200 processors need this in conjunction with the above
44 * to save power when idle.
45 */
46 cpu_do_idle();
47#endif
48}
49
50#endif
diff --git a/arch/arm/mach-bcmring/core.c b/arch/arm/mach-bcmring/core.c
index 6b67b7e8426..22e4e0a28ad 100644
--- a/arch/arm/mach-bcmring/core.c
+++ b/arch/arm/mach-bcmring/core.c
@@ -52,27 +52,8 @@
52#include <mach/csp/chipcHw_inline.h> 52#include <mach/csp/chipcHw_inline.h>
53#include <mach/csp/tmrHw_reg.h> 53#include <mach/csp/tmrHw_reg.h>
54 54
55#define AMBA_DEVICE(name, initname, base, plat, size) \ 55static AMBA_APB_DEVICE(uartA, "uarta", MM_ADDR_IO_UARTA, { IRQ_UARTA }, NULL);
56static struct amba_device name##_device = { \ 56static AMBA_APB_DEVICE(uartB, "uartb", MM_ADDR_IO_UARTB, { IRQ_UARTB }, NULL);
57 .dev = { \
58 .coherent_dma_mask = ~0, \
59 .init_name = initname, \
60 .platform_data = plat \
61 }, \
62 .res = { \
63 .start = MM_ADDR_IO_##base, \
64 .end = MM_ADDR_IO_##base + (size) - 1, \
65 .flags = IORESOURCE_MEM \
66 }, \
67 .dma_mask = ~0, \
68 .irq = { \
69 IRQ_##base \
70 } \
71}
72
73
74AMBA_DEVICE(uartA, "uarta", UARTA, NULL, SZ_4K);
75AMBA_DEVICE(uartB, "uartb", UARTB, NULL, SZ_4K);
76 57
77static struct clk pll1_clk = { 58static struct clk pll1_clk = {
78 .name = "PLL1", 59 .name = "PLL1",
diff --git a/arch/arm/mach-bcmring/include/mach/entry-macro.S b/arch/arm/mach-bcmring/include/mach/entry-macro.S
index 94c950d783b..2f316f0e6e6 100644
--- a/arch/arm/mach-bcmring/include/mach/entry-macro.S
+++ b/arch/arm/mach-bcmring/include/mach/entry-macro.S
@@ -21,9 +21,6 @@
21#include <mach/hardware.h> 21#include <mach/hardware.h>
22#include <mach/csp/mm_io.h> 22#include <mach/csp/mm_io.h>
23 23
24 .macro disable_fiq
25 .endm
26
27 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp 24 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
28 ldr \base, =(MM_IO_BASE_INTC0) 25 ldr \base, =(MM_IO_BASE_INTC0)
29 ldr \irqstat, [\base, #0] @ get status 26 ldr \irqstat, [\base, #0] @ get status
@@ -77,6 +74,3 @@
77 74
78 .macro get_irqnr_preamble, base, tmp 75 .macro get_irqnr_preamble, base, tmp
79 .endm 76 .endm
80
81 .macro arch_ret_to_user, tmp1, tmp2
82 .endm
diff --git a/arch/arm/mach-bcmring/include/mach/system.h b/arch/arm/mach-bcmring/include/mach/system.h
deleted file mode 100644
index cb78250db64..00000000000
--- a/arch/arm/mach-bcmring/include/mach/system.h
+++ /dev/null
@@ -1,28 +0,0 @@
1/*
2 *
3 * Copyright (C) 1999 ARM Limited
4 * Copyright (C) 2000 Deep Blue Solutions Ltd
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20#ifndef __ASM_ARCH_SYSTEM_H
21#define __ASM_ARCH_SYSTEM_H
22
23static inline void arch_idle(void)
24{
25 cpu_do_idle();
26}
27
28#endif
diff --git a/arch/arm/mach-clps711x/common.c b/arch/arm/mach-clps711x/common.c
index ab1711b9b4d..8736c1acc16 100644
--- a/arch/arm/mach-clps711x/common.c
+++ b/arch/arm/mach-clps711x/common.c
@@ -225,3 +225,19 @@ void clps711x_restart(char mode, const char *cmd)
225{ 225{
226 soft_restart(0); 226 soft_restart(0);
227} 227}
228
229static void clps711x_idle(void)
230{
231 clps_writel(1, HALT);
232 __asm__ __volatile__(
233 "mov r0, r0\n\
234 mov r0, r0");
235}
236
237static int __init clps711x_idle_init(void)
238{
239 arm_pm_idle = clps711x_idle;
240 return 0;
241}
242
243arch_initcall(clps711x_idle_init);
diff --git a/arch/arm/mach-clps711x/include/mach/entry-macro.S b/arch/arm/mach-clps711x/include/mach/entry-macro.S
index 90fa2f70489..125af59d7a2 100644
--- a/arch/arm/mach-clps711x/include/mach/entry-macro.S
+++ b/arch/arm/mach-clps711x/include/mach/entry-macro.S
@@ -10,15 +10,9 @@
10#include <mach/hardware.h> 10#include <mach/hardware.h>
11#include <asm/hardware/clps7111.h> 11#include <asm/hardware/clps7111.h>
12 12
13 .macro disable_fiq
14 .endm
15
16 .macro get_irqnr_preamble, base, tmp 13 .macro get_irqnr_preamble, base, tmp
17 .endm 14 .endm
18 15
19 .macro arch_ret_to_user, tmp1, tmp2
20 .endm
21
22#if (INTSR2 - INTSR1) != (INTMR2 - INTMR1) 16#if (INTSR2 - INTSR1) != (INTMR2 - INTMR1)
23#error INTSR stride != INTMR stride 17#error INTSR stride != INTMR stride
24#endif 18#endif
diff --git a/arch/arm/mach-clps711x/include/mach/system.h b/arch/arm/mach-clps711x/include/mach/system.h
deleted file mode 100644
index 23d6ef8c84d..00000000000
--- a/arch/arm/mach-clps711x/include/mach/system.h
+++ /dev/null
@@ -1,35 +0,0 @@
1/*
2 * arch/arm/mach-clps711x/include/mach/system.h
3 *
4 * Copyright (C) 2000 Deep Blue Solutions Ltd
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20#ifndef __ASM_ARCH_SYSTEM_H
21#define __ASM_ARCH_SYSTEM_H
22
23#include <linux/io.h>
24#include <mach/hardware.h>
25#include <asm/hardware/clps7111.h>
26
27static inline void arch_idle(void)
28{
29 clps_writel(1, HALT);
30 __asm__ __volatile__(
31 "mov r0, r0\n\
32 mov r0, r0");
33}
34
35#endif
diff --git a/arch/arm/mach-cns3xxx/include/mach/entry-macro.S b/arch/arm/mach-cns3xxx/include/mach/entry-macro.S
deleted file mode 100644
index 01c57df5f71..00000000000
--- a/arch/arm/mach-cns3xxx/include/mach/entry-macro.S
+++ /dev/null
@@ -1,15 +0,0 @@
1/*
2 * Low-level IRQ helper macros for Cavium Networks platforms
3 *
4 * Copyright 2008 Cavium Networks
5 *
6 * This file is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License, Version 2, as
8 * published by the Free Software Foundation.
9 */
10
11 .macro disable_fiq
12 .endm
13
14 .macro arch_ret_to_user, tmp1, tmp2
15 .endm
diff --git a/arch/arm/mach-cns3xxx/include/mach/system.h b/arch/arm/mach-cns3xxx/include/mach/system.h
deleted file mode 100644
index 9e56b7dc133..00000000000
--- a/arch/arm/mach-cns3xxx/include/mach/system.h
+++ /dev/null
@@ -1,25 +0,0 @@
1/*
2 * Copyright 2000 Deep Blue Solutions Ltd
3 * Copyright 2003 ARM Limited
4 * Copyright 2008 Cavium Networks
5 *
6 * This file is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License, Version 2, as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __MACH_SYSTEM_H
12#define __MACH_SYSTEM_H
13
14#include <asm/proc-fns.h>
15
16static inline void arch_idle(void)
17{
18 /*
19 * This should do all the clock switching
20 * and wait for interrupt tricks
21 */
22 cpu_do_idle();
23}
24
25#endif
diff --git a/arch/arm/mach-davinci/include/mach/entry-macro.S b/arch/arm/mach-davinci/include/mach/entry-macro.S
index e14c0dc0e12..c1661d2feca 100644
--- a/arch/arm/mach-davinci/include/mach/entry-macro.S
+++ b/arch/arm/mach-davinci/include/mach/entry-macro.S
@@ -11,17 +11,11 @@
11#include <mach/io.h> 11#include <mach/io.h>
12#include <mach/irqs.h> 12#include <mach/irqs.h>
13 13
14 .macro disable_fiq
15 .endm
16
17 .macro get_irqnr_preamble, base, tmp 14 .macro get_irqnr_preamble, base, tmp
18 ldr \base, =davinci_intc_base 15 ldr \base, =davinci_intc_base
19 ldr \base, [\base] 16 ldr \base, [\base]
20 .endm 17 .endm
21 18
22 .macro arch_ret_to_user, tmp1, tmp2
23 .endm
24
25 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp 19 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
26#if defined(CONFIG_AINTC) && defined(CONFIG_CP_INTC) 20#if defined(CONFIG_AINTC) && defined(CONFIG_CP_INTC)
27 ldr \tmp, =davinci_intc_type 21 ldr \tmp, =davinci_intc_type
diff --git a/arch/arm/mach-davinci/include/mach/system.h b/arch/arm/mach-davinci/include/mach/system.h
deleted file mode 100644
index fcb7a015aba..00000000000
--- a/arch/arm/mach-davinci/include/mach/system.h
+++ /dev/null
@@ -1,21 +0,0 @@
1/*
2 * DaVinci system defines
3 *
4 * Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com>
5 *
6 * 2007 (c) MontaVista Software, Inc. This file is licensed under
7 * the terms of the GNU General Public License version 2. This program
8 * is licensed "as is" without any warranty of any kind, whether express
9 * or implied.
10 */
11#ifndef __ASM_ARCH_SYSTEM_H
12#define __ASM_ARCH_SYSTEM_H
13
14#include <mach/common.h>
15
16static inline void arch_idle(void)
17{
18 cpu_do_idle();
19}
20
21#endif /* __ASM_ARCH_SYSTEM_H */
diff --git a/arch/arm/mach-dove/include/mach/entry-macro.S b/arch/arm/mach-dove/include/mach/entry-macro.S
index e84c78c2a8b..72d622baaad 100644
--- a/arch/arm/mach-dove/include/mach/entry-macro.S
+++ b/arch/arm/mach-dove/include/mach/entry-macro.S
@@ -10,12 +10,6 @@
10 10
11#include <mach/bridge-regs.h> 11#include <mach/bridge-regs.h>
12 12
13 .macro disable_fiq
14 .endm
15
16 .macro arch_ret_to_user, tmp1, tmp2
17 .endm
18
19 .macro get_irqnr_preamble, base, tmp 13 .macro get_irqnr_preamble, base, tmp
20 ldr \base, =IRQ_VIRT_BASE 14 ldr \base, =IRQ_VIRT_BASE
21 .endm 15 .endm
diff --git a/arch/arm/mach-dove/include/mach/system.h b/arch/arm/mach-dove/include/mach/system.h
deleted file mode 100644
index 3027954f616..00000000000
--- a/arch/arm/mach-dove/include/mach/system.h
+++ /dev/null
@@ -1,17 +0,0 @@
1/*
2 * arch/arm/mach-dove/include/mach/system.h
3 *
4 * This file is licensed under the terms of the GNU General Public
5 * License version 2. This program is licensed "as is" without any
6 * warranty of any kind, whether express or implied.
7 */
8
9#ifndef __ASM_ARCH_SYSTEM_H
10#define __ASM_ARCH_SYSTEM_H
11
12static inline void arch_idle(void)
13{
14 cpu_do_idle();
15}
16
17#endif
diff --git a/arch/arm/mach-ebsa110/core.c b/arch/arm/mach-ebsa110/core.c
index 294aad07f7a..804c9122b7b 100644
--- a/arch/arm/mach-ebsa110/core.c
+++ b/arch/arm/mach-ebsa110/core.c
@@ -271,8 +271,33 @@ static struct platform_device *ebsa110_devices[] = {
271 &am79c961_device, 271 &am79c961_device,
272}; 272};
273 273
274/*
275 * EBSA110 idling methodology:
276 *
277 * We can not execute the "wait for interrupt" instruction since that
278 * will stop our MCLK signal (which provides the clock for the glue
279 * logic, and therefore the timer interrupt).
280 *
281 * Instead, we spin, polling the IRQ_STAT register for the occurrence
282 * of any interrupt with core clock down to the memory clock.
283 */
284static void ebsa110_idle(void)
285{
286 const char *irq_stat = (char *)0xff000000;
287
288 /* disable clock switching */
289 asm volatile ("mcr p15, 0, ip, c15, c2, 2" : : : "cc");
290
291 /* wait for an interrupt to occur */
292 while (!*irq_stat);
293
294 /* enable clock switching */
295 asm volatile ("mcr p15, 0, ip, c15, c1, 2" : : : "cc");
296}
297
274static int __init ebsa110_init(void) 298static int __init ebsa110_init(void)
275{ 299{
300 arm_pm_idle = ebsa110_idle;
276 return platform_add_devices(ebsa110_devices, ARRAY_SIZE(ebsa110_devices)); 301 return platform_add_devices(ebsa110_devices, ARRAY_SIZE(ebsa110_devices));
277} 302}
278 303
diff --git a/arch/arm/mach-ebsa110/include/mach/entry-macro.S b/arch/arm/mach-ebsa110/include/mach/entry-macro.S
index cc3e5992f6b..14b110de78a 100644
--- a/arch/arm/mach-ebsa110/include/mach/entry-macro.S
+++ b/arch/arm/mach-ebsa110/include/mach/entry-macro.S
@@ -12,16 +12,10 @@
12 12
13#define IRQ_STAT 0xff000000 /* read */ 13#define IRQ_STAT 0xff000000 /* read */
14 14
15 .macro disable_fiq
16 .endm
17
18 .macro get_irqnr_preamble, base, tmp 15 .macro get_irqnr_preamble, base, tmp
19 mov \base, #IRQ_STAT 16 mov \base, #IRQ_STAT
20 .endm 17 .endm
21 18
22 .macro arch_ret_to_user, tmp1, tmp2
23 .endm
24
25 .macro get_irqnr_and_base, irqnr, stat, base, tmp 19 .macro get_irqnr_and_base, irqnr, stat, base, tmp
26 ldrb \stat, [\base] @ get interrupts 20 ldrb \stat, [\base] @ get interrupts
27 mov \irqnr, #0 21 mov \irqnr, #0
diff --git a/arch/arm/mach-ebsa110/include/mach/system.h b/arch/arm/mach-ebsa110/include/mach/system.h
deleted file mode 100644
index 2e4af65edb6..00000000000
--- a/arch/arm/mach-ebsa110/include/mach/system.h
+++ /dev/null
@@ -1,37 +0,0 @@
1/*
2 * arch/arm/mach-ebsa110/include/mach/system.h
3 *
4 * Copyright (C) 1996-2000 Russell King.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#ifndef __ASM_ARCH_SYSTEM_H
11#define __ASM_ARCH_SYSTEM_H
12
13/*
14 * EBSA110 idling methodology:
15 *
16 * We can not execute the "wait for interrupt" instruction since that
17 * will stop our MCLK signal (which provides the clock for the glue
18 * logic, and therefore the timer interrupt).
19 *
20 * Instead, we spin, polling the IRQ_STAT register for the occurrence
21 * of any interrupt with core clock down to the memory clock.
22 */
23static inline void arch_idle(void)
24{
25 const char *irq_stat = (char *)0xff000000;
26
27 /* disable clock switching */
28 asm volatile ("mcr p15, 0, ip, c15, c2, 2" : : : "cc");
29
30 /* wait for an interrupt to occur */
31 while (!*irq_stat);
32
33 /* enable clock switching */
34 asm volatile ("mcr p15, 0, ip, c15, c1, 2" : : : "cc");
35}
36
37#endif
diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c
index 24203f9a679..903edb02fe4 100644
--- a/arch/arm/mach-ep93xx/core.c
+++ b/arch/arm/mach-ep93xx/core.c
@@ -279,48 +279,14 @@ static struct amba_pl010_data ep93xx_uart_data = {
279 .set_mctrl = ep93xx_uart_set_mctrl, 279 .set_mctrl = ep93xx_uart_set_mctrl,
280}; 280};
281 281
282static struct amba_device uart1_device = { 282static AMBA_APB_DEVICE(uart1, "apb:uart1", 0x00041010, EP93XX_UART1_PHYS_BASE,
283 .dev = { 283 { IRQ_EP93XX_UART1 }, &ep93xx_uart_data);
284 .init_name = "apb:uart1",
285 .platform_data = &ep93xx_uart_data,
286 },
287 .res = {
288 .start = EP93XX_UART1_PHYS_BASE,
289 .end = EP93XX_UART1_PHYS_BASE + 0x0fff,
290 .flags = IORESOURCE_MEM,
291 },
292 .irq = { IRQ_EP93XX_UART1, NO_IRQ },
293 .periphid = 0x00041010,
294};
295
296static struct amba_device uart2_device = {
297 .dev = {
298 .init_name = "apb:uart2",
299 .platform_data = &ep93xx_uart_data,
300 },
301 .res = {
302 .start = EP93XX_UART2_PHYS_BASE,
303 .end = EP93XX_UART2_PHYS_BASE + 0x0fff,
304 .flags = IORESOURCE_MEM,
305 },
306 .irq = { IRQ_EP93XX_UART2, NO_IRQ },
307 .periphid = 0x00041010,
308};
309 284
310static struct amba_device uart3_device = { 285static AMBA_APB_DEVICE(uart2, "apb:uart2", 0x00041010, EP93XX_UART2_PHYS_BASE,
311 .dev = { 286 { IRQ_EP93XX_UART2 }, &ep93xx_uart_data);
312 .init_name = "apb:uart3",
313 .platform_data = &ep93xx_uart_data,
314 },
315 .res = {
316 .start = EP93XX_UART3_PHYS_BASE,
317 .end = EP93XX_UART3_PHYS_BASE + 0x0fff,
318 .flags = IORESOURCE_MEM,
319 },
320 .irq = { IRQ_EP93XX_UART3, NO_IRQ },
321 .periphid = 0x00041010,
322};
323 287
288static AMBA_APB_DEVICE(uart3, "apb:uart3", 0x00041010, EP93XX_UART3_PHYS_BASE,
289 { IRQ_EP93XX_UART3 }, &ep93xx_uart_data);
324 290
325static struct resource ep93xx_rtc_resource[] = { 291static struct resource ep93xx_rtc_resource[] = {
326 { 292 {
diff --git a/arch/arm/mach-ep93xx/include/mach/entry-macro.S b/arch/arm/mach-ep93xx/include/mach/entry-macro.S
deleted file mode 100644
index 9be6edcf904..00000000000
--- a/arch/arm/mach-ep93xx/include/mach/entry-macro.S
+++ /dev/null
@@ -1,17 +0,0 @@
1/*
2 * arch/arm/mach-ep93xx/include/mach/entry-macro.S
3 * IRQ demultiplexing for EP93xx
4 *
5 * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or (at
10 * your option) any later version.
11 */
12
13 .macro disable_fiq
14 .endm
15
16 .macro arch_ret_to_user, tmp1, tmp2
17 .endm
diff --git a/arch/arm/mach-ep93xx/include/mach/system.h b/arch/arm/mach-ep93xx/include/mach/system.h
deleted file mode 100644
index b5bec7cb9b5..00000000000
--- a/arch/arm/mach-ep93xx/include/mach/system.h
+++ /dev/null
@@ -1,7 +0,0 @@
1/*
2 * arch/arm/mach-ep93xx/include/mach/system.h
3 */
4static inline void arch_idle(void)
5{
6 cpu_do_idle();
7}
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index c59e1887100..031c1e5b3df 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -201,14 +201,6 @@ static struct map_desc exynos4_iodesc1[] __initdata = {
201 }, 201 },
202}; 202};
203 203
204static void exynos_idle(void)
205{
206 if (!need_resched())
207 cpu_do_idle();
208
209 local_irq_enable();
210}
211
212void exynos4_restart(char mode, const char *cmd) 204void exynos4_restart(char mode, const char *cmd)
213{ 205{
214 __raw_writel(0x1, S5P_SWRESET); 206 __raw_writel(0x1, S5P_SWRESET);
@@ -467,10 +459,6 @@ early_initcall(exynos4_l2x0_cache_init);
467int __init exynos_init(void) 459int __init exynos_init(void)
468{ 460{
469 printk(KERN_INFO "EXYNOS: Initializing architecture\n"); 461 printk(KERN_INFO "EXYNOS: Initializing architecture\n");
470
471 /* set idle function */
472 pm_idle = exynos_idle;
473
474 return device_register(&exynos4_dev); 462 return device_register(&exynos4_dev);
475} 463}
476 464
diff --git a/arch/arm/mach-exynos/dma.c b/arch/arm/mach-exynos/dma.c
index b10fcd270f0..91370def4a7 100644
--- a/arch/arm/mach-exynos/dma.c
+++ b/arch/arm/mach-exynos/dma.c
@@ -74,21 +74,8 @@ struct dma_pl330_platdata exynos4_pdma0_pdata = {
74 .peri_id = pdma0_peri, 74 .peri_id = pdma0_peri,
75}; 75};
76 76
77struct amba_device exynos4_device_pdma0 = { 77AMBA_AHB_DEVICE(exynos4_pdma0, "dma-pl330.0", 0x00041330, EXYNOS4_PA_PDMA0,
78 .dev = { 78 {IRQ_PDMA0}, &exynos4_pdma0_pdata);
79 .init_name = "dma-pl330.0",
80 .dma_mask = &dma_dmamask,
81 .coherent_dma_mask = DMA_BIT_MASK(32),
82 .platform_data = &exynos4_pdma0_pdata,
83 },
84 .res = {
85 .start = EXYNOS4_PA_PDMA0,
86 .end = EXYNOS4_PA_PDMA0 + SZ_4K,
87 .flags = IORESOURCE_MEM,
88 },
89 .irq = {IRQ_PDMA0, NO_IRQ},
90 .periphid = 0x00041330,
91};
92 79
93u8 pdma1_peri[] = { 80u8 pdma1_peri[] = {
94 DMACH_PCM0_RX, 81 DMACH_PCM0_RX,
@@ -123,21 +110,8 @@ struct dma_pl330_platdata exynos4_pdma1_pdata = {
123 .peri_id = pdma1_peri, 110 .peri_id = pdma1_peri,
124}; 111};
125 112
126struct amba_device exynos4_device_pdma1 = { 113AMBA_AHB_DEVICE(exynos4_pdma1, "dma-pl330.1", 0x00041330, EXYNOS4_PA_PDMA1,
127 .dev = { 114 {IRQ_PDMA1}, &exynos4_pdma1_pdata);
128 .init_name = "dma-pl330.1",
129 .dma_mask = &dma_dmamask,
130 .coherent_dma_mask = DMA_BIT_MASK(32),
131 .platform_data = &exynos4_pdma1_pdata,
132 },
133 .res = {
134 .start = EXYNOS4_PA_PDMA1,
135 .end = EXYNOS4_PA_PDMA1 + SZ_4K,
136 .flags = IORESOURCE_MEM,
137 },
138 .irq = {IRQ_PDMA1, NO_IRQ},
139 .periphid = 0x00041330,
140};
141 115
142static int __init exynos4_dma_init(void) 116static int __init exynos4_dma_init(void)
143{ 117{
@@ -146,11 +120,11 @@ static int __init exynos4_dma_init(void)
146 120
147 dma_cap_set(DMA_SLAVE, exynos4_pdma0_pdata.cap_mask); 121 dma_cap_set(DMA_SLAVE, exynos4_pdma0_pdata.cap_mask);
148 dma_cap_set(DMA_CYCLIC, exynos4_pdma0_pdata.cap_mask); 122 dma_cap_set(DMA_CYCLIC, exynos4_pdma0_pdata.cap_mask);
149 amba_device_register(&exynos4_device_pdma0, &iomem_resource); 123 amba_device_register(&exynos4_pdma0_device, &iomem_resource);
150 124
151 dma_cap_set(DMA_SLAVE, exynos4_pdma1_pdata.cap_mask); 125 dma_cap_set(DMA_SLAVE, exynos4_pdma1_pdata.cap_mask);
152 dma_cap_set(DMA_CYCLIC, exynos4_pdma1_pdata.cap_mask); 126 dma_cap_set(DMA_CYCLIC, exynos4_pdma1_pdata.cap_mask);
153 amba_device_register(&exynos4_device_pdma1, &iomem_resource); 127 amba_device_register(&exynos4_pdma1_device, &iomem_resource);
154 128
155 return 0; 129 return 0;
156} 130}
diff --git a/arch/arm/mach-exynos/include/mach/entry-macro.S b/arch/arm/mach-exynos/include/mach/entry-macro.S
deleted file mode 100644
index 3ba4f547534..00000000000
--- a/arch/arm/mach-exynos/include/mach/entry-macro.S
+++ /dev/null
@@ -1,16 +0,0 @@
1/* arch/arm/mach-exynos4/include/mach/entry-macro.S
2 *
3 * Cloned from arch/arm/mach-realview/include/mach/entry-macro.S
4 *
5 * Low-level IRQ helper macros for EXYNOS4 platforms
6 *
7 * This file is licensed under the terms of the GNU General Public
8 * License version 2. This program is licensed "as is" without any
9 * warranty of any kind, whether express or implied.
10*/
11
12 .macro disable_fiq
13 .endm
14
15 .macro arch_ret_to_user, tmp1, tmp2
16 .endm
diff --git a/arch/arm/mach-exynos/include/mach/system.h b/arch/arm/mach-exynos/include/mach/system.h
deleted file mode 100644
index 0063a6de3dc..00000000000
--- a/arch/arm/mach-exynos/include/mach/system.h
+++ /dev/null
@@ -1,20 +0,0 @@
1/* linux/arch/arm/mach-exynos4/include/mach/system.h
2 *
3 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * EXYNOS4 - system support header
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_SYSTEM_H
14#define __ASM_ARCH_SYSTEM_H __FILE__
15
16static void arch_idle(void)
17{
18 /* nothing here yet */
19}
20#endif /* __ASM_ARCH_SYSTEM_H */
diff --git a/arch/arm/mach-footbridge/include/mach/entry-macro.S b/arch/arm/mach-footbridge/include/mach/entry-macro.S
index d3847be0c66..dabbd5c54a7 100644
--- a/arch/arm/mach-footbridge/include/mach/entry-macro.S
+++ b/arch/arm/mach-footbridge/include/mach/entry-macro.S
@@ -14,9 +14,6 @@
14 .equ dc21285_high, ARMCSR_BASE & 0xff000000 14 .equ dc21285_high, ARMCSR_BASE & 0xff000000
15 .equ dc21285_low, ARMCSR_BASE & 0x00ffffff 15 .equ dc21285_low, ARMCSR_BASE & 0x00ffffff
16 16
17 .macro disable_fiq
18 .endm
19
20 .macro get_irqnr_preamble, base, tmp 17 .macro get_irqnr_preamble, base, tmp
21 mov \base, #dc21285_high 18 mov \base, #dc21285_high
22 .if dc21285_low 19 .if dc21285_low
@@ -24,9 +21,6 @@
24 .endif 21 .endif
25 .endm 22 .endm
26 23
27 .macro arch_ret_to_user, tmp1, tmp2
28 .endm
29
30 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp 24 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
31 ldr \irqstat, [\base, #0x180] @ get interrupts 25 ldr \irqstat, [\base, #0x180] @ get interrupts
32 26
diff --git a/arch/arm/mach-footbridge/include/mach/system.h b/arch/arm/mach-footbridge/include/mach/system.h
deleted file mode 100644
index a174a5841bc..00000000000
--- a/arch/arm/mach-footbridge/include/mach/system.h
+++ /dev/null
@@ -1,13 +0,0 @@
1/*
2 * arch/arm/mach-footbridge/include/mach/system.h
3 *
4 * Copyright (C) 1996-1999 Russell King.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10static inline void arch_idle(void)
11{
12 cpu_do_idle();
13}
diff --git a/arch/arm/mach-gemini/Makefile b/arch/arm/mach-gemini/Makefile
index c5b24b95a76..7355c0bbcb5 100644
--- a/arch/arm/mach-gemini/Makefile
+++ b/arch/arm/mach-gemini/Makefile
@@ -4,7 +4,7 @@
4 4
5# Object file lists. 5# Object file lists.
6 6
7obj-y := irq.o mm.o time.o devices.o gpio.o 7obj-y := irq.o mm.o time.o devices.o gpio.o idle.o
8 8
9# Board-specific support 9# Board-specific support
10obj-$(CONFIG_MACH_NAS4220B) += board-nas4220b.o 10obj-$(CONFIG_MACH_NAS4220B) += board-nas4220b.o
diff --git a/arch/arm/mach-gemini/idle.c b/arch/arm/mach-gemini/idle.c
new file mode 100644
index 00000000000..92bbd6bb600
--- /dev/null
+++ b/arch/arm/mach-gemini/idle.c
@@ -0,0 +1,29 @@
1/*
2 * arch/arm/mach-gemini/idle.c
3 */
4
5#include <linux/init.h>
6#include <asm/system.h>
7#include <asm/proc-fns.h>
8
9static void gemini_idle(void)
10{
11 /*
12 * Because of broken hardware we have to enable interrupts or the CPU
13 * will never wakeup... Acctualy it is not very good to enable
14 * interrupts first since scheduler can miss a tick, but there is
15 * no other way around this. Platforms that needs it for power saving
16 * should call enable_hlt() in init code, since by default it is
17 * disabled.
18 */
19 local_irq_enable();
20 cpu_do_idle();
21}
22
23static int __init gemini_idle_init(void)
24{
25 arm_pm_idle = gemini_idle;
26 return 0;
27}
28
29arch_initcall(gemini_idle_init);
diff --git a/arch/arm/mach-gemini/include/mach/entry-macro.S b/arch/arm/mach-gemini/include/mach/entry-macro.S
index 1624f91a2b8..f044e430bfa 100644
--- a/arch/arm/mach-gemini/include/mach/entry-macro.S
+++ b/arch/arm/mach-gemini/include/mach/entry-macro.S
@@ -12,15 +12,9 @@
12 12
13#define IRQ_STATUS 0x14 13#define IRQ_STATUS 0x14
14 14
15 .macro disable_fiq
16 .endm
17
18 .macro get_irqnr_preamble, base, tmp 15 .macro get_irqnr_preamble, base, tmp
19 .endm 16 .endm
20 17
21 .macro arch_ret_to_user, tmp1, tmp2
22 .endm
23
24 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp 18 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
25 ldr \irqstat, =IO_ADDRESS(GEMINI_INTERRUPT_BASE + IRQ_STATUS) 19 ldr \irqstat, =IO_ADDRESS(GEMINI_INTERRUPT_BASE + IRQ_STATUS)
26 ldr \irqnr, [\irqstat] 20 ldr \irqnr, [\irqstat]
diff --git a/arch/arm/mach-gemini/include/mach/system.h b/arch/arm/mach-gemini/include/mach/system.h
index 4d9c1f87247..a33b5a1f8ab 100644
--- a/arch/arm/mach-gemini/include/mach/system.h
+++ b/arch/arm/mach-gemini/include/mach/system.h
@@ -14,20 +14,6 @@
14#include <mach/hardware.h> 14#include <mach/hardware.h>
15#include <mach/global_reg.h> 15#include <mach/global_reg.h>
16 16
17static inline void arch_idle(void)
18{
19 /*
20 * Because of broken hardware we have to enable interrupts or the CPU
21 * will never wakeup... Acctualy it is not very good to enable
22 * interrupts here since scheduler can miss a tick, but there is
23 * no other way around this. Platforms that needs it for power saving
24 * should call enable_hlt() in init code, since by default it is
25 * disabled.
26 */
27 local_irq_enable();
28 cpu_do_idle();
29}
30
31static inline void arch_reset(char mode, const char *cmd) 17static inline void arch_reset(char mode, const char *cmd)
32{ 18{
33 __raw_writel(RESET_GLOBAL | RESET_CPU1, 19 __raw_writel(RESET_GLOBAL | RESET_CPU1,
diff --git a/arch/arm/mach-gemini/irq.c b/arch/arm/mach-gemini/irq.c
index 9485a8fdf85..ca70e5fcc7a 100644
--- a/arch/arm/mach-gemini/irq.c
+++ b/arch/arm/mach-gemini/irq.c
@@ -73,8 +73,8 @@ void __init gemini_init_irq(void)
73 unsigned int i, mode = 0, level = 0; 73 unsigned int i, mode = 0, level = 0;
74 74
75 /* 75 /*
76 * Disable arch_idle() by default since it is buggy 76 * Disable the idle handler by default since it is buggy
77 * For more info see arch/arm/mach-gemini/include/mach/system.h 77 * For more info see arch/arm/mach-gemini/idle.c
78 */ 78 */
79 disable_hlt(); 79 disable_hlt();
80 80
diff --git a/arch/arm/mach-h720x/common.c b/arch/arm/mach-h720x/common.c
index f8a2f6bb548..e756d1ac00c 100644
--- a/arch/arm/mach-h720x/common.c
+++ b/arch/arm/mach-h720x/common.c
@@ -247,3 +247,21 @@ void h720x_restart(char mode, const char *cmd)
247{ 247{
248 CPU_REG (PMU_BASE, PMU_STAT) |= PMU_WARMRESET; 248 CPU_REG (PMU_BASE, PMU_STAT) |= PMU_WARMRESET;
249} 249}
250
251static void h720x__idle(void)
252{
253 CPU_REG (PMU_BASE, PMU_MODE) = PMU_MODE_IDLE;
254 nop();
255 nop();
256 CPU_REG (PMU_BASE, PMU_MODE) = PMU_MODE_RUN;
257 nop();
258 nop();
259}
260
261static int __init h720x_idle_init(void)
262{
263 arm_pm_idle = h720x__idle;
264 return 0;
265}
266
267arch_initcall(h720x_idle_init);
diff --git a/arch/arm/mach-h720x/include/mach/entry-macro.S b/arch/arm/mach-h720x/include/mach/entry-macro.S
index c3948e5ba4a..75267fad701 100644
--- a/arch/arm/mach-h720x/include/mach/entry-macro.S
+++ b/arch/arm/mach-h720x/include/mach/entry-macro.S
@@ -8,15 +8,9 @@
8 * warranty of any kind, whether express or implied. 8 * warranty of any kind, whether express or implied.
9 */ 9 */
10 10
11 .macro disable_fiq
12 .endm
13
14 .macro get_irqnr_preamble, base, tmp 11 .macro get_irqnr_preamble, base, tmp
15 .endm 12 .endm
16 13
17 .macro arch_ret_to_user, tmp1, tmp2
18 .endm
19
20 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp 14 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
21#if defined (CONFIG_CPU_H7201) || defined (CONFIG_CPU_H7202) 15#if defined (CONFIG_CPU_H7201) || defined (CONFIG_CPU_H7202)
22 @ we could use the id register on H7202, but this is not 16 @ we could use the id register on H7202, but this is not
diff --git a/arch/arm/mach-h720x/include/mach/system.h b/arch/arm/mach-h720x/include/mach/system.h
deleted file mode 100644
index 16ac46e239a..00000000000
--- a/arch/arm/mach-h720x/include/mach/system.h
+++ /dev/null
@@ -1,27 +0,0 @@
1/*
2 * arch/arm/mach-h720x/include/mach/system.h
3 *
4 * Copyright (C) 2001-2002 Jungjun Kim, Hynix Semiconductor Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 * arch/arm/mach-h720x/include/mach/system.h
10 *
11 */
12
13#ifndef __ASM_ARCH_SYSTEM_H
14#define __ASM_ARCH_SYSTEM_H
15#include <mach/hardware.h>
16
17static void arch_idle(void)
18{
19 CPU_REG (PMU_BASE, PMU_MODE) = PMU_MODE_IDLE;
20 nop();
21 nop();
22 CPU_REG (PMU_BASE, PMU_MODE) = PMU_MODE_RUN;
23 nop();
24 nop();
25}
26
27#endif
diff --git a/arch/arm/mach-highbank/include/mach/entry-macro.S b/arch/arm/mach-highbank/include/mach/entry-macro.S
deleted file mode 100644
index a14f9e62ca9..00000000000
--- a/arch/arm/mach-highbank/include/mach/entry-macro.S
+++ /dev/null
@@ -1,5 +0,0 @@
1 .macro disable_fiq
2 .endm
3
4 .macro arch_ret_to_user, tmp1, tmp2
5 .endm
diff --git a/arch/arm/mach-highbank/include/mach/system.h b/arch/arm/mach-highbank/include/mach/system.h
deleted file mode 100644
index b1d8b5fbe37..00000000000
--- a/arch/arm/mach-highbank/include/mach/system.h
+++ /dev/null
@@ -1,24 +0,0 @@
1/*
2 * Copyright 2010-2011 Calxeda, Inc.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
11 * more details.
12 *
13 * You should have received a copy of the GNU General Public License along with
14 * this program. If not, see <http://www.gnu.org/licenses/>.
15 */
16#ifndef __MACH_SYSTEM_H
17#define __MACH_SYSTEM_H
18
19static inline void arch_idle(void)
20{
21 cpu_do_idle();
22}
23
24#endif
diff --git a/arch/arm/mach-imx/mm-imx3.c b/arch/arm/mach-imx/mm-imx3.c
index 31807d2a8b7..8404ee72555 100644
--- a/arch/arm/mach-imx/mm-imx3.c
+++ b/arch/arm/mach-imx/mm-imx3.c
@@ -34,31 +34,29 @@ static void imx3_idle(void)
34{ 34{
35 unsigned long reg = 0; 35 unsigned long reg = 0;
36 36
37 if (!need_resched()) 37 __asm__ __volatile__(
38 __asm__ __volatile__( 38 /* disable I and D cache */
39 /* disable I and D cache */ 39 "mrc p15, 0, %0, c1, c0, 0\n"
40 "mrc p15, 0, %0, c1, c0, 0\n" 40 "bic %0, %0, #0x00001000\n"
41 "bic %0, %0, #0x00001000\n" 41 "bic %0, %0, #0x00000004\n"
42 "bic %0, %0, #0x00000004\n" 42 "mcr p15, 0, %0, c1, c0, 0\n"
43 "mcr p15, 0, %0, c1, c0, 0\n" 43 /* invalidate I cache */
44 /* invalidate I cache */ 44 "mov %0, #0\n"
45 "mov %0, #0\n" 45 "mcr p15, 0, %0, c7, c5, 0\n"
46 "mcr p15, 0, %0, c7, c5, 0\n" 46 /* clear and invalidate D cache */
47 /* clear and invalidate D cache */ 47 "mov %0, #0\n"
48 "mov %0, #0\n" 48 "mcr p15, 0, %0, c7, c14, 0\n"
49 "mcr p15, 0, %0, c7, c14, 0\n" 49 /* WFI */
50 /* WFI */ 50 "mov %0, #0\n"
51 "mov %0, #0\n" 51 "mcr p15, 0, %0, c7, c0, 4\n"
52 "mcr p15, 0, %0, c7, c0, 4\n" 52 "nop\n" "nop\n" "nop\n" "nop\n"
53 "nop\n" "nop\n" "nop\n" "nop\n" 53 "nop\n" "nop\n" "nop\n"
54 "nop\n" "nop\n" "nop\n" 54 /* enable I and D cache */
55 /* enable I and D cache */ 55 "mrc p15, 0, %0, c1, c0, 0\n"
56 "mrc p15, 0, %0, c1, c0, 0\n" 56 "orr %0, %0, #0x00001000\n"
57 "orr %0, %0, #0x00001000\n" 57 "orr %0, %0, #0x00000004\n"
58 "orr %0, %0, #0x00000004\n" 58 "mcr p15, 0, %0, c1, c0, 0\n"
59 "mcr p15, 0, %0, c1, c0, 0\n" 59 : "=r" (reg));
60 : "=r" (reg));
61 local_irq_enable();
62} 60}
63 61
64static void __iomem *imx3_ioremap(unsigned long phys_addr, size_t size, 62static void __iomem *imx3_ioremap(unsigned long phys_addr, size_t size,
@@ -134,8 +132,8 @@ void __init imx31_init_early(void)
134{ 132{
135 mxc_set_cpu_type(MXC_CPU_MX31); 133 mxc_set_cpu_type(MXC_CPU_MX31);
136 mxc_arch_reset_init(MX31_IO_ADDRESS(MX31_WDOG_BASE_ADDR)); 134 mxc_arch_reset_init(MX31_IO_ADDRESS(MX31_WDOG_BASE_ADDR));
137 pm_idle = imx3_idle;
138 imx_ioremap = imx3_ioremap; 135 imx_ioremap = imx3_ioremap;
136 arm_pm_idle = imx3_idle;
139} 137}
140 138
141void __init mx31_init_irq(void) 139void __init mx31_init_irq(void)
@@ -197,7 +195,7 @@ void __init imx35_init_early(void)
197 mxc_set_cpu_type(MXC_CPU_MX35); 195 mxc_set_cpu_type(MXC_CPU_MX35);
198 mxc_iomux_v3_init(MX35_IO_ADDRESS(MX35_IOMUXC_BASE_ADDR)); 196 mxc_iomux_v3_init(MX35_IO_ADDRESS(MX35_IOMUXC_BASE_ADDR));
199 mxc_arch_reset_init(MX35_IO_ADDRESS(MX35_WDOG_BASE_ADDR)); 197 mxc_arch_reset_init(MX35_IO_ADDRESS(MX35_WDOG_BASE_ADDR));
200 pm_idle = imx3_idle; 198 arm_pm_idle = imx3_idle;
201 imx_ioremap = imx3_ioremap; 199 imx_ioremap = imx3_ioremap;
202} 200}
203 201
diff --git a/arch/arm/mach-imx/mm-imx5.c b/arch/arm/mach-imx/mm-imx5.c
index bc17dfea381..49549a72dc7 100644
--- a/arch/arm/mach-imx/mm-imx5.c
+++ b/arch/arm/mach-imx/mm-imx5.c
@@ -26,23 +26,17 @@ static struct clk *gpc_dvfs_clk;
26 26
27static void imx5_idle(void) 27static void imx5_idle(void)
28{ 28{
29 if (!need_resched()) { 29 /* gpc clock is needed for SRPG */
30 /* gpc clock is needed for SRPG */ 30 if (gpc_dvfs_clk == NULL) {
31 if (gpc_dvfs_clk == NULL) { 31 gpc_dvfs_clk = clk_get(NULL, "gpc_dvfs");
32 gpc_dvfs_clk = clk_get(NULL, "gpc_dvfs"); 32 if (IS_ERR(gpc_dvfs_clk))
33 if (IS_ERR(gpc_dvfs_clk)) 33 return;
34 goto err0;
35 }
36 clk_enable(gpc_dvfs_clk);
37 mx5_cpu_lp_set(WAIT_UNCLOCKED_POWER_OFF);
38 if (tzic_enable_wake())
39 goto err1;
40 cpu_do_idle();
41err1:
42 clk_disable(gpc_dvfs_clk);
43 } 34 }
44err0: 35 clk_enable(gpc_dvfs_clk);
45 local_irq_enable(); 36 mx5_cpu_lp_set(WAIT_UNCLOCKED_POWER_OFF);
37 if (tzic_enable_wake() != 0)
38 cpu_do_idle();
39 clk_disable(gpc_dvfs_clk);
46} 40}
47 41
48/* 42/*
@@ -108,7 +102,7 @@ void __init imx51_init_early(void)
108 mxc_set_cpu_type(MXC_CPU_MX51); 102 mxc_set_cpu_type(MXC_CPU_MX51);
109 mxc_iomux_v3_init(MX51_IO_ADDRESS(MX51_IOMUXC_BASE_ADDR)); 103 mxc_iomux_v3_init(MX51_IO_ADDRESS(MX51_IOMUXC_BASE_ADDR));
110 mxc_arch_reset_init(MX51_IO_ADDRESS(MX51_WDOG1_BASE_ADDR)); 104 mxc_arch_reset_init(MX51_IO_ADDRESS(MX51_WDOG1_BASE_ADDR));
111 pm_idle = imx5_idle; 105 arm_pm_idle = imx5_idle;
112} 106}
113 107
114void __init imx53_init_early(void) 108void __init imx53_init_early(void)
diff --git a/arch/arm/mach-imx/pm-imx27.c b/arch/arm/mach-imx/pm-imx27.c
index e455d2f855b..6fcffa7db97 100644
--- a/arch/arm/mach-imx/pm-imx27.c
+++ b/arch/arm/mach-imx/pm-imx27.c
@@ -10,7 +10,6 @@
10#include <linux/kernel.h> 10#include <linux/kernel.h>
11#include <linux/suspend.h> 11#include <linux/suspend.h>
12#include <linux/io.h> 12#include <linux/io.h>
13#include <mach/system.h>
14#include <mach/hardware.h> 13#include <mach/hardware.h>
15 14
16static int mx27_suspend_enter(suspend_state_t state) 15static int mx27_suspend_enter(suspend_state_t state)
@@ -23,7 +22,7 @@ static int mx27_suspend_enter(suspend_state_t state)
23 cscr &= 0xFFFFFFFC; 22 cscr &= 0xFFFFFFFC;
24 __raw_writel(cscr, MX27_IO_ADDRESS(MX27_CCM_BASE_ADDR)); 23 __raw_writel(cscr, MX27_IO_ADDRESS(MX27_CCM_BASE_ADDR));
25 /* Executes WFI */ 24 /* Executes WFI */
26 arch_idle(); 25 cpu_do_idle();
27 break; 26 break;
28 27
29 default: 28 default:
diff --git a/arch/arm/mach-integrator/core.c b/arch/arm/mach-integrator/core.c
index 019f0ab08f6..15b87f26ac9 100644
--- a/arch/arm/mach-integrator/core.c
+++ b/arch/arm/mach-integrator/core.c
@@ -35,67 +35,23 @@
35 35
36static struct amba_pl010_data integrator_uart_data; 36static struct amba_pl010_data integrator_uart_data;
37 37
38static struct amba_device rtc_device = { 38#define INTEGRATOR_RTC_IRQ { IRQ_RTCINT }
39 .dev = { 39#define INTEGRATOR_UART0_IRQ { IRQ_UARTINT0 }
40 .init_name = "mb:15", 40#define INTEGRATOR_UART1_IRQ { IRQ_UARTINT1 }
41 }, 41#define KMI0_IRQ { IRQ_KMIINT0 }
42 .res = { 42#define KMI1_IRQ { IRQ_KMIINT1 }
43 .start = INTEGRATOR_RTC_BASE,
44 .end = INTEGRATOR_RTC_BASE + SZ_4K - 1,
45 .flags = IORESOURCE_MEM,
46 },
47 .irq = { IRQ_RTCINT, NO_IRQ },
48};
49 43
50static struct amba_device uart0_device = { 44static AMBA_APB_DEVICE(rtc, "mb:15", 0,
51 .dev = { 45 INTEGRATOR_RTC_BASE, INTEGRATOR_RTC_IRQ, NULL);
52 .init_name = "mb:16",
53 .platform_data = &integrator_uart_data,
54 },
55 .res = {
56 .start = INTEGRATOR_UART0_BASE,
57 .end = INTEGRATOR_UART0_BASE + SZ_4K - 1,
58 .flags = IORESOURCE_MEM,
59 },
60 .irq = { IRQ_UARTINT0, NO_IRQ },
61};
62 46
63static struct amba_device uart1_device = { 47static AMBA_APB_DEVICE(uart0, "mb:16", 0,
64 .dev = { 48 INTEGRATOR_UART0_BASE, INTEGRATOR_UART0_IRQ, &integrator_uart_data);
65 .init_name = "mb:17",
66 .platform_data = &integrator_uart_data,
67 },
68 .res = {
69 .start = INTEGRATOR_UART1_BASE,
70 .end = INTEGRATOR_UART1_BASE + SZ_4K - 1,
71 .flags = IORESOURCE_MEM,
72 },
73 .irq = { IRQ_UARTINT1, NO_IRQ },
74};
75 49
76static struct amba_device kmi0_device = { 50static AMBA_APB_DEVICE(uart1, "mb:17", 0,
77 .dev = { 51 INTEGRATOR_UART1_BASE, INTEGRATOR_UART1_IRQ, &integrator_uart_data);
78 .init_name = "mb:18",
79 },
80 .res = {
81 .start = KMI0_BASE,
82 .end = KMI0_BASE + SZ_4K - 1,
83 .flags = IORESOURCE_MEM,
84 },
85 .irq = { IRQ_KMIINT0, NO_IRQ },
86};
87 52
88static struct amba_device kmi1_device = { 53static AMBA_APB_DEVICE(kmi0, "mb:18", 0, KMI0_BASE, KMI0_IRQ, NULL);
89 .dev = { 54static AMBA_APB_DEVICE(kmi1, "mb:19", 0, KMI1_BASE, KMI1_IRQ, NULL);
90 .init_name = "mb:19",
91 },
92 .res = {
93 .start = KMI1_BASE,
94 .end = KMI1_BASE + SZ_4K - 1,
95 .flags = IORESOURCE_MEM,
96 },
97 .irq = { IRQ_KMIINT1, NO_IRQ },
98};
99 55
100static struct amba_device *amba_devs[] __initdata = { 56static struct amba_device *amba_devs[] __initdata = {
101 &rtc_device, 57 &rtc_device,
diff --git a/arch/arm/mach-integrator/impd1.c b/arch/arm/mach-integrator/impd1.c
index 8cbb75a96bd..3e538da6cb1 100644
--- a/arch/arm/mach-integrator/impd1.c
+++ b/arch/arm/mach-integrator/impd1.c
@@ -401,24 +401,21 @@ static int impd1_probe(struct lm_device *dev)
401 401
402 pc_base = dev->resource.start + idev->offset; 402 pc_base = dev->resource.start + idev->offset;
403 403
404 d = kzalloc(sizeof(struct amba_device), GFP_KERNEL); 404 d = amba_device_alloc(NULL, pc_base, SZ_4K);
405 if (!d) 405 if (!d)
406 continue; 406 continue;
407 407
408 dev_set_name(&d->dev, "lm%x:%5.5lx", dev->id, idev->offset >> 12); 408 dev_set_name(&d->dev, "lm%x:%5.5lx", dev->id, idev->offset >> 12);
409 d->dev.parent = &dev->dev; 409 d->dev.parent = &dev->dev;
410 d->res.start = dev->resource.start + idev->offset;
411 d->res.end = d->res.start + SZ_4K - 1;
412 d->res.flags = IORESOURCE_MEM;
413 d->irq[0] = dev->irq; 410 d->irq[0] = dev->irq;
414 d->irq[1] = dev->irq; 411 d->irq[1] = dev->irq;
415 d->periphid = idev->id; 412 d->periphid = idev->id;
416 d->dev.platform_data = idev->platform_data; 413 d->dev.platform_data = idev->platform_data;
417 414
418 ret = amba_device_register(d, &dev->resource); 415 ret = amba_device_add(d, &dev->resource);
419 if (ret) { 416 if (ret) {
420 dev_err(&d->dev, "unable to register device: %d\n", ret); 417 dev_err(&d->dev, "unable to register device: %d\n", ret);
421 kfree(d); 418 amba_device_put(d);
422 } 419 }
423 } 420 }
424 421
diff --git a/arch/arm/mach-integrator/include/mach/entry-macro.S b/arch/arm/mach-integrator/include/mach/entry-macro.S
index 3d029c9f3ef..5cc7b85ad9d 100644
--- a/arch/arm/mach-integrator/include/mach/entry-macro.S
+++ b/arch/arm/mach-integrator/include/mach/entry-macro.S
@@ -11,15 +11,9 @@
11#include <mach/platform.h> 11#include <mach/platform.h>
12#include <mach/irqs.h> 12#include <mach/irqs.h>
13 13
14 .macro disable_fiq
15 .endm
16
17 .macro get_irqnr_preamble, base, tmp 14 .macro get_irqnr_preamble, base, tmp
18 .endm 15 .endm
19 16
20 .macro arch_ret_to_user, tmp1, tmp2
21 .endm
22
23 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp 17 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
24/* FIXME: should not be using soo many LDRs here */ 18/* FIXME: should not be using soo many LDRs here */
25 ldr \base, =IO_ADDRESS(INTEGRATOR_IC_BASE) 19 ldr \base, =IO_ADDRESS(INTEGRATOR_IC_BASE)
diff --git a/arch/arm/mach-integrator/include/mach/system.h b/arch/arm/mach-integrator/include/mach/system.h
deleted file mode 100644
index 901514eba4a..00000000000
--- a/arch/arm/mach-integrator/include/mach/system.h
+++ /dev/null
@@ -1,33 +0,0 @@
1/*
2 * arch/arm/mach-integrator/include/mach/system.h
3 *
4 * Copyright (C) 1999 ARM Limited
5 * Copyright (C) 2000 Deep Blue Solutions Ltd
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21#ifndef __ASM_ARCH_SYSTEM_H
22#define __ASM_ARCH_SYSTEM_H
23
24static inline void arch_idle(void)
25{
26 /*
27 * This should do all the clock switching
28 * and wait for interrupt tricks
29 */
30 cpu_do_idle();
31}
32
33#endif
diff --git a/arch/arm/mach-integrator/integrator_cp.c b/arch/arm/mach-integrator/integrator_cp.c
index a8b6aa6003f..be9ead4a3bc 100644
--- a/arch/arm/mach-integrator/integrator_cp.c
+++ b/arch/arm/mach-integrator/integrator_cp.c
@@ -347,32 +347,14 @@ static struct mmci_platform_data mmc_data = {
347 .gpio_cd = -1, 347 .gpio_cd = -1,
348}; 348};
349 349
350static struct amba_device mmc_device = { 350#define INTEGRATOR_CP_MMC_IRQS { IRQ_CP_MMCIINT0, IRQ_CP_MMCIINT1 }
351 .dev = { 351#define INTEGRATOR_CP_AACI_IRQS { IRQ_CP_AACIINT }
352 .init_name = "mb:1c",
353 .platform_data = &mmc_data,
354 },
355 .res = {
356 .start = INTEGRATOR_CP_MMC_BASE,
357 .end = INTEGRATOR_CP_MMC_BASE + SZ_4K - 1,
358 .flags = IORESOURCE_MEM,
359 },
360 .irq = { IRQ_CP_MMCIINT0, IRQ_CP_MMCIINT1 },
361 .periphid = 0,
362};
363 352
364static struct amba_device aaci_device = { 353static AMBA_APB_DEVICE(mmc, "mb:1c", 0, INTEGRATOR_CP_MMC_BASE,
365 .dev = { 354 INTEGRATOR_CP_MMC_IRQS, &mmc_data);
366 .init_name = "mb:1d", 355
367 }, 356static AMBA_APB_DEVICE(aaci, "mb:1d", 0, INTEGRATOR_CP_AACI_BASE,
368 .res = { 357 INTEGRATOR_CP_AACI_IRQS, NULL);
369 .start = INTEGRATOR_CP_AACI_BASE,
370 .end = INTEGRATOR_CP_AACI_BASE + SZ_4K - 1,
371 .flags = IORESOURCE_MEM,
372 },
373 .irq = { IRQ_CP_AACIINT, NO_IRQ },
374 .periphid = 0,
375};
376 358
377 359
378/* 360/*
@@ -425,21 +407,8 @@ static struct clcd_board clcd_data = {
425 .remove = versatile_clcd_remove_dma, 407 .remove = versatile_clcd_remove_dma,
426}; 408};
427 409
428static struct amba_device clcd_device = { 410static AMBA_AHB_DEVICE(clcd, "mb:c0", 0, INTCP_PA_CLCD_BASE,
429 .dev = { 411 { IRQ_CP_CLCDCINT }, &clcd_data);
430 .init_name = "mb:c0",
431 .coherent_dma_mask = ~0,
432 .platform_data = &clcd_data,
433 },
434 .res = {
435 .start = INTCP_PA_CLCD_BASE,
436 .end = INTCP_PA_CLCD_BASE + SZ_4K - 1,
437 .flags = IORESOURCE_MEM,
438 },
439 .dma_mask = ~0,
440 .irq = { IRQ_CP_CLCDCINT, NO_IRQ },
441 .periphid = 0,
442};
443 412
444static struct amba_device *amba_devs[] __initdata = { 413static struct amba_device *amba_devs[] __initdata = {
445 &mmc_device, 414 &mmc_device,
diff --git a/arch/arm/mach-iop13xx/include/mach/entry-macro.S b/arch/arm/mach-iop13xx/include/mach/entry-macro.S
index a624a7870c6..1a2d603488d 100644
--- a/arch/arm/mach-iop13xx/include/mach/entry-macro.S
+++ b/arch/arm/mach-iop13xx/include/mach/entry-macro.S
@@ -16,9 +16,6 @@
16 * Place - Suite 330, Boston, MA 02111-1307 USA. 16 * Place - Suite 330, Boston, MA 02111-1307 USA.
17 * 17 *
18 */ 18 */
19 .macro disable_fiq
20 .endm
21
22 .macro get_irqnr_preamble, base, tmp 19 .macro get_irqnr_preamble, base, tmp
23 mrc p15, 0, \tmp, c15, c1, 0 20 mrc p15, 0, \tmp, c15, c1, 0
24 orr \tmp, \tmp, #(1 << 6) 21 orr \tmp, \tmp, #(1 << 6)
diff --git a/arch/arm/mach-iop13xx/include/mach/system.h b/arch/arm/mach-iop13xx/include/mach/system.h
deleted file mode 100644
index 1f31ed3f8ae..00000000000
--- a/arch/arm/mach-iop13xx/include/mach/system.h
+++ /dev/null
@@ -1,13 +0,0 @@
1/*
2 * arch/arm/mach-iop13xx/include/mach/system.h
3 *
4 * Copyright (C) 2004 Intel Corp.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10static inline void arch_idle(void)
11{
12 cpu_do_idle();
13}
diff --git a/arch/arm/mach-iop32x/include/mach/entry-macro.S b/arch/arm/mach-iop32x/include/mach/entry-macro.S
index b02fb56bafc..ea13ae02d9b 100644
--- a/arch/arm/mach-iop32x/include/mach/entry-macro.S
+++ b/arch/arm/mach-iop32x/include/mach/entry-macro.S
@@ -9,9 +9,6 @@
9 */ 9 */
10#include <mach/iop32x.h> 10#include <mach/iop32x.h>
11 11
12 .macro disable_fiq
13 .endm
14
15 .macro get_irqnr_preamble, base, tmp 12 .macro get_irqnr_preamble, base, tmp
16 mrc p15, 0, \tmp, c15, c1, 0 13 mrc p15, 0, \tmp, c15, c1, 0
17 orr \tmp, \tmp, #(1 << 6) 14 orr \tmp, \tmp, #(1 << 6)
diff --git a/arch/arm/mach-iop32x/include/mach/system.h b/arch/arm/mach-iop32x/include/mach/system.h
deleted file mode 100644
index 4a88727bca9..00000000000
--- a/arch/arm/mach-iop32x/include/mach/system.h
+++ /dev/null
@@ -1,13 +0,0 @@
1/*
2 * arch/arm/mach-iop32x/include/mach/system.h
3 *
4 * Copyright (C) 2001 MontaVista Software, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10static inline void arch_idle(void)
11{
12 cpu_do_idle();
13}
diff --git a/arch/arm/mach-iop33x/include/mach/entry-macro.S b/arch/arm/mach-iop33x/include/mach/entry-macro.S
index 4e1f7282b35..0a398fe1fba 100644
--- a/arch/arm/mach-iop33x/include/mach/entry-macro.S
+++ b/arch/arm/mach-iop33x/include/mach/entry-macro.S
@@ -9,9 +9,6 @@
9 */ 9 */
10#include <mach/iop33x.h> 10#include <mach/iop33x.h>
11 11
12 .macro disable_fiq
13 .endm
14
15 .macro get_irqnr_preamble, base, tmp 12 .macro get_irqnr_preamble, base, tmp
16 mrc p15, 0, \tmp, c15, c1, 0 13 mrc p15, 0, \tmp, c15, c1, 0
17 orr \tmp, \tmp, #(1 << 6) 14 orr \tmp, \tmp, #(1 << 6)
diff --git a/arch/arm/mach-iop33x/include/mach/system.h b/arch/arm/mach-iop33x/include/mach/system.h
deleted file mode 100644
index 4f98e765397..00000000000
--- a/arch/arm/mach-iop33x/include/mach/system.h
+++ /dev/null
@@ -1,13 +0,0 @@
1/*
2 * arch/arm/mach-iop33x/include/mach/system.h
3 *
4 * Copyright (C) 2001 MontaVista Software, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10static inline void arch_idle(void)
11{
12 cpu_do_idle();
13}
diff --git a/arch/arm/mach-ixp2000/include/mach/entry-macro.S b/arch/arm/mach-ixp2000/include/mach/entry-macro.S
index 5850ffc8c75..c4444dff920 100644
--- a/arch/arm/mach-ixp2000/include/mach/entry-macro.S
+++ b/arch/arm/mach-ixp2000/include/mach/entry-macro.S
@@ -9,15 +9,9 @@
9 */ 9 */
10#include <mach/irqs.h> 10#include <mach/irqs.h>
11 11
12 .macro disable_fiq
13 .endm
14
15 .macro get_irqnr_preamble, base, tmp 12 .macro get_irqnr_preamble, base, tmp
16 .endm 13 .endm
17 14
18 .macro arch_ret_to_user, tmp1, tmp2
19 .endm
20
21 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp 15 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
22 16
23 mov \irqnr, #0x0 @clear out irqnr as default 17 mov \irqnr, #0x0 @clear out irqnr as default
diff --git a/arch/arm/mach-ixp2000/include/mach/system.h b/arch/arm/mach-ixp2000/include/mach/system.h
deleted file mode 100644
index a7fb08b2b8e..00000000000
--- a/arch/arm/mach-ixp2000/include/mach/system.h
+++ /dev/null
@@ -1,14 +0,0 @@
1/*
2 * arch/arm/mach-ixp2000/include/mach/system.h
3 *
4 * Copyright (C) 2002 Intel Corp.
5 * Copyricht (C) 2003-2005 MontaVista Software, Inc.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11static inline void arch_idle(void)
12{
13 cpu_do_idle();
14}
diff --git a/arch/arm/mach-ixp23xx/core.c b/arch/arm/mach-ixp23xx/core.c
index 0923bb905cc..7c1495e4fe7 100644
--- a/arch/arm/mach-ixp23xx/core.c
+++ b/arch/arm/mach-ixp23xx/core.c
@@ -441,6 +441,9 @@ static struct platform_device *ixp23xx_devices[] __initdata = {
441 441
442void __init ixp23xx_sys_init(void) 442void __init ixp23xx_sys_init(void)
443{ 443{
444 /* by default, the idle code is disabled */
445 disable_hlt();
446
444 *IXP23XX_EXP_UNIT_FUSE |= 0xf; 447 *IXP23XX_EXP_UNIT_FUSE |= 0xf;
445 platform_add_devices(ixp23xx_devices, ARRAY_SIZE(ixp23xx_devices)); 448 platform_add_devices(ixp23xx_devices, ARRAY_SIZE(ixp23xx_devices));
446} 449}
diff --git a/arch/arm/mach-ixp23xx/include/mach/entry-macro.S b/arch/arm/mach-ixp23xx/include/mach/entry-macro.S
index 3f5338a7bbd..3fd2cb984e4 100644
--- a/arch/arm/mach-ixp23xx/include/mach/entry-macro.S
+++ b/arch/arm/mach-ixp23xx/include/mach/entry-macro.S
@@ -2,15 +2,9 @@
2 * arch/arm/mach-ixp23xx/include/mach/entry-macro.S 2 * arch/arm/mach-ixp23xx/include/mach/entry-macro.S
3 */ 3 */
4 4
5 .macro disable_fiq
6 .endm
7
8 .macro get_irqnr_preamble, base, tmp 5 .macro get_irqnr_preamble, base, tmp
9 .endm 6 .endm
10 7
11 .macro arch_ret_to_user, tmp1, tmp2
12 .endm
13
14 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp 8 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
15 ldr \irqnr, =(IXP23XX_INTC_VIRT + IXP23XX_INTR_IRQ_ENC_ST_OFFSET) 9 ldr \irqnr, =(IXP23XX_INTC_VIRT + IXP23XX_INTR_IRQ_ENC_ST_OFFSET)
16 ldr \irqnr, [\irqnr] @ get interrupt number 10 ldr \irqnr, [\irqnr] @ get interrupt number
diff --git a/arch/arm/mach-ixp23xx/include/mach/system.h b/arch/arm/mach-ixp23xx/include/mach/system.h
deleted file mode 100644
index 277dda7334b..00000000000
--- a/arch/arm/mach-ixp23xx/include/mach/system.h
+++ /dev/null
@@ -1,16 +0,0 @@
1/*
2 * arch/arm/mach-ixp23xx/include/mach/system.h
3 *
4 * Copyright (C) 2003 Intel Corporation.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10static inline void arch_idle(void)
11{
12#if 0
13 if (!hlt_counter)
14 cpu_do_idle();
15#endif
16}
diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c
index 3841ab4146b..a6329a0a8ec 100644
--- a/arch/arm/mach-ixp4xx/common.c
+++ b/arch/arm/mach-ixp4xx/common.c
@@ -236,6 +236,12 @@ void __init ixp4xx_init_irq(void)
236{ 236{
237 int i = 0; 237 int i = 0;
238 238
239 /*
240 * ixp4xx does not implement the XScale PWRMODE register
241 * so it must not call cpu_do_idle().
242 */
243 disable_hlt();
244
239 /* Route all sources to IRQ instead of FIQ */ 245 /* Route all sources to IRQ instead of FIQ */
240 *IXP4XX_ICLR = 0x0; 246 *IXP4XX_ICLR = 0x0;
241 247
diff --git a/arch/arm/mach-ixp4xx/include/mach/entry-macro.S b/arch/arm/mach-ixp4xx/include/mach/entry-macro.S
index f2e14e94ed1..79adf83e2c3 100644
--- a/arch/arm/mach-ixp4xx/include/mach/entry-macro.S
+++ b/arch/arm/mach-ixp4xx/include/mach/entry-macro.S
@@ -9,15 +9,9 @@
9 */ 9 */
10#include <mach/hardware.h> 10#include <mach/hardware.h>
11 11
12 .macro disable_fiq
13 .endm
14
15 .macro get_irqnr_preamble, base, tmp 12 .macro get_irqnr_preamble, base, tmp
16 .endm 13 .endm
17 14
18 .macro arch_ret_to_user, tmp1, tmp2
19 .endm
20
21 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp 15 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
22 ldr \irqstat, =(IXP4XX_INTC_BASE_VIRT+IXP4XX_ICIP_OFFSET) 16 ldr \irqstat, =(IXP4XX_INTC_BASE_VIRT+IXP4XX_ICIP_OFFSET)
23 ldr \irqstat, [\irqstat] @ get interrupts 17 ldr \irqstat, [\irqstat] @ get interrupts
diff --git a/arch/arm/mach-ixp4xx/include/mach/system.h b/arch/arm/mach-ixp4xx/include/mach/system.h
deleted file mode 100644
index 140a9bef446..00000000000
--- a/arch/arm/mach-ixp4xx/include/mach/system.h
+++ /dev/null
@@ -1,19 +0,0 @@
1/*
2 * arch/arm/mach-ixp4xx/include/mach/system.h
3 *
4 * Copyright (C) 2002 Intel Corporation.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 */
11static inline void arch_idle(void)
12{
13 /* ixp4xx does not implement the XScale PWRMODE register,
14 * so it must not call cpu_do_idle() here.
15 */
16#if 0
17 cpu_do_idle();
18#endif
19}
diff --git a/arch/arm/mach-kirkwood/include/mach/entry-macro.S b/arch/arm/mach-kirkwood/include/mach/entry-macro.S
index 8939d36f893..82db29f7af8 100644
--- a/arch/arm/mach-kirkwood/include/mach/entry-macro.S
+++ b/arch/arm/mach-kirkwood/include/mach/entry-macro.S
@@ -10,12 +10,6 @@
10 10
11#include <mach/bridge-regs.h> 11#include <mach/bridge-regs.h>
12 12
13 .macro disable_fiq
14 .endm
15
16 .macro arch_ret_to_user, tmp1, tmp2
17 .endm
18
19 .macro get_irqnr_preamble, base, tmp 13 .macro get_irqnr_preamble, base, tmp
20 ldr \base, =IRQ_VIRT_BASE 14 ldr \base, =IRQ_VIRT_BASE
21 .endm 15 .endm
diff --git a/arch/arm/mach-kirkwood/include/mach/system.h b/arch/arm/mach-kirkwood/include/mach/system.h
deleted file mode 100644
index 5fddde002b5..00000000000
--- a/arch/arm/mach-kirkwood/include/mach/system.h
+++ /dev/null
@@ -1,17 +0,0 @@
1/*
2 * arch/arm/mach-kirkwood/include/mach/system.h
3 *
4 * This file is licensed under the terms of the GNU General Public
5 * License version 2. This program is licensed "as is" without any
6 * warranty of any kind, whether express or implied.
7 */
8
9#ifndef __ASM_ARCH_SYSTEM_H
10#define __ASM_ARCH_SYSTEM_H
11
12static inline void arch_idle(void)
13{
14 cpu_do_idle();
15}
16
17#endif
diff --git a/arch/arm/mach-ks8695/include/mach/entry-macro.S b/arch/arm/mach-ks8695/include/mach/entry-macro.S
index b4fe0c11c6c..8315b34f32f 100644
--- a/arch/arm/mach-ks8695/include/mach/entry-macro.S
+++ b/arch/arm/mach-ks8695/include/mach/entry-macro.S
@@ -14,16 +14,10 @@
14#include <mach/hardware.h> 14#include <mach/hardware.h>
15#include <mach/regs-irq.h> 15#include <mach/regs-irq.h>
16 16
17 .macro disable_fiq
18 .endm
19
20 .macro get_irqnr_preamble, base, tmp 17 .macro get_irqnr_preamble, base, tmp
21 ldr \base, =KS8695_IRQ_VA @ Base address of interrupt controller 18 ldr \base, =KS8695_IRQ_VA @ Base address of interrupt controller
22 .endm 19 .endm
23 20
24 .macro arch_ret_to_user, tmp1, tmp2
25 .endm
26
27 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp 21 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
28 ldr \irqstat, [\base, #KS8695_INTMS] @ Mask Status register 22 ldr \irqstat, [\base, #KS8695_INTMS] @ Mask Status register
29 23
diff --git a/arch/arm/mach-ks8695/include/mach/system.h b/arch/arm/mach-ks8695/include/mach/system.h
deleted file mode 100644
index 59fe992395b..00000000000
--- a/arch/arm/mach-ks8695/include/mach/system.h
+++ /dev/null
@@ -1,27 +0,0 @@
1/*
2 * arch/arm/mach-s3c2410/include/mach/system.h
3 *
4 * Copyright (C) 2006 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk>
6 *
7 * KS8695 - System function defines and includes
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14#ifndef __ASM_ARCH_SYSTEM_H
15#define __ASM_ARCH_SYSTEM_H
16
17static void arch_idle(void)
18{
19 /*
20 * This should do all the clock switching
21 * and wait for interrupt tricks,
22 */
23 cpu_do_idle();
24
25}
26
27#endif
diff --git a/arch/arm/mach-lpc32xx/include/mach/entry-macro.S b/arch/arm/mach-lpc32xx/include/mach/entry-macro.S
index b725f6c9397..24ca11b377c 100644
--- a/arch/arm/mach-lpc32xx/include/mach/entry-macro.S
+++ b/arch/arm/mach-lpc32xx/include/mach/entry-macro.S
@@ -21,16 +21,10 @@
21 21
22#define LPC32XX_INTC_MASKED_STATUS_OFS 0x8 22#define LPC32XX_INTC_MASKED_STATUS_OFS 0x8
23 23
24 .macro disable_fiq
25 .endm
26
27 .macro get_irqnr_preamble, base, tmp 24 .macro get_irqnr_preamble, base, tmp
28 ldr \base, =IO_ADDRESS(LPC32XX_MIC_BASE) 25 ldr \base, =IO_ADDRESS(LPC32XX_MIC_BASE)
29 .endm 26 .endm
30 27
31 .macro arch_ret_to_user, tmp1, tmp2
32 .endm
33
34/* 28/*
35 * Return IRQ number in irqnr. Also return processor Z flag status in CPSR 29 * Return IRQ number in irqnr. Also return processor Z flag status in CPSR
36 * as set if an interrupt is pending. 30 * as set if an interrupt is pending.
diff --git a/arch/arm/mach-lpc32xx/include/mach/system.h b/arch/arm/mach-lpc32xx/include/mach/system.h
deleted file mode 100644
index bf176c99152..00000000000
--- a/arch/arm/mach-lpc32xx/include/mach/system.h
+++ /dev/null
@@ -1,27 +0,0 @@
1/*
2 * arch/arm/mach-lpc32xx/include/mach/system.h
3 *
4 * Author: Kevin Wells <kevin.wells@nxp.com>
5 *
6 * Copyright (C) 2010 NXP Semiconductors
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 */
18
19#ifndef __ASM_ARCH_SYSTEM_H
20#define __ASM_ARCH_SYSTEM_H
21
22static void arch_idle(void)
23{
24 cpu_do_idle();
25}
26
27#endif
diff --git a/arch/arm/mach-lpc32xx/phy3250.c b/arch/arm/mach-lpc32xx/phy3250.c
index bfee5b45510..5d51c102c25 100644
--- a/arch/arm/mach-lpc32xx/phy3250.c
+++ b/arch/arm/mach-lpc32xx/phy3250.c
@@ -149,20 +149,8 @@ static struct clcd_board lpc32xx_clcd_data = {
149 .remove = lpc32xx_clcd_remove, 149 .remove = lpc32xx_clcd_remove,
150}; 150};
151 151
152static struct amba_device lpc32xx_clcd_device = { 152static AMBA_AHB_DEVICE(lpc32xx_clcd, "dev:clcd", 0,
153 .dev = { 153 LPC32XX_LCD_BASE, { IRQ_LPC32XX_LCD }, &lpc32xx_clcd_data);
154 .coherent_dma_mask = ~0,
155 .init_name = "dev:clcd",
156 .platform_data = &lpc32xx_clcd_data,
157 },
158 .res = {
159 .start = LPC32XX_LCD_BASE,
160 .end = (LPC32XX_LCD_BASE + SZ_4K - 1),
161 .flags = IORESOURCE_MEM,
162 },
163 .dma_mask = ~0,
164 .irq = {IRQ_LPC32XX_LCD, NO_IRQ},
165};
166 154
167/* 155/*
168 * AMBA SSP (SPI) 156 * AMBA SSP (SPI)
@@ -191,20 +179,8 @@ static struct pl022_ssp_controller lpc32xx_ssp0_data = {
191 .enable_dma = 0, 179 .enable_dma = 0,
192}; 180};
193 181
194static struct amba_device lpc32xx_ssp0_device = { 182static AMBA_APB_DEVICE(lpc32xx_ssp0, "dev:ssp0", 0,
195 .dev = { 183 LPC32XX_SSP0_BASE, { IRQ_LPC32XX_SSP0 }, &lpc32xx_ssp0_data);
196 .coherent_dma_mask = ~0,
197 .init_name = "dev:ssp0",
198 .platform_data = &lpc32xx_ssp0_data,
199 },
200 .res = {
201 .start = LPC32XX_SSP0_BASE,
202 .end = (LPC32XX_SSP0_BASE + SZ_4K - 1),
203 .flags = IORESOURCE_MEM,
204 },
205 .dma_mask = ~0,
206 .irq = {IRQ_LPC32XX_SSP0, NO_IRQ},
207};
208 184
209/* AT25 driver registration */ 185/* AT25 driver registration */
210static int __init phy3250_spi_board_register(void) 186static int __init phy3250_spi_board_register(void)
diff --git a/arch/arm/mach-mmp/include/mach/entry-macro.S b/arch/arm/mach-mmp/include/mach/entry-macro.S
index c42d9d4e892..9cff9e7a2b2 100644
--- a/arch/arm/mach-mmp/include/mach/entry-macro.S
+++ b/arch/arm/mach-mmp/include/mach/entry-macro.S
@@ -8,12 +8,6 @@
8 8
9#include <mach/regs-icu.h> 9#include <mach/regs-icu.h>
10 10
11 .macro disable_fiq
12 .endm
13
14 .macro arch_ret_to_user, tmp1, tmp2
15 .endm
16
17 .macro get_irqnr_preamble, base, tmp 11 .macro get_irqnr_preamble, base, tmp
18 mrc p15, 0, \tmp, c0, c0, 0 @ CPUID 12 mrc p15, 0, \tmp, c0, c0, 0 @ CPUID
19 and \tmp, \tmp, #0xff00 13 and \tmp, \tmp, #0xff00
diff --git a/arch/arm/mach-mmp/include/mach/system.h b/arch/arm/mach-mmp/include/mach/system.h
deleted file mode 100644
index 1d001eab81e..00000000000
--- a/arch/arm/mach-mmp/include/mach/system.h
+++ /dev/null
@@ -1,16 +0,0 @@
1/*
2 * linux/arch/arm/mach-mmp/include/mach/system.h
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9#ifndef __ASM_MACH_SYSTEM_H
10#define __ASM_MACH_SYSTEM_H
11
12static inline void arch_idle(void)
13{
14 cpu_do_idle();
15}
16#endif /* __ASM_MACH_SYSTEM_H */
diff --git a/arch/arm/mach-msm/idle.S b/arch/arm/mach-msm/idle.S
deleted file mode 100644
index 6a94f052713..00000000000
--- a/arch/arm/mach-msm/idle.S
+++ /dev/null
@@ -1,36 +0,0 @@
1/* arch/arm/mach-msm/include/mach/idle.S
2 *
3 * Idle processing for MSM7K - work around bugs with SWFI.
4 *
5 * Copyright (c) 2007 QUALCOMM Incorporated.
6 * Copyright (C) 2007 Google, Inc.
7 *
8 * This software is licensed under the terms of the GNU General Public
9 * License version 2, as published by the Free Software Foundation, and
10 * may be copied, distributed, and modified under those terms.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 */
18
19#include <linux/linkage.h>
20#include <asm/assembler.h>
21
22ENTRY(arch_idle)
23#ifdef CONFIG_MSM7X00A_IDLE
24 mrc p15, 0, r1, c1, c0, 0 /* read current CR */
25 bic r0, r1, #(1 << 2) /* clear dcache bit */
26 bic r0, r0, #(1 << 12) /* clear icache bit */
27 mcr p15, 0, r0, c1, c0, 0 /* disable d/i cache */
28
29 mov r0, #0 /* prepare wfi value */
30 mcr p15, 0, r0, c7, c10, 0 /* flush the cache */
31 mcr p15, 0, r0, c7, c10, 4 /* memory barrier */
32 mcr p15, 0, r0, c7, c0, 4 /* wait for interrupt */
33
34 mcr p15, 0, r1, c1, c0, 0 /* restore d/i cache */
35#endif
36 mov pc, lr
diff --git a/arch/arm/mach-msm/idle.c b/arch/arm/mach-msm/idle.c
new file mode 100644
index 00000000000..0c9e13c6574
--- /dev/null
+++ b/arch/arm/mach-msm/idle.c
@@ -0,0 +1,49 @@
1/* arch/arm/mach-msm/idle.c
2 *
3 * Idle processing for MSM7K - work around bugs with SWFI.
4 *
5 * Copyright (c) 2007 QUALCOMM Incorporated.
6 * Copyright (C) 2007 Google, Inc.
7 *
8 * This software is licensed under the terms of the GNU General Public
9 * License version 2, as published by the Free Software Foundation, and
10 * may be copied, distributed, and modified under those terms.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 */
18
19#include <linux/init.h>
20#include <asm/system.h>
21
22static void msm_idle(void)
23{
24#ifdef CONFIG_MSM7X00A_IDLE
25 asm volatile (
26
27 "mrc p15, 0, r1, c1, c0, 0 /* read current CR */ \n\t"
28 "bic r0, r1, #(1 << 2) /* clear dcache bit */ \n\t"
29 "bic r0, r0, #(1 << 12) /* clear icache bit */ \n\t"
30 "mcr p15, 0, r0, c1, c0, 0 /* disable d/i cache */ \n\t"
31
32 "mov r0, #0 /* prepare wfi value */ \n\t"
33 "mcr p15, 0, r0, c7, c10, 0 /* flush the cache */ \n\t"
34 "mcr p15, 0, r0, c7, c10, 4 /* memory barrier */ \n\t"
35 "mcr p15, 0, r0, c7, c0, 4 /* wait for interrupt */ \n\t"
36
37 "mcr p15, 0, r1, c1, c0, 0 /* restore d/i cache */ \n\t"
38
39 : : : "r0","r1" );
40#endif
41}
42
43static int __init msm_idle_init(void)
44{
45 arm_pm_idle = msm_idle;
46 return 0;
47}
48
49arch_initcall(msm_idle_init);
diff --git a/arch/arm/mach-msm/include/mach/entry-macro.S b/arch/arm/mach-msm/include/mach/entry-macro.S
index 41f7003ef34..f2ae9087f65 100644
--- a/arch/arm/mach-msm/include/mach/entry-macro.S
+++ b/arch/arm/mach-msm/include/mach/entry-macro.S
@@ -16,12 +16,6 @@
16 * 16 *
17 */ 17 */
18 18
19 .macro disable_fiq
20 .endm
21
22 .macro arch_ret_to_user, tmp1, tmp2
23 .endm
24
25#if !defined(CONFIG_ARM_GIC) 19#if !defined(CONFIG_ARM_GIC)
26#include <mach/msm_iomap.h> 20#include <mach/msm_iomap.h>
27 21
diff --git a/arch/arm/mach-msm/include/mach/system.h b/arch/arm/mach-msm/include/mach/system.h
index 311db2b35da..f5fb2ec87ff 100644
--- a/arch/arm/mach-msm/include/mach/system.h
+++ b/arch/arm/mach-msm/include/mach/system.h
@@ -12,7 +12,6 @@
12 * GNU General Public License for more details. 12 * GNU General Public License for more details.
13 * 13 *
14 */ 14 */
15void arch_idle(void);
16 15
17/* low level hardware reset hook -- for example, hitting the 16/* low level hardware reset hook -- for example, hitting the
18 * PSHOLD line on the PMIC to hard reset the system 17 * PSHOLD line on the PMIC to hard reset the system
diff --git a/arch/arm/mach-mv78xx0/include/mach/entry-macro.S b/arch/arm/mach-mv78xx0/include/mach/entry-macro.S
index 66ae2d29e77..6b1f088e059 100644
--- a/arch/arm/mach-mv78xx0/include/mach/entry-macro.S
+++ b/arch/arm/mach-mv78xx0/include/mach/entry-macro.S
@@ -10,12 +10,6 @@
10 10
11#include <mach/bridge-regs.h> 11#include <mach/bridge-regs.h>
12 12
13 .macro disable_fiq
14 .endm
15
16 .macro arch_ret_to_user, tmp1, tmp2
17 .endm
18
19 .macro get_irqnr_preamble, base, tmp 13 .macro get_irqnr_preamble, base, tmp
20 ldr \base, =IRQ_VIRT_BASE 14 ldr \base, =IRQ_VIRT_BASE
21 .endm 15 .endm
diff --git a/arch/arm/mach-mv78xx0/include/mach/system.h b/arch/arm/mach-mv78xx0/include/mach/system.h
deleted file mode 100644
index 8c3a5387cec..00000000000
--- a/arch/arm/mach-mv78xx0/include/mach/system.h
+++ /dev/null
@@ -1,17 +0,0 @@
1/*
2 * arch/arm/mach-mv78xx0/include/mach/system.h
3 *
4 * This file is licensed under the terms of the GNU General Public
5 * License version 2. This program is licensed "as is" without any
6 * warranty of any kind, whether express or implied.
7 */
8
9#ifndef __ASM_ARCH_SYSTEM_H
10#define __ASM_ARCH_SYSTEM_H
11
12static inline void arch_idle(void)
13{
14 cpu_do_idle();
15}
16
17#endif
diff --git a/arch/arm/mach-mxs/devices.c b/arch/arm/mach-mxs/devices.c
index fe3e847930c..01faffec306 100644
--- a/arch/arm/mach-mxs/devices.c
+++ b/arch/arm/mach-mxs/devices.c
@@ -77,16 +77,18 @@ err:
77 77
78int __init mxs_add_amba_device(const struct amba_device *dev) 78int __init mxs_add_amba_device(const struct amba_device *dev)
79{ 79{
80 struct amba_device *adev = kmalloc(sizeof(*adev), GFP_KERNEL); 80 struct amba_device *adev = amba_device_alloc(dev->dev.init_name,
81 dev->res.start, resource_size(&dev->res));
81 82
82 if (!adev) { 83 if (!adev) {
83 pr_err("%s: failed to allocate memory", __func__); 84 pr_err("%s: failed to allocate memory", __func__);
84 return -ENOMEM; 85 return -ENOMEM;
85 } 86 }
86 87
87 *adev = *dev; 88 adev->irq[0] = dev->irq[0];
89 adev->irq[1] = dev->irq[1];
88 90
89 return amba_device_register(adev, &iomem_resource); 91 return amba_device_add(adev, &iomem_resource);
90} 92}
91 93
92struct device mxs_apbh_bus = { 94struct device mxs_apbh_bus = {
diff --git a/arch/arm/mach-mxs/devices/amba-duart.c b/arch/arm/mach-mxs/devices/amba-duart.c
index a559db09b49..a5479f76604 100644
--- a/arch/arm/mach-mxs/devices/amba-duart.c
+++ b/arch/arm/mach-mxs/devices/amba-duart.c
@@ -23,7 +23,7 @@ const struct amba_device name##_device __initconst = { \
23 .end = (soc ## _DUART_BASE_ADDR) + SZ_8K - 1, \ 23 .end = (soc ## _DUART_BASE_ADDR) + SZ_8K - 1, \
24 .flags = IORESOURCE_MEM, \ 24 .flags = IORESOURCE_MEM, \
25 }, \ 25 }, \
26 .irq = {soc ## _INT_DUART, NO_IRQ}, \ 26 .irq = {soc ## _INT_DUART}, \
27} 27}
28 28
29#ifdef CONFIG_SOC_IMX23 29#ifdef CONFIG_SOC_IMX23
diff --git a/arch/arm/mach-mxs/include/mach/entry-macro.S b/arch/arm/mach-mxs/include/mach/entry-macro.S
index 9f0da12e657..0c14259705b 100644
--- a/arch/arm/mach-mxs/include/mach/entry-macro.S
+++ b/arch/arm/mach-mxs/include/mach/entry-macro.S
@@ -23,9 +23,6 @@
23#define MXS_ICOLL_VBASE MXS_IO_ADDRESS(MXS_ICOLL_BASE_ADDR) 23#define MXS_ICOLL_VBASE MXS_IO_ADDRESS(MXS_ICOLL_BASE_ADDR)
24#define HW_ICOLL_STAT_OFFSET 0x70 24#define HW_ICOLL_STAT_OFFSET 0x70
25 25
26 .macro disable_fiq
27 .endm
28
29 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp 26 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
30 ldr \irqnr, [\base, #HW_ICOLL_STAT_OFFSET] 27 ldr \irqnr, [\base, #HW_ICOLL_STAT_OFFSET]
31 cmp \irqnr, #0x7F 28 cmp \irqnr, #0x7F
@@ -36,6 +33,3 @@
36 .macro get_irqnr_preamble, base, tmp 33 .macro get_irqnr_preamble, base, tmp
37 ldr \base, =MXS_ICOLL_VBASE 34 ldr \base, =MXS_ICOLL_VBASE
38 .endm 35 .endm
39
40 .macro arch_ret_to_user, tmp1, tmp2
41 .endm
diff --git a/arch/arm/mach-mxs/include/mach/system.h b/arch/arm/mach-mxs/include/mach/system.h
deleted file mode 100644
index e7ad1bb2942..00000000000
--- a/arch/arm/mach-mxs/include/mach/system.h
+++ /dev/null
@@ -1,25 +0,0 @@
1/*
2 * Copyright (C) 1999 ARM Limited
3 * Copyright (C) 2000 Deep Blue Solutions Ltd
4 * Copyright 2004-2008 Freescale Semiconductor, Inc. All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 */
16
17#ifndef __MACH_MXS_SYSTEM_H__
18#define __MACH_MXS_SYSTEM_H__
19
20static inline void arch_idle(void)
21{
22 cpu_do_idle();
23}
24
25#endif /* __MACH_MXS_SYSTEM_H__ */
diff --git a/arch/arm/mach-mxs/pm.c b/arch/arm/mach-mxs/pm.c
index fb042da29bd..a9b4bbcdafb 100644
--- a/arch/arm/mach-mxs/pm.c
+++ b/arch/arm/mach-mxs/pm.c
@@ -15,13 +15,12 @@
15#include <linux/kernel.h> 15#include <linux/kernel.h>
16#include <linux/suspend.h> 16#include <linux/suspend.h>
17#include <linux/io.h> 17#include <linux/io.h>
18#include <mach/system.h>
19 18
20static int mxs_suspend_enter(suspend_state_t state) 19static int mxs_suspend_enter(suspend_state_t state)
21{ 20{
22 switch (state) { 21 switch (state) {
23 case PM_SUSPEND_MEM: 22 case PM_SUSPEND_MEM:
24 arch_idle(); 23 cpu_do_idle();
25 break; 24 break;
26 25
27 default: 26 default:
diff --git a/arch/arm/mach-netx/fb.c b/arch/arm/mach-netx/fb.c
index b9913234bbf..2cdf6ef69be 100644
--- a/arch/arm/mach-netx/fb.c
+++ b/arch/arm/mach-netx/fb.c
@@ -92,18 +92,7 @@ void clk_put(struct clk *clk)
92{ 92{
93} 93}
94 94
95static struct amba_device fb_device = { 95static AMBA_AHB_DEVICE(fb, "fb", 0, 0x00104000, { NETX_IRQ_LCD }, NULL);
96 .dev = {
97 .init_name = "fb",
98 .coherent_dma_mask = ~0,
99 },
100 .res = {
101 .start = 0x00104000,
102 .end = 0x00104fff,
103 .flags = IORESOURCE_MEM,
104 },
105 .irq = { NETX_IRQ_LCD, NO_IRQ },
106};
107 96
108int netx_fb_init(struct clcd_board *board, struct clcd_panel *panel) 97int netx_fb_init(struct clcd_board *board, struct clcd_panel *panel)
109{ 98{
diff --git a/arch/arm/mach-netx/include/mach/entry-macro.S b/arch/arm/mach-netx/include/mach/entry-macro.S
deleted file mode 100644
index 6e9f1cbe163..00000000000
--- a/arch/arm/mach-netx/include/mach/entry-macro.S
+++ /dev/null
@@ -1,26 +0,0 @@
1/*
2 * arch/arm/mach-netx/include/mach/entry-macro.S
3 *
4 * Low-level IRQ helper macros for Hilscher netX based platforms
5 *
6 * Copyright (C) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2
10 * as published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21
22 .macro disable_fiq
23 .endm
24
25 .macro arch_ret_to_user, tmp1, tmp2
26 .endm
diff --git a/arch/arm/mach-netx/include/mach/system.h b/arch/arm/mach-netx/include/mach/system.h
deleted file mode 100644
index b38fa36d58c..00000000000
--- a/arch/arm/mach-netx/include/mach/system.h
+++ /dev/null
@@ -1,28 +0,0 @@
1/*
2 * arch/arm/mach-netx/include/mach/system.h
3 *
4 * Copyright (C) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2
8 * as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */
19#ifndef __ASM_ARCH_SYSTEM_H
20#define __ASM_ARCH_SYSTEM_H
21
22static inline void arch_idle(void)
23{
24 cpu_do_idle();
25}
26
27#endif
28
diff --git a/arch/arm/mach-nomadik/board-nhk8815.c b/arch/arm/mach-nomadik/board-nhk8815.c
index 7c878bf0034..f6f74adbe8c 100644
--- a/arch/arm/mach-nomadik/board-nhk8815.c
+++ b/arch/arm/mach-nomadik/board-nhk8815.c
@@ -185,20 +185,11 @@ static void __init nhk8815_onenand_init(void)
185#endif 185#endif
186} 186}
187 187
188#define __MEM_4K_RESOURCE(x) \ 188static AMBA_APB_DEVICE(uart0, "uart0", 0, NOMADIK_UART0_BASE,
189 .res = {.start = (x), .end = (x) + SZ_4K - 1, .flags = IORESOURCE_MEM} 189 { IRQ_UART0 }, NULL);
190 190
191static struct amba_device uart0_device = { 191static AMBA_APB_DEVICE(uart1, "uart1", 0, NOMADIK_UART1_BASE,
192 .dev = { .init_name = "uart0" }, 192 { IRQ_UART1 }, NULL);
193 __MEM_4K_RESOURCE(NOMADIK_UART0_BASE),
194 .irq = {IRQ_UART0, NO_IRQ},
195};
196
197static struct amba_device uart1_device = {
198 .dev = { .init_name = "uart1" },
199 __MEM_4K_RESOURCE(NOMADIK_UART1_BASE),
200 .irq = {IRQ_UART1, NO_IRQ},
201};
202 193
203static struct amba_device *amba_devs[] __initdata = { 194static struct amba_device *amba_devs[] __initdata = {
204 &uart0_device, 195 &uart0_device,
diff --git a/arch/arm/mach-nomadik/cpu-8815.c b/arch/arm/mach-nomadik/cpu-8815.c
index 65df7b4fdd3..27f43a46985 100644
--- a/arch/arm/mach-nomadik/cpu-8815.c
+++ b/arch/arm/mach-nomadik/cpu-8815.c
@@ -97,12 +97,7 @@ static struct platform_device cpu8815_platform_gpio[] = {
97 GPIO_DEVICE(3), 97 GPIO_DEVICE(3),
98}; 98};
99 99
100static struct amba_device cpu8815_amba_rng = { 100static AMBA_APB_DEVICE(cpu8815_amba_rng, "rng", 0, NOMADIK_RNG_BASE, { }, NULL);
101 .dev = {
102 .init_name = "rng",
103 },
104 __MEM_4K_RESOURCE(NOMADIK_RNG_BASE),
105};
106 101
107static struct platform_device *platform_devs[] __initdata = { 102static struct platform_device *platform_devs[] __initdata = {
108 cpu8815_platform_gpio + 0, 103 cpu8815_platform_gpio + 0,
@@ -112,7 +107,7 @@ static struct platform_device *platform_devs[] __initdata = {
112}; 107};
113 108
114static struct amba_device *amba_devs[] __initdata = { 109static struct amba_device *amba_devs[] __initdata = {
115 &cpu8815_amba_rng 110 &cpu8815_amba_rng_device
116}; 111};
117 112
118static int __init cpu8815_init(void) 113static int __init cpu8815_init(void)
diff --git a/arch/arm/mach-nomadik/include/mach/entry-macro.S b/arch/arm/mach-nomadik/include/mach/entry-macro.S
deleted file mode 100644
index 98ea1c1fbba..00000000000
--- a/arch/arm/mach-nomadik/include/mach/entry-macro.S
+++ /dev/null
@@ -1,13 +0,0 @@
1/*
2 * Low-level IRQ helper macros for Nomadik platforms
3 *
4 * This file is licensed under the terms of the GNU General Public
5 * License version 2. This program is licensed "as is" without any
6 * warranty of any kind, whether express or implied.
7 */
8
9 .macro disable_fiq
10 .endm
11
12 .macro arch_ret_to_user, tmp1, tmp2
13 .endm
diff --git a/arch/arm/mach-nomadik/include/mach/system.h b/arch/arm/mach-nomadik/include/mach/system.h
deleted file mode 100644
index 25e198b8976..00000000000
--- a/arch/arm/mach-nomadik/include/mach/system.h
+++ /dev/null
@@ -1,32 +0,0 @@
1/*
2 * mach-nomadik/include/mach/system.h
3 *
4 * Copyright (C) 2008 STMicroelectronics
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20#ifndef __ASM_ARCH_SYSTEM_H
21#define __ASM_ARCH_SYSTEM_H
22
23static inline void arch_idle(void)
24{
25 /*
26 * This should do all the clock switching
27 * and wait for interrupt tricks
28 */
29 cpu_do_idle();
30}
31
32#endif
diff --git a/arch/arm/mach-omap1/ams-delta-fiq-handler.S b/arch/arm/mach-omap1/ams-delta-fiq-handler.S
index c1c5fb6a5b4..399c4c49722 100644
--- a/arch/arm/mach-omap1/ams-delta-fiq-handler.S
+++ b/arch/arm/mach-omap1/ams-delta-fiq-handler.S
@@ -15,11 +15,12 @@
15 15
16#include <linux/linkage.h> 16#include <linux/linkage.h>
17 17
18#include <plat/io.h>
19#include <plat/board-ams-delta.h> 18#include <plat/board-ams-delta.h>
20 19
21#include <mach/ams-delta-fiq.h> 20#include <mach/ams-delta-fiq.h>
22 21
22#include "iomap.h"
23
23/* 24/*
24 * GPIO related definitions, copied from arch/arm/plat-omap/gpio.c. 25 * GPIO related definitions, copied from arch/arm/plat-omap/gpio.c.
25 * Unfortunately, those were not placed in a separate header file. 26 * Unfortunately, those were not placed in a separate header file.
diff --git a/arch/arm/mach-omap1/ams-delta-fiq.c b/arch/arm/mach-omap1/ams-delta-fiq.c
index 152b32c15e2..fcce7ff3763 100644
--- a/arch/arm/mach-omap1/ams-delta-fiq.c
+++ b/arch/arm/mach-omap1/ams-delta-fiq.c
@@ -22,6 +22,7 @@
22#include <plat/board-ams-delta.h> 22#include <plat/board-ams-delta.h>
23 23
24#include <asm/fiq.h> 24#include <asm/fiq.h>
25
25#include <mach/ams-delta-fiq.h> 26#include <mach/ams-delta-fiq.h>
26 27
27static struct fiq_handler fh = { 28static struct fiq_handler fh = {
diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c
index 88909cc0b25..ac65d7d7c7a 100644
--- a/arch/arm/mach-omap1/board-ams-delta.c
+++ b/arch/arm/mach-omap1/board-ams-delta.c
@@ -20,25 +20,27 @@
20#include <linux/platform_device.h> 20#include <linux/platform_device.h>
21#include <linux/serial_8250.h> 21#include <linux/serial_8250.h>
22#include <linux/export.h> 22#include <linux/export.h>
23#include <linux/io.h>
23 24
24#include <media/soc_camera.h> 25#include <media/soc_camera.h>
25 26
26#include <asm/serial.h> 27#include <asm/serial.h>
27#include <mach/hardware.h>
28#include <asm/mach-types.h> 28#include <asm/mach-types.h>
29#include <asm/mach/arch.h> 29#include <asm/mach/arch.h>
30#include <asm/mach/map.h> 30#include <asm/mach/map.h>
31 31
32#include <plat/io.h>
33#include <plat/board-ams-delta.h> 32#include <plat/board-ams-delta.h>
34#include <plat/keypad.h> 33#include <plat/keypad.h>
35#include <plat/mux.h> 34#include <plat/mux.h>
36#include <plat/usb.h> 35#include <plat/usb.h>
37#include <plat/board.h> 36#include <plat/board.h>
38#include "common.h"
39#include <mach/camera.h>
40 37
38#include <mach/hardware.h>
41#include <mach/ams-delta-fiq.h> 39#include <mach/ams-delta-fiq.h>
40#include <mach/camera.h>
41
42#include "iomap.h"
43#include "common.h"
42 44
43static u8 ams_delta_latch1_reg; 45static u8 ams_delta_latch1_reg;
44static u16 ams_delta_latch2_reg; 46static u16 ams_delta_latch2_reg;
diff --git a/arch/arm/mach-omap1/board-fsample.c b/arch/arm/mach-omap1/board-fsample.c
index 0b9464b4121..079292cca58 100644
--- a/arch/arm/mach-omap1/board-fsample.c
+++ b/arch/arm/mach-omap1/board-fsample.c
@@ -22,7 +22,6 @@
22#include <linux/input.h> 22#include <linux/input.h>
23#include <linux/smc91x.h> 23#include <linux/smc91x.h>
24 24
25#include <mach/hardware.h>
26#include <asm/mach-types.h> 25#include <asm/mach-types.h>
27#include <asm/mach/arch.h> 26#include <asm/mach/arch.h>
28#include <asm/mach/map.h> 27#include <asm/mach/map.h>
@@ -32,9 +31,13 @@
32#include <plat/flash.h> 31#include <plat/flash.h>
33#include <plat/fpga.h> 32#include <plat/fpga.h>
34#include <plat/keypad.h> 33#include <plat/keypad.h>
35#include "common.h"
36#include <plat/board.h> 34#include <plat/board.h>
37 35
36#include <mach/hardware.h>
37
38#include "iomap.h"
39#include "common.h"
40
38/* fsample is pretty close to p2-sample */ 41/* fsample is pretty close to p2-sample */
39 42
40#define fsample_cpld_read(reg) __raw_readb(reg) 43#define fsample_cpld_read(reg) __raw_readb(reg)
diff --git a/arch/arm/mach-omap1/board-h2.c b/arch/arm/mach-omap1/board-h2.c
index 00ad6b22d60..03e0050a896 100644
--- a/arch/arm/mach-omap1/board-h2.c
+++ b/arch/arm/mach-omap1/board-h2.c
@@ -31,8 +31,6 @@
31#include <linux/i2c/tps65010.h> 31#include <linux/i2c/tps65010.h>
32#include <linux/smc91x.h> 32#include <linux/smc91x.h>
33 33
34#include <mach/hardware.h>
35
36#include <asm/mach-types.h> 34#include <asm/mach-types.h>
37#include <asm/mach/arch.h> 35#include <asm/mach/arch.h>
38#include <asm/mach/map.h> 36#include <asm/mach/map.h>
@@ -43,9 +41,11 @@
43#include <plat/irda.h> 41#include <plat/irda.h>
44#include <plat/usb.h> 42#include <plat/usb.h>
45#include <plat/keypad.h> 43#include <plat/keypad.h>
46#include "common.h"
47#include <plat/flash.h> 44#include <plat/flash.h>
48 45
46#include <mach/hardware.h>
47
48#include "common.h"
49#include "board-h2.h" 49#include "board-h2.h"
50 50
51/* At OMAP1610 Innovator the Ethernet is directly connected to CS1 */ 51/* At OMAP1610 Innovator the Ethernet is directly connected to CS1 */
diff --git a/arch/arm/mach-omap1/board-h3.c b/arch/arm/mach-omap1/board-h3.c
index 4a7f2514970..f304fe211b1 100644
--- a/arch/arm/mach-omap1/board-h3.c
+++ b/arch/arm/mach-omap1/board-h3.c
@@ -33,21 +33,21 @@
33 33
34#include <asm/setup.h> 34#include <asm/setup.h>
35#include <asm/page.h> 35#include <asm/page.h>
36#include <mach/hardware.h>
37
38#include <asm/mach-types.h> 36#include <asm/mach-types.h>
39#include <asm/mach/arch.h> 37#include <asm/mach/arch.h>
40#include <asm/mach/map.h> 38#include <asm/mach/map.h>
41 39
42#include <mach/irqs.h>
43#include <plat/mux.h> 40#include <plat/mux.h>
44#include <plat/tc.h> 41#include <plat/tc.h>
45#include <plat/usb.h> 42#include <plat/usb.h>
46#include <plat/keypad.h> 43#include <plat/keypad.h>
47#include <plat/dma.h> 44#include <plat/dma.h>
48#include "common.h"
49#include <plat/flash.h> 45#include <plat/flash.h>
50 46
47#include <mach/hardware.h>
48#include <mach/irqs.h>
49
50#include "common.h"
51#include "board-h3.h" 51#include "board-h3.h"
52 52
53/* In OMAP1710 H3 the Ethernet is directly connected to CS1 */ 53/* In OMAP1710 H3 the Ethernet is directly connected to CS1 */
diff --git a/arch/arm/mach-omap1/board-htcherald.c b/arch/arm/mach-omap1/board-htcherald.c
index 731cc3db7ab..fa52d145d7b 100644
--- a/arch/arm/mach-omap1/board-htcherald.c
+++ b/arch/arm/mach-omap1/board-htcherald.c
@@ -27,7 +27,7 @@
27#include <linux/init.h> 27#include <linux/init.h>
28#include <linux/platform_device.h> 28#include <linux/platform_device.h>
29#include <linux/input.h> 29#include <linux/input.h>
30#include <linux/io.h> 30#include <linux/delay.h>
31#include <linux/gpio.h> 31#include <linux/gpio.h>
32#include <linux/gpio_keys.h> 32#include <linux/gpio_keys.h>
33#include <linux/i2c.h> 33#include <linux/i2c.h>
@@ -41,7 +41,6 @@
41#include <asm/mach/arch.h> 41#include <asm/mach/arch.h>
42 42
43#include <plat/omap7xx.h> 43#include <plat/omap7xx.h>
44#include "common.h"
45#include <plat/board.h> 44#include <plat/board.h>
46#include <plat/keypad.h> 45#include <plat/keypad.h>
47#include <plat/usb.h> 46#include <plat/usb.h>
@@ -49,7 +48,7 @@
49 48
50#include <mach/irqs.h> 49#include <mach/irqs.h>
51 50
52#include <linux/delay.h> 51#include "common.h"
53 52
54/* LCD register definition */ 53/* LCD register definition */
55#define OMAP_LCDC_CONTROL (0xfffec000 + 0x00) 54#define OMAP_LCDC_CONTROL (0xfffec000 + 0x00)
diff --git a/arch/arm/mach-omap1/board-innovator.c b/arch/arm/mach-omap1/board-innovator.c
index 309369ea697..289a6b82c5f 100644
--- a/arch/arm/mach-omap1/board-innovator.c
+++ b/arch/arm/mach-omap1/board-innovator.c
@@ -26,7 +26,6 @@
26#include <linux/input.h> 26#include <linux/input.h>
27#include <linux/smc91x.h> 27#include <linux/smc91x.h>
28 28
29#include <mach/hardware.h>
30#include <asm/mach-types.h> 29#include <asm/mach-types.h>
31#include <asm/mach/arch.h> 30#include <asm/mach/arch.h>
32#include <asm/mach/map.h> 31#include <asm/mach/map.h>
@@ -37,9 +36,13 @@
37#include <plat/tc.h> 36#include <plat/tc.h>
38#include <plat/usb.h> 37#include <plat/usb.h>
39#include <plat/keypad.h> 38#include <plat/keypad.h>
40#include "common.h"
41#include <plat/mmc.h> 39#include <plat/mmc.h>
42 40
41#include <mach/hardware.h>
42
43#include "iomap.h"
44#include "common.h"
45
43/* At OMAP1610 Innovator the Ethernet is directly connected to CS1 */ 46/* At OMAP1610 Innovator the Ethernet is directly connected to CS1 */
44#define INNOVATOR1610_ETHR_START 0x04000300 47#define INNOVATOR1610_ETHR_START 0x04000300
45 48
diff --git a/arch/arm/mach-omap1/board-nokia770.c b/arch/arm/mach-omap1/board-nokia770.c
index f9efc036ba9..abdbdb08644 100644
--- a/arch/arm/mach-omap1/board-nokia770.c
+++ b/arch/arm/mach-omap1/board-nokia770.c
@@ -21,7 +21,6 @@
21#include <linux/workqueue.h> 21#include <linux/workqueue.h>
22#include <linux/delay.h> 22#include <linux/delay.h>
23 23
24#include <mach/hardware.h>
25#include <asm/mach-types.h> 24#include <asm/mach-types.h>
26#include <asm/mach/arch.h> 25#include <asm/mach/arch.h>
27#include <asm/mach/map.h> 26#include <asm/mach/map.h>
@@ -30,12 +29,15 @@
30#include <plat/usb.h> 29#include <plat/usb.h>
31#include <plat/board.h> 30#include <plat/board.h>
32#include <plat/keypad.h> 31#include <plat/keypad.h>
33#include "common.h"
34#include <plat/hwa742.h> 32#include <plat/hwa742.h>
35#include <plat/lcd_mipid.h> 33#include <plat/lcd_mipid.h>
36#include <plat/mmc.h> 34#include <plat/mmc.h>
37#include <plat/clock.h> 35#include <plat/clock.h>
38 36
37#include <mach/hardware.h>
38
39#include "common.h"
40
39#define ADS7846_PENDOWN_GPIO 15 41#define ADS7846_PENDOWN_GPIO 15
40 42
41static const unsigned int nokia770_keymap[] = { 43static const unsigned int nokia770_keymap[] = {
diff --git a/arch/arm/mach-omap1/board-osk.c b/arch/arm/mach-omap1/board-osk.c
index 675de06557a..e2d7ae4418f 100644
--- a/arch/arm/mach-omap1/board-osk.c
+++ b/arch/arm/mach-omap1/board-osk.c
@@ -34,15 +34,11 @@
34#include <linux/i2c.h> 34#include <linux/i2c.h>
35#include <linux/leds.h> 35#include <linux/leds.h>
36#include <linux/smc91x.h> 36#include <linux/smc91x.h>
37
38#include <linux/mtd/mtd.h> 37#include <linux/mtd/mtd.h>
39#include <linux/mtd/partitions.h> 38#include <linux/mtd/partitions.h>
40#include <linux/mtd/physmap.h> 39#include <linux/mtd/physmap.h>
41
42#include <linux/i2c/tps65010.h> 40#include <linux/i2c/tps65010.h>
43 41
44#include <mach/hardware.h>
45
46#include <asm/mach-types.h> 42#include <asm/mach-types.h>
47#include <asm/mach/arch.h> 43#include <asm/mach/arch.h>
48#include <asm/mach/map.h> 44#include <asm/mach/map.h>
@@ -51,6 +47,9 @@
51#include <plat/usb.h> 47#include <plat/usb.h>
52#include <plat/mux.h> 48#include <plat/mux.h>
53#include <plat/tc.h> 49#include <plat/tc.h>
50
51#include <mach/hardware.h>
52
54#include "common.h" 53#include "common.h"
55 54
56/* At OMAP5912 OSK the Ethernet is directly connected to CS1 */ 55/* At OMAP5912 OSK the Ethernet is directly connected to CS1 */
diff --git a/arch/arm/mach-omap1/board-palmte.c b/arch/arm/mach-omap1/board-palmte.c
index 81fa27f8836..04efa7e6114 100644
--- a/arch/arm/mach-omap1/board-palmte.c
+++ b/arch/arm/mach-omap1/board-palmte.c
@@ -28,7 +28,6 @@
28#include <linux/interrupt.h> 28#include <linux/interrupt.h>
29#include <linux/apm-emulation.h> 29#include <linux/apm-emulation.h>
30 30
31#include <mach/hardware.h>
32#include <asm/mach-types.h> 31#include <asm/mach-types.h>
33#include <asm/mach/arch.h> 32#include <asm/mach/arch.h>
34#include <asm/mach/map.h> 33#include <asm/mach/map.h>
@@ -41,6 +40,9 @@
41#include <plat/board.h> 40#include <plat/board.h>
42#include <plat/irda.h> 41#include <plat/irda.h>
43#include <plat/keypad.h> 42#include <plat/keypad.h>
43
44#include <mach/hardware.h>
45
44#include "common.h" 46#include "common.h"
45 47
46#define PALMTE_USBDETECT_GPIO 0 48#define PALMTE_USBDETECT_GPIO 0
diff --git a/arch/arm/mach-omap1/board-palmtt.c b/arch/arm/mach-omap1/board-palmtt.c
index 81cb8217838..acd1f3645ba 100644
--- a/arch/arm/mach-omap1/board-palmtt.c
+++ b/arch/arm/mach-omap1/board-palmtt.c
@@ -24,8 +24,9 @@
24#include <linux/mtd/partitions.h> 24#include <linux/mtd/partitions.h>
25#include <linux/mtd/physmap.h> 25#include <linux/mtd/physmap.h>
26#include <linux/leds.h> 26#include <linux/leds.h>
27#include <linux/spi/spi.h>
28#include <linux/spi/ads7846.h>
27 29
28#include <mach/hardware.h>
29#include <asm/mach-types.h> 30#include <asm/mach-types.h>
30#include <asm/mach/arch.h> 31#include <asm/mach/arch.h>
31#include <asm/mach/map.h> 32#include <asm/mach/map.h>
@@ -39,10 +40,10 @@
39#include <plat/board.h> 40#include <plat/board.h>
40#include <plat/irda.h> 41#include <plat/irda.h>
41#include <plat/keypad.h> 42#include <plat/keypad.h>
42#include "common.h"
43 43
44#include <linux/spi/spi.h> 44#include <mach/hardware.h>
45#include <linux/spi/ads7846.h> 45
46#include "common.h"
46 47
47#define PALMTT_USBDETECT_GPIO 0 48#define PALMTT_USBDETECT_GPIO 0
48#define PALMTT_CABLE_GPIO 1 49#define PALMTT_CABLE_GPIO 1
diff --git a/arch/arm/mach-omap1/board-palmz71.c b/arch/arm/mach-omap1/board-palmz71.c
index e881945ce8e..c1cd0f2d686 100644
--- a/arch/arm/mach-omap1/board-palmz71.c
+++ b/arch/arm/mach-omap1/board-palmz71.c
@@ -27,8 +27,9 @@
27#include <linux/mtd/mtd.h> 27#include <linux/mtd/mtd.h>
28#include <linux/mtd/partitions.h> 28#include <linux/mtd/partitions.h>
29#include <linux/mtd/physmap.h> 29#include <linux/mtd/physmap.h>
30#include <linux/spi/spi.h>
31#include <linux/spi/ads7846.h>
30 32
31#include <mach/hardware.h>
32#include <asm/mach-types.h> 33#include <asm/mach-types.h>
33#include <asm/mach/arch.h> 34#include <asm/mach/arch.h>
34#include <asm/mach/map.h> 35#include <asm/mach/map.h>
@@ -41,10 +42,10 @@
41#include <plat/board.h> 42#include <plat/board.h>
42#include <plat/irda.h> 43#include <plat/irda.h>
43#include <plat/keypad.h> 44#include <plat/keypad.h>
44#include "common.h"
45 45
46#include <linux/spi/spi.h> 46#include <mach/hardware.h>
47#include <linux/spi/ads7846.h> 47
48#include "common.h"
48 49
49#define PALMZ71_USBDETECT_GPIO 0 50#define PALMZ71_USBDETECT_GPIO 0
50#define PALMZ71_PENIRQ_GPIO 6 51#define PALMZ71_PENIRQ_GPIO 6
diff --git a/arch/arm/mach-omap1/board-perseus2.c b/arch/arm/mach-omap1/board-perseus2.c
index c000bed7627..83f5b765c5b 100644
--- a/arch/arm/mach-omap1/board-perseus2.c
+++ b/arch/arm/mach-omap1/board-perseus2.c
@@ -22,7 +22,6 @@
22#include <linux/input.h> 22#include <linux/input.h>
23#include <linux/smc91x.h> 23#include <linux/smc91x.h>
24 24
25#include <mach/hardware.h>
26#include <asm/mach-types.h> 25#include <asm/mach-types.h>
27#include <asm/mach/arch.h> 26#include <asm/mach/arch.h>
28#include <asm/mach/map.h> 27#include <asm/mach/map.h>
@@ -32,9 +31,13 @@
32#include <plat/fpga.h> 31#include <plat/fpga.h>
33#include <plat/flash.h> 32#include <plat/flash.h>
34#include <plat/keypad.h> 33#include <plat/keypad.h>
35#include "common.h"
36#include <plat/board.h> 34#include <plat/board.h>
37 35
36#include <mach/hardware.h>
37
38#include "iomap.h"
39#include "common.h"
40
38static const unsigned int p2_keymap[] = { 41static const unsigned int p2_keymap[] = {
39 KEY(0, 0, KEY_UP), 42 KEY(0, 0, KEY_UP),
40 KEY(1, 0, KEY_RIGHT), 43 KEY(1, 0, KEY_RIGHT),
diff --git a/arch/arm/mach-omap1/board-sx1.c b/arch/arm/mach-omap1/board-sx1.c
index 7bcd82ab0fd..fed4435f5d4 100644
--- a/arch/arm/mach-omap1/board-sx1.c
+++ b/arch/arm/mach-omap1/board-sx1.c
@@ -28,7 +28,6 @@
28#include <linux/errno.h> 28#include <linux/errno.h>
29#include <linux/export.h> 29#include <linux/export.h>
30 30
31#include <mach/hardware.h>
32#include <asm/mach-types.h> 31#include <asm/mach-types.h>
33#include <asm/mach/arch.h> 32#include <asm/mach/arch.h>
34#include <asm/mach/map.h> 33#include <asm/mach/map.h>
@@ -40,10 +39,13 @@
40#include <plat/usb.h> 39#include <plat/usb.h>
41#include <plat/tc.h> 40#include <plat/tc.h>
42#include <plat/board.h> 41#include <plat/board.h>
43#include "common.h"
44#include <plat/keypad.h> 42#include <plat/keypad.h>
45#include <plat/board-sx1.h> 43#include <plat/board-sx1.h>
46 44
45#include <mach/hardware.h>
46
47#include "common.h"
48
47/* Write to I2C device */ 49/* Write to I2C device */
48int sx1_i2c_write_byte(u8 devaddr, u8 regoffset, u8 value) 50int sx1_i2c_write_byte(u8 devaddr, u8 regoffset, u8 value)
49{ 51{
diff --git a/arch/arm/mach-omap1/board-voiceblue.c b/arch/arm/mach-omap1/board-voiceblue.c
index f83a502dc93..659d0f75de2 100644
--- a/arch/arm/mach-omap1/board-voiceblue.c
+++ b/arch/arm/mach-omap1/board-voiceblue.c
@@ -27,18 +27,20 @@
27#include <linux/smc91x.h> 27#include <linux/smc91x.h>
28#include <linux/export.h> 28#include <linux/export.h>
29 29
30#include <mach/hardware.h>
31#include <asm/mach-types.h> 30#include <asm/mach-types.h>
32#include <asm/mach/arch.h> 31#include <asm/mach/arch.h>
33#include <asm/mach/map.h> 32#include <asm/mach/map.h>
34 33
35#include <plat/board-voiceblue.h> 34#include <plat/board-voiceblue.h>
36#include "common.h"
37#include <plat/flash.h> 35#include <plat/flash.h>
38#include <plat/mux.h> 36#include <plat/mux.h>
39#include <plat/tc.h> 37#include <plat/tc.h>
40#include <plat/usb.h> 38#include <plat/usb.h>
41 39
40#include <mach/hardware.h>
41
42#include "common.h"
43
42static struct plat_serial8250_port voiceblue_ports[] = { 44static struct plat_serial8250_port voiceblue_ports[] = {
43 { 45 {
44 .mapbase = (unsigned long)(OMAP_CS1_PHYS + 0x40000), 46 .mapbase = (unsigned long)(OMAP_CS1_PHYS + 0x40000),
diff --git a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c
index 0c50df05d13..67382ddd8c8 100644
--- a/arch/arm/mach-omap1/clock.c
+++ b/arch/arm/mach-omap1/clock.c
@@ -15,8 +15,8 @@
15#include <linux/list.h> 15#include <linux/list.h>
16#include <linux/errno.h> 16#include <linux/errno.h>
17#include <linux/err.h> 17#include <linux/err.h>
18#include <linux/clk.h>
19#include <linux/io.h> 18#include <linux/io.h>
19#include <linux/clk.h>
20#include <linux/clkdev.h> 20#include <linux/clkdev.h>
21 21
22#include <asm/mach-types.h> 22#include <asm/mach-types.h>
@@ -27,6 +27,9 @@
27#include <plat/sram.h> 27#include <plat/sram.h>
28#include <plat/clkdev_omap.h> 28#include <plat/clkdev_omap.h>
29 29
30#include <mach/hardware.h>
31
32#include "iomap.h"
30#include "clock.h" 33#include "clock.h"
31#include "opp.h" 34#include "opp.h"
32 35
diff --git a/arch/arm/mach-omap1/clock_data.c b/arch/arm/mach-omap1/clock_data.c
index 94699a82a73..c6ce93f71d0 100644
--- a/arch/arm/mach-omap1/clock_data.c
+++ b/arch/arm/mach-omap1/clock_data.c
@@ -15,10 +15,10 @@
15 */ 15 */
16 16
17#include <linux/kernel.h> 17#include <linux/kernel.h>
18#include <linux/io.h>
18#include <linux/clk.h> 19#include <linux/clk.h>
19#include <linux/cpufreq.h> 20#include <linux/cpufreq.h>
20#include <linux/delay.h> 21#include <linux/delay.h>
21#include <linux/io.h>
22 22
23#include <asm/mach-types.h> /* for machine_is_* */ 23#include <asm/mach-types.h> /* for machine_is_* */
24 24
@@ -28,6 +28,9 @@
28#include <plat/sram.h> /* for omap_sram_reprogram_clock() */ 28#include <plat/sram.h> /* for omap_sram_reprogram_clock() */
29#include <plat/usb.h> /* for OTG_BASE */ 29#include <plat/usb.h> /* for OTG_BASE */
30 30
31#include <mach/hardware.h>
32
33#include "iomap.h"
31#include "clock.h" 34#include "clock.h"
32 35
33/* Some ARM_IDLECT1 bit shifts - used in struct arm_idlect1_clk */ 36/* Some ARM_IDLECT1 bit shifts - used in struct arm_idlect1_clk */
diff --git a/arch/arm/mach-omap1/common.h b/arch/arm/mach-omap1/common.h
index a9a5146dd2d..af658ad338e 100644
--- a/arch/arm/mach-omap1/common.h
+++ b/arch/arm/mach-omap1/common.h
@@ -58,5 +58,6 @@ void omap1_restart(char, const char *);
58 58
59extern struct sys_timer omap1_timer; 59extern struct sys_timer omap1_timer;
60extern bool omap_32k_timer_init(void); 60extern bool omap_32k_timer_init(void);
61extern void __init omap_init_consistent_dma_size(void);
61 62
62#endif /* __ARCH_ARM_MACH_OMAP1_COMMON_H */ 63#endif /* __ARCH_ARM_MACH_OMAP1_COMMON_H */
diff --git a/arch/arm/mach-omap1/devices.c b/arch/arm/mach-omap1/devices.c
index 1d76a63c098..d06c7140392 100644
--- a/arch/arm/mach-omap1/devices.c
+++ b/arch/arm/mach-omap1/devices.c
@@ -15,14 +15,10 @@
15#include <linux/kernel.h> 15#include <linux/kernel.h>
16#include <linux/init.h> 16#include <linux/init.h>
17#include <linux/platform_device.h> 17#include <linux/platform_device.h>
18#include <linux/io.h>
19#include <linux/spi/spi.h> 18#include <linux/spi/spi.h>
20 19
21#include <mach/camera.h>
22#include <mach/hardware.h>
23#include <asm/mach/map.h> 20#include <asm/mach/map.h>
24 21
25#include "common.h"
26#include <plat/tc.h> 22#include <plat/tc.h>
27#include <plat/board.h> 23#include <plat/board.h>
28#include <plat/mux.h> 24#include <plat/mux.h>
@@ -30,6 +26,10 @@
30#include <plat/omap7xx.h> 26#include <plat/omap7xx.h>
31#include <plat/mcbsp.h> 27#include <plat/mcbsp.h>
32 28
29#include <mach/camera.h>
30#include <mach/hardware.h>
31
32#include "common.h"
33#include "clock.h" 33#include "clock.h"
34 34
35/*-------------------------------------------------------------------------*/ 35/*-------------------------------------------------------------------------*/
diff --git a/arch/arm/mach-omap1/dma.c b/arch/arm/mach-omap1/dma.c
index f5a52204b89..3ef7d52316b 100644
--- a/arch/arm/mach-omap1/dma.c
+++ b/arch/arm/mach-omap1/dma.c
@@ -19,11 +19,11 @@
19 */ 19 */
20 20
21#include <linux/err.h> 21#include <linux/err.h>
22#include <linux/io.h>
23#include <linux/slab.h> 22#include <linux/slab.h>
24#include <linux/module.h> 23#include <linux/module.h>
25#include <linux/init.h> 24#include <linux/init.h>
26#include <linux/device.h> 25#include <linux/device.h>
26#include <linux/io.h>
27 27
28#include <plat/dma.h> 28#include <plat/dma.h>
29#include <plat/tc.h> 29#include <plat/tc.h>
diff --git a/arch/arm/mach-omap1/flash.c b/arch/arm/mach-omap1/flash.c
index 1749cb37dda..f9bf78d4fdf 100644
--- a/arch/arm/mach-omap1/flash.c
+++ b/arch/arm/mach-omap1/flash.c
@@ -6,13 +6,15 @@
6 * published by the Free Software Foundation. 6 * published by the Free Software Foundation.
7 */ 7 */
8 8
9#include <linux/io.h>
9#include <linux/mtd/mtd.h> 10#include <linux/mtd/mtd.h>
10#include <linux/mtd/map.h> 11#include <linux/mtd/map.h>
11 12
12#include <plat/io.h>
13#include <plat/tc.h> 13#include <plat/tc.h>
14#include <plat/flash.h> 14#include <plat/flash.h>
15 15
16#include <mach/hardware.h>
17
16void omap1_set_vpp(struct platform_device *pdev, int enable) 18void omap1_set_vpp(struct platform_device *pdev, int enable)
17{ 19{
18 static int count; 20 static int count;
diff --git a/arch/arm/mach-omap1/fpga.c b/arch/arm/mach-omap1/fpga.c
index 0a17a1a7e00..76c67b3f9f6 100644
--- a/arch/arm/mach-omap1/fpga.c
+++ b/arch/arm/mach-omap1/fpga.c
@@ -24,12 +24,15 @@
24#include <linux/errno.h> 24#include <linux/errno.h>
25#include <linux/io.h> 25#include <linux/io.h>
26 26
27#include <mach/hardware.h>
28#include <asm/irq.h> 27#include <asm/irq.h>
29#include <asm/mach/irq.h> 28#include <asm/mach/irq.h>
30 29
31#include <plat/fpga.h> 30#include <plat/fpga.h>
32 31
32#include <mach/hardware.h>
33
34#include "iomap.h"
35
33static void fpga_mask_irq(struct irq_data *d) 36static void fpga_mask_irq(struct irq_data *d)
34{ 37{
35 unsigned int irq = d->irq - OMAP_FPGA_IRQ_BASE; 38 unsigned int irq = d->irq - OMAP_FPGA_IRQ_BASE;
diff --git a/arch/arm/mach-omap1/gpio16xx.c b/arch/arm/mach-omap1/gpio16xx.c
index 0f399bd0e70..99cabc498ab 100644
--- a/arch/arm/mach-omap1/gpio16xx.c
+++ b/arch/arm/mach-omap1/gpio16xx.c
@@ -218,6 +218,13 @@ static int __init omap16xx_gpio_init(void)
218 if (!cpu_is_omap16xx()) 218 if (!cpu_is_omap16xx())
219 return -EINVAL; 219 return -EINVAL;
220 220
221 /*
222 * Enable system clock for GPIO module.
223 * The CAM_CLK_CTRL *is* really the right place.
224 */
225 omap_writel(omap_readl(ULPD_CAM_CLK_CTRL) | 0x04,
226 ULPD_CAM_CLK_CTRL);
227
221 for (i = 0; i < ARRAY_SIZE(omap16xx_gpio_dev); i++) 228 for (i = 0; i < ARRAY_SIZE(omap16xx_gpio_dev); i++)
222 platform_device_register(omap16xx_gpio_dev[i]); 229 platform_device_register(omap16xx_gpio_dev[i]);
223 230
diff --git a/arch/arm/mach-omap1/id.c b/arch/arm/mach-omap1/id.c
index a0e3560b39d..f24c1e2c504 100644
--- a/arch/arm/mach-omap1/id.c
+++ b/arch/arm/mach-omap1/id.c
@@ -15,8 +15,11 @@
15#include <linux/kernel.h> 15#include <linux/kernel.h>
16#include <linux/init.h> 16#include <linux/init.h>
17#include <linux/io.h> 17#include <linux/io.h>
18
18#include <plat/cpu.h> 19#include <plat/cpu.h>
19 20
21#include <mach/hardware.h>
22
20#define OMAP_DIE_ID_0 0xfffe1800 23#define OMAP_DIE_ID_0 0xfffe1800
21#define OMAP_DIE_ID_1 0xfffe1804 24#define OMAP_DIE_ID_1 0xfffe1804
22#define OMAP_PRODUCTION_ID_0 0xfffe2000 25#define OMAP_PRODUCTION_ID_0 0xfffe2000
diff --git a/arch/arm/mach-omap1/include/mach/entry-macro.S b/arch/arm/mach-omap1/include/mach/entry-macro.S
index bfb4fb1d738..fa0f32a686a 100644
--- a/arch/arm/mach-omap1/include/mach/entry-macro.S
+++ b/arch/arm/mach-omap1/include/mach/entry-macro.S
@@ -9,20 +9,16 @@
9 * License version 2. This program is licensed "as is" without any 9 * License version 2. This program is licensed "as is" without any
10 * warranty of any kind, whether express or implied. 10 * warranty of any kind, whether express or implied.
11 */ 11 */
12
12#include <mach/hardware.h> 13#include <mach/hardware.h>
13#include <mach/io.h> 14#include <mach/io.h>
14#include <mach/irqs.h> 15#include <mach/irqs.h>
15#include <asm/hardware/gic.h>
16 16
17 .macro disable_fiq 17#include "../../iomap.h"
18 .endm
19 18
20 .macro get_irqnr_preamble, base, tmp 19 .macro get_irqnr_preamble, base, tmp
21 .endm 20 .endm
22 21
23 .macro arch_ret_to_user, tmp1, tmp2
24 .endm
25
26 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp 22 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
27 ldr \base, =OMAP1_IO_ADDRESS(OMAP_IH1_BASE) 23 ldr \base, =OMAP1_IO_ADDRESS(OMAP_IH1_BASE)
28 ldr \irqnr, [\base, #IRQ_ITR_REG_OFFSET] 24 ldr \irqnr, [\base, #IRQ_ITR_REG_OFFSET]
diff --git a/arch/arm/mach-omap1/include/mach/hardware.h b/arch/arm/mach-omap1/include/mach/hardware.h
index a3f6287b200..01e35fa106b 100644
--- a/arch/arm/mach-omap1/include/mach/hardware.h
+++ b/arch/arm/mach-omap1/include/mach/hardware.h
@@ -2,4 +2,40 @@
2 * arch/arm/mach-omap1/include/mach/hardware.h 2 * arch/arm/mach-omap1/include/mach/hardware.h
3 */ 3 */
4 4
5#ifndef __MACH_HARDWARE_H
6#define __MACH_HARDWARE_H
7
8#ifndef __ASSEMBLER__
9/*
10 * NOTE: Please use ioremap + __raw_read/write where possible instead of these
11 */
12extern u8 omap_readb(u32 pa);
13extern u16 omap_readw(u32 pa);
14extern u32 omap_readl(u32 pa);
15extern void omap_writeb(u8 v, u32 pa);
16extern void omap_writew(u16 v, u32 pa);
17extern void omap_writel(u32 v, u32 pa);
18
19#include <plat/tc.h>
20
21/* Almost all documentation for chip and board memory maps assumes
22 * BM is clear. Most devel boards have a switch to control booting
23 * from NOR flash (using external chipselect 3) rather than mask ROM,
24 * which uses BM to interchange the physical CS0 and CS3 addresses.
25 */
26static inline u32 omap_cs0m_phys(void)
27{
28 return (omap_readl(EMIFS_CONFIG) & OMAP_EMIFS_CONFIG_BM)
29 ? OMAP_CS3_PHYS : 0;
30}
31
32static inline u32 omap_cs3_phys(void)
33{
34 return (omap_readl(EMIFS_CONFIG) & OMAP_EMIFS_CONFIG_BM)
35 ? 0 : OMAP_CS3_PHYS;
36}
37
38#endif
39#endif
40
5#include <plat/hardware.h> 41#include <plat/hardware.h>
diff --git a/arch/arm/mach-omap1/include/mach/io.h b/arch/arm/mach-omap1/include/mach/io.h
index 57bdf74a3e6..37b12e1fd02 100644
--- a/arch/arm/mach-omap1/include/mach/io.h
+++ b/arch/arm/mach-omap1/include/mach/io.h
@@ -1,5 +1,46 @@
1/* 1/*
2 * arch/arm/mach-omap1/include/mach/io.h 2 * arch/arm/mach-omap1/include/mach/io.h
3 *
4 * IO definitions for TI OMAP processors and boards
5 *
6 * Copied from arch/arm/mach-sa1100/include/mach/io.h
7 * Copyright (C) 1997-1999 Russell King
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
15 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
16 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
17 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
18 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
19 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
20 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
21 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
22 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
23 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
24 *
25 * You should have received a copy of the GNU General Public License along
26 * with this program; if not, write to the Free Software Foundation, Inc.,
27 * 675 Mass Ave, Cambridge, MA 02139, USA.
28 *
29 * Modifications:
30 * 06-12-1997 RMK Created.
31 * 07-04-1999 RMK Major cleanup
3 */ 32 */
4 33
5#include <plat/io.h> 34#ifndef __ASM_ARM_ARCH_IO_H
35#define __ASM_ARM_ARCH_IO_H
36
37#define IO_SPACE_LIMIT 0xffffffff
38
39/*
40 * We don't actually have real ISA nor PCI buses, but there is so many
41 * drivers out there that might just work if we fake them...
42 */
43#define __io(a) __typesafe_io(a)
44#define __mem_pci(a) (a)
45
46#endif
diff --git a/arch/arm/mach-omap1/include/mach/memory.h b/arch/arm/mach-omap1/include/mach/memory.h
index c6337645ba8..901082def9b 100644
--- a/arch/arm/mach-omap1/include/mach/memory.h
+++ b/arch/arm/mach-omap1/include/mach/memory.h
@@ -18,7 +18,8 @@
18 * Note that the is_lbus_device() test is not very efficient on 1510 18 * Note that the is_lbus_device() test is not very efficient on 1510
19 * because of the strncmp(). 19 * because of the strncmp().
20 */ 20 */
21#ifdef CONFIG_ARCH_OMAP15XX 21#if defined(CONFIG_ARCH_OMAP15XX) && !defined(__ASSEMBLER__)
22#include <plat/cpu.h>
22 23
23/* 24/*
24 * OMAP-1510 Local Bus address offset 25 * OMAP-1510 Local Bus address offset
diff --git a/arch/arm/mach-omap1/include/mach/system.h b/arch/arm/mach-omap1/include/mach/system.h
deleted file mode 100644
index a6c1b3a16df..00000000000
--- a/arch/arm/mach-omap1/include/mach/system.h
+++ /dev/null
@@ -1,5 +0,0 @@
1/*
2 * arch/arm/mach-omap1/include/mach/system.h
3 */
4
5#include <plat/system.h>
diff --git a/arch/arm/mach-omap1/io.c b/arch/arm/mach-omap1/io.c
index 8e55b6fb347..56fb444a5f1 100644
--- a/arch/arm/mach-omap1/io.c
+++ b/arch/arm/mach-omap1/io.c
@@ -15,9 +15,12 @@
15 15
16#include <asm/tlb.h> 16#include <asm/tlb.h>
17#include <asm/mach/map.h> 17#include <asm/mach/map.h>
18
18#include <plat/mux.h> 19#include <plat/mux.h>
19#include <plat/tc.h> 20#include <plat/tc.h>
20 21
22#include "iomap.h"
23#include "common.h"
21#include "clock.h" 24#include "clock.h"
22 25
23extern void omap_check_revision(void); 26extern void omap_check_revision(void);
diff --git a/arch/arm/mach-omap1/iomap.h b/arch/arm/mach-omap1/iomap.h
new file mode 100644
index 00000000000..d68175761c3
--- /dev/null
+++ b/arch/arm/mach-omap1/iomap.h
@@ -0,0 +1,42 @@
1/*
2 * IO mappings for OMAP1
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
8 *
9 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
10 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
12 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
13 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
14 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
15 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
16 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
17 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
18 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
19 *
20 * You should have received a copy of the GNU General Public License along
21 * with this program; if not, write to the Free Software Foundation, Inc.,
22 * 675 Mass Ave, Cambridge, MA 02139, USA.
23 */
24
25#ifdef __ASSEMBLER__
26#define IOMEM(x) (x)
27#else
28#define IOMEM(x) ((void __force __iomem *)(x))
29#endif
30
31#define OMAP1_IO_OFFSET 0x01000000 /* Virtual IO = 0xfefb0000 */
32#define OMAP1_IO_ADDRESS(pa) IOMEM((pa) - OMAP1_IO_OFFSET)
33
34/*
35 * ----------------------------------------------------------------------------
36 * Omap1 specific IO mapping
37 * ----------------------------------------------------------------------------
38 */
39
40#define OMAP1_IO_PHYS 0xFFFB0000
41#define OMAP1_IO_SIZE 0x40000
42#define OMAP1_IO_VIRT (OMAP1_IO_PHYS - OMAP1_IO_OFFSET)
diff --git a/arch/arm/mach-omap1/irq.c b/arch/arm/mach-omap1/irq.c
index e5b104b7fce..4448114fab7 100644
--- a/arch/arm/mach-omap1/irq.c
+++ b/arch/arm/mach-omap1/irq.c
@@ -42,11 +42,13 @@
42#include <linux/interrupt.h> 42#include <linux/interrupt.h>
43#include <linux/io.h> 43#include <linux/io.h>
44 44
45#include <mach/hardware.h>
46#include <asm/irq.h> 45#include <asm/irq.h>
47#include <asm/mach/irq.h> 46#include <asm/mach/irq.h>
47
48#include <plat/cpu.h> 48#include <plat/cpu.h>
49 49
50#include <mach/hardware.h>
51
50#define IRQ_BANK(irq) ((irq) >> 5) 52#define IRQ_BANK(irq) ((irq) >> 5)
51#define IRQ_BIT(irq) ((irq) & 0x1f) 53#define IRQ_BIT(irq) ((irq) & 0x1f)
52 54
diff --git a/arch/arm/mach-omap1/lcd_dma.c b/arch/arm/mach-omap1/lcd_dma.c
index 453809359ba..123a0df63d4 100644
--- a/arch/arm/mach-omap1/lcd_dma.c
+++ b/arch/arm/mach-omap1/lcd_dma.c
@@ -27,9 +27,10 @@
27#include <linux/interrupt.h> 27#include <linux/interrupt.h>
28#include <linux/io.h> 28#include <linux/io.h>
29 29
30#include <plat/dma.h>
31
30#include <mach/hardware.h> 32#include <mach/hardware.h>
31#include <mach/lcdc.h> 33#include <mach/lcdc.h>
32#include <plat/dma.h>
33 34
34int omap_lcd_dma_running(void) 35int omap_lcd_dma_running(void)
35{ 36{
diff --git a/arch/arm/mach-omap1/mcbsp.c b/arch/arm/mach-omap1/mcbsp.c
index 91f9abbd325..3082d60af08 100644
--- a/arch/arm/mach-omap1/mcbsp.c
+++ b/arch/arm/mach-omap1/mcbsp.c
@@ -19,12 +19,15 @@
19#include <linux/platform_device.h> 19#include <linux/platform_device.h>
20#include <linux/slab.h> 20#include <linux/slab.h>
21 21
22#include <mach/irqs.h>
23#include <plat/dma.h> 22#include <plat/dma.h>
24#include <plat/mux.h> 23#include <plat/mux.h>
25#include <plat/cpu.h> 24#include <plat/cpu.h>
26#include <plat/mcbsp.h> 25#include <plat/mcbsp.h>
27 26
27#include <mach/irqs.h>
28
29#include "iomap.h"
30
28#define DPS_RSTCT2_PER_EN (1 << 0) 31#define DPS_RSTCT2_PER_EN (1 << 0)
29#define DSP_RSTCT2_WD_PER_EN (1 << 1) 32#define DSP_RSTCT2_WD_PER_EN (1 << 1)
30 33
diff --git a/arch/arm/mach-omap1/pm.c b/arch/arm/mach-omap1/pm.c
index 89ea20ca0cc..306beaca14c 100644
--- a/arch/arm/mach-omap1/pm.c
+++ b/arch/arm/mach-omap1/pm.c
@@ -42,14 +42,13 @@
42#include <linux/sysfs.h> 42#include <linux/sysfs.h>
43#include <linux/module.h> 43#include <linux/module.h>
44#include <linux/io.h> 44#include <linux/io.h>
45#include <linux/atomic.h>
45 46
46#include <asm/irq.h> 47#include <asm/irq.h>
47#include <linux/atomic.h>
48#include <asm/mach/time.h> 48#include <asm/mach/time.h>
49#include <asm/mach/irq.h> 49#include <asm/mach/irq.h>
50 50
51#include <plat/cpu.h> 51#include <plat/cpu.h>
52#include <mach/irqs.h>
53#include <plat/clock.h> 52#include <plat/clock.h>
54#include <plat/sram.h> 53#include <plat/sram.h>
55#include <plat/tc.h> 54#include <plat/tc.h>
@@ -57,6 +56,9 @@
57#include <plat/dma.h> 56#include <plat/dma.h>
58#include <plat/dmtimer.h> 57#include <plat/dmtimer.h>
59 58
59#include <mach/irqs.h>
60
61#include "iomap.h"
60#include "pm.h" 62#include "pm.h"
61 63
62static unsigned int arm_sleep_save[ARM_SLEEP_SAVE_SIZE]; 64static unsigned int arm_sleep_save[ARM_SLEEP_SAVE_SIZE];
@@ -108,13 +110,7 @@ void omap1_pm_idle(void)
108 __u32 use_idlect1 = arm_idlect1_mask; 110 __u32 use_idlect1 = arm_idlect1_mask;
109 int do_sleep = 0; 111 int do_sleep = 0;
110 112
111 local_irq_disable();
112 local_fiq_disable(); 113 local_fiq_disable();
113 if (need_resched()) {
114 local_fiq_enable();
115 local_irq_enable();
116 return;
117 }
118 114
119#if defined(CONFIG_OMAP_MPU_TIMER) && !defined(CONFIG_OMAP_DM_TIMER) 115#if defined(CONFIG_OMAP_MPU_TIMER) && !defined(CONFIG_OMAP_DM_TIMER)
120#warning Enable 32kHz OS timer in order to allow sleep states in idle 116#warning Enable 32kHz OS timer in order to allow sleep states in idle
@@ -157,14 +153,12 @@ void omap1_pm_idle(void)
157 omap_writel(saved_idlect1, ARM_IDLECT1); 153 omap_writel(saved_idlect1, ARM_IDLECT1);
158 154
159 local_fiq_enable(); 155 local_fiq_enable();
160 local_irq_enable();
161 return; 156 return;
162 } 157 }
163 omap_sram_suspend(omap_readl(ARM_IDLECT1), 158 omap_sram_suspend(omap_readl(ARM_IDLECT1),
164 omap_readl(ARM_IDLECT2)); 159 omap_readl(ARM_IDLECT2));
165 160
166 local_fiq_enable(); 161 local_fiq_enable();
167 local_irq_enable();
168} 162}
169 163
170/* 164/*
@@ -583,8 +577,6 @@ static void omap_pm_init_proc(void)
583 577
584#endif /* DEBUG && CONFIG_PROC_FS */ 578#endif /* DEBUG && CONFIG_PROC_FS */
585 579
586static void (*saved_idle)(void) = NULL;
587
588/* 580/*
589 * omap_pm_prepare - Do preliminary suspend work. 581 * omap_pm_prepare - Do preliminary suspend work.
590 * 582 *
@@ -592,8 +584,7 @@ static void (*saved_idle)(void) = NULL;
592static int omap_pm_prepare(void) 584static int omap_pm_prepare(void)
593{ 585{
594 /* We cannot sleep in idle until we have resumed */ 586 /* We cannot sleep in idle until we have resumed */
595 saved_idle = pm_idle; 587 disable_hlt();
596 pm_idle = NULL;
597 588
598 return 0; 589 return 0;
599} 590}
@@ -630,7 +621,7 @@ static int omap_pm_enter(suspend_state_t state)
630 621
631static void omap_pm_finish(void) 622static void omap_pm_finish(void)
632{ 623{
633 pm_idle = saved_idle; 624 enable_hlt();
634} 625}
635 626
636 627
@@ -687,7 +678,7 @@ static int __init omap_pm_init(void)
687 return -ENODEV; 678 return -ENODEV;
688 } 679 }
689 680
690 pm_idle = omap1_pm_idle; 681 arm_pm_idle = omap1_pm_idle;
691 682
692 if (cpu_is_omap7xx()) 683 if (cpu_is_omap7xx())
693 setup_irq(INT_7XX_WAKE_UP_REQ, &omap_wakeup_irq); 684 setup_irq(INT_7XX_WAKE_UP_REQ, &omap_wakeup_irq);
diff --git a/arch/arm/mach-omap1/reset.c b/arch/arm/mach-omap1/reset.c
index 91d199b6497..f255b153b86 100644
--- a/arch/arm/mach-omap1/reset.c
+++ b/arch/arm/mach-omap1/reset.c
@@ -4,9 +4,10 @@
4#include <linux/kernel.h> 4#include <linux/kernel.h>
5#include <linux/io.h> 5#include <linux/io.h>
6 6
7#include <mach/hardware.h>
8#include <plat/prcm.h> 7#include <plat/prcm.h>
9 8
9#include <mach/hardware.h>
10
10void omap1_restart(char mode, const char *cmd) 11void omap1_restart(char mode, const char *cmd)
11{ 12{
12 /* 13 /*
diff --git a/arch/arm/mach-omap1/sleep.S b/arch/arm/mach-omap1/sleep.S
index c875bdc902c..0779db150da 100644
--- a/arch/arm/mach-omap1/sleep.S
+++ b/arch/arm/mach-omap1/sleep.S
@@ -33,8 +33,12 @@
33 */ 33 */
34 34
35#include <linux/linkage.h> 35#include <linux/linkage.h>
36
36#include <asm/assembler.h> 37#include <asm/assembler.h>
38
37#include <mach/io.h> 39#include <mach/io.h>
40
41#include "iomap.h"
38#include "pm.h" 42#include "pm.h"
39 43
40 .text 44 .text
diff --git a/arch/arm/mach-omap1/sram.S b/arch/arm/mach-omap1/sram.S
index 692587d07ea..2ce0b9ab20e 100644
--- a/arch/arm/mach-omap1/sram.S
+++ b/arch/arm/mach-omap1/sram.S
@@ -9,10 +9,14 @@
9 */ 9 */
10 10
11#include <linux/linkage.h> 11#include <linux/linkage.h>
12
12#include <asm/assembler.h> 13#include <asm/assembler.h>
14
13#include <mach/io.h> 15#include <mach/io.h>
14#include <mach/hardware.h> 16#include <mach/hardware.h>
15 17
18#include "iomap.h"
19
16 .text 20 .text
17 21
18/* 22/*
diff --git a/arch/arm/mach-omap1/time.c b/arch/arm/mach-omap1/time.c
index b8faffa44f9..2fae6a2740f 100644
--- a/arch/arm/mach-omap1/time.c
+++ b/arch/arm/mach-omap1/time.c
@@ -45,14 +45,15 @@
45#include <linux/io.h> 45#include <linux/io.h>
46 46
47#include <asm/system.h> 47#include <asm/system.h>
48#include <mach/hardware.h>
49#include <asm/leds.h> 48#include <asm/leds.h>
50#include <asm/irq.h> 49#include <asm/irq.h>
51#include <asm/sched_clock.h> 50#include <asm/sched_clock.h>
52 51
52#include <mach/hardware.h>
53#include <asm/mach/irq.h> 53#include <asm/mach/irq.h>
54#include <asm/mach/time.h> 54#include <asm/mach/time.h>
55 55
56#include "iomap.h"
56#include "common.h" 57#include "common.h"
57 58
58#ifdef CONFIG_OMAP_MPU_TIMER 59#ifdef CONFIG_OMAP_MPU_TIMER
diff --git a/arch/arm/mach-omap1/timer32k.c b/arch/arm/mach-omap1/timer32k.c
index 9a54ef4dcf5..a2e6d0709df 100644
--- a/arch/arm/mach-omap1/timer32k.c
+++ b/arch/arm/mach-omap1/timer32k.c
@@ -47,14 +47,17 @@
47#include <linux/io.h> 47#include <linux/io.h>
48 48
49#include <asm/system.h> 49#include <asm/system.h>
50#include <mach/hardware.h>
51#include <asm/leds.h> 50#include <asm/leds.h>
52#include <asm/irq.h> 51#include <asm/irq.h>
53#include <asm/mach/irq.h> 52#include <asm/mach/irq.h>
54#include <asm/mach/time.h> 53#include <asm/mach/time.h>
55#include "common.h" 54
56#include <plat/dmtimer.h> 55#include <plat/dmtimer.h>
57 56
57#include <mach/hardware.h>
58
59#include "common.h"
60
58/* 61/*
59 * --------------------------------------------------------------------------- 62 * ---------------------------------------------------------------------------
60 * 32KHz OS timer 63 * 32KHz OS timer
diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c
index 49e64057cb6..41b0a2fe0b0 100644
--- a/arch/arm/mach-omap2/board-cm-t35.c
+++ b/arch/arm/mach-omap2/board-cm-t35.c
@@ -280,7 +280,6 @@ static struct omap_dss_board_info cm_t35_dss_data = {
280 280
281static struct omap2_mcspi_device_config tdo24m_mcspi_config = { 281static struct omap2_mcspi_device_config tdo24m_mcspi_config = {
282 .turbo_mode = 0, 282 .turbo_mode = 0,
283 .single_channel = 1, /* 0: slave, 1: master */
284}; 283};
285 284
286static struct tdo24m_platform_data tdo24m_config = { 285static struct tdo24m_platform_data tdo24m_config = {
diff --git a/arch/arm/mach-omap2/board-n8x0.c b/arch/arm/mach-omap2/board-n8x0.c
index 67226271760..7ed4a7ba8bc 100644
--- a/arch/arm/mach-omap2/board-n8x0.c
+++ b/arch/arm/mach-omap2/board-n8x0.c
@@ -137,7 +137,6 @@ static void __init n8x0_usb_init(void) {}
137 137
138static struct omap2_mcspi_device_config p54spi_mcspi_config = { 138static struct omap2_mcspi_device_config p54spi_mcspi_config = {
139 .turbo_mode = 0, 139 .turbo_mode = 0,
140 .single_channel = 1,
141}; 140};
142 141
143static struct spi_board_info n800_spi_board_info[] __initdata = { 142static struct spi_board_info n800_spi_board_info[] __initdata = {
diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c b/arch/arm/mach-omap2/board-rx51-peripherals.c
index 0e9d89a2048..0f65c3b202a 100644
--- a/arch/arm/mach-omap2/board-rx51-peripherals.c
+++ b/arch/arm/mach-omap2/board-rx51-peripherals.c
@@ -138,17 +138,14 @@ static struct lp5523_platform_data rx51_lp5523_platform_data = {
138 138
139static struct omap2_mcspi_device_config wl1251_mcspi_config = { 139static struct omap2_mcspi_device_config wl1251_mcspi_config = {
140 .turbo_mode = 0, 140 .turbo_mode = 0,
141 .single_channel = 1,
142}; 141};
143 142
144static struct omap2_mcspi_device_config mipid_mcspi_config = { 143static struct omap2_mcspi_device_config mipid_mcspi_config = {
145 .turbo_mode = 0, 144 .turbo_mode = 0,
146 .single_channel = 1,
147}; 145};
148 146
149static struct omap2_mcspi_device_config tsc2005_mcspi_config = { 147static struct omap2_mcspi_device_config tsc2005_mcspi_config = {
150 .turbo_mode = 0, 148 .turbo_mode = 0,
151 .single_channel = 1,
152}; 149};
153 150
154static struct spi_board_info rx51_peripherals_spi_board_info[] __initdata = { 151static struct spi_board_info rx51_peripherals_spi_board_info[] __initdata = {
diff --git a/arch/arm/mach-omap2/board-zoom-display.c b/arch/arm/mach-omap2/board-zoom-display.c
index d4683ba5f72..28182903675 100644
--- a/arch/arm/mach-omap2/board-zoom-display.c
+++ b/arch/arm/mach-omap2/board-zoom-display.c
@@ -117,7 +117,6 @@ static struct omap_dss_board_info zoom_dss_data = {
117 117
118static struct omap2_mcspi_device_config dss_lcd_mcspi_config = { 118static struct omap2_mcspi_device_config dss_lcd_mcspi_config = {
119 .turbo_mode = 1, 119 .turbo_mode = 1,
120 .single_channel = 1, /* 0: slave, 1: master */
121}; 120};
122 121
123static struct spi_board_info nec_8048_spi_board_info[] __initdata = { 122static struct spi_board_info nec_8048_spi_board_info[] __initdata = {
diff --git a/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c b/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c
index 39f9d5a58d0..7072e0d651b 100644
--- a/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c
+++ b/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c
@@ -33,6 +33,7 @@
33#include <linux/cpufreq.h> 33#include <linux/cpufreq.h>
34#include <linux/slab.h> 34#include <linux/slab.h>
35 35
36#include <plat/cpu.h>
36#include <plat/clock.h> 37#include <plat/clock.h>
37#include <plat/sram.h> 38#include <plat/sram.h>
38#include <plat/sdrc.h> 39#include <plat/sdrc.h>
diff --git a/arch/arm/mach-omap2/clkt_dpll.c b/arch/arm/mach-omap2/clkt_dpll.c
index e069a9be93d..cd7fd0f9114 100644
--- a/arch/arm/mach-omap2/clkt_dpll.c
+++ b/arch/arm/mach-omap2/clkt_dpll.c
@@ -22,6 +22,7 @@
22#include <asm/div64.h> 22#include <asm/div64.h>
23 23
24#include <plat/clock.h> 24#include <plat/clock.h>
25#include <plat/cpu.h>
25 26
26#include "clock.h" 27#include "clock.h"
27#include "cm-regbits-24xx.h" 28#include "cm-regbits-24xx.h"
diff --git a/arch/arm/mach-omap2/clock2420_data.c b/arch/arm/mach-omap2/clock2420_data.c
index 61ad3855f10..bace9308a4d 100644
--- a/arch/arm/mach-omap2/clock2420_data.c
+++ b/arch/arm/mach-omap2/clock2420_data.c
@@ -14,11 +14,14 @@
14 */ 14 */
15 15
16#include <linux/kernel.h> 16#include <linux/kernel.h>
17#include <linux/io.h>
17#include <linux/clk.h> 18#include <linux/clk.h>
18#include <linux/list.h> 19#include <linux/list.h>
19 20
21#include <plat/hardware.h>
20#include <plat/clkdev_omap.h> 22#include <plat/clkdev_omap.h>
21 23
24#include "iomap.h"
22#include "clock.h" 25#include "clock.h"
23#include "clock2xxx.h" 26#include "clock2xxx.h"
24#include "opp2xxx.h" 27#include "opp2xxx.h"
diff --git a/arch/arm/mach-omap2/clock2430.c b/arch/arm/mach-omap2/clock2430.c
index d87bc9cb2a3..dfda9a3f2cb 100644
--- a/arch/arm/mach-omap2/clock2430.c
+++ b/arch/arm/mach-omap2/clock2430.c
@@ -21,8 +21,10 @@
21#include <linux/clk.h> 21#include <linux/clk.h>
22#include <linux/io.h> 22#include <linux/io.h>
23 23
24#include <plat/hardware.h>
24#include <plat/clock.h> 25#include <plat/clock.h>
25 26
27#include "iomap.h"
26#include "clock.h" 28#include "clock.h"
27#include "clock2xxx.h" 29#include "clock2xxx.h"
28#include "cm2xxx_3xxx.h" 30#include "cm2xxx_3xxx.h"
diff --git a/arch/arm/mach-omap2/clock2430_data.c b/arch/arm/mach-omap2/clock2430_data.c
index 0cc12879e7b..3b4d09a5039 100644
--- a/arch/arm/mach-omap2/clock2430_data.c
+++ b/arch/arm/mach-omap2/clock2430_data.c
@@ -17,8 +17,10 @@
17#include <linux/clk.h> 17#include <linux/clk.h>
18#include <linux/list.h> 18#include <linux/list.h>
19 19
20#include <plat/hardware.h>
20#include <plat/clkdev_omap.h> 21#include <plat/clkdev_omap.h>
21 22
23#include "iomap.h"
22#include "clock.h" 24#include "clock.h"
23#include "clock2xxx.h" 25#include "clock2xxx.h"
24#include "opp2xxx.h" 26#include "opp2xxx.h"
diff --git a/arch/arm/mach-omap2/clock2xxx.c b/arch/arm/mach-omap2/clock2xxx.c
index 80bb0f0e92e..12500097378 100644
--- a/arch/arm/mach-omap2/clock2xxx.c
+++ b/arch/arm/mach-omap2/clock2xxx.c
@@ -22,6 +22,7 @@
22#include <linux/clk.h> 22#include <linux/clk.h>
23#include <linux/io.h> 23#include <linux/io.h>
24 24
25#include <plat/cpu.h>
25#include <plat/clock.h> 26#include <plat/clock.h>
26 27
27#include "clock.h" 28#include "clock.h"
diff --git a/arch/arm/mach-omap2/clock3xxx.c b/arch/arm/mach-omap2/clock3xxx.c
index 952c3e01c9e..794d82702c8 100644
--- a/arch/arm/mach-omap2/clock3xxx.c
+++ b/arch/arm/mach-omap2/clock3xxx.c
@@ -21,6 +21,7 @@
21#include <linux/clk.h> 21#include <linux/clk.h>
22#include <linux/io.h> 22#include <linux/io.h>
23 23
24#include <plat/hardware.h>
24#include <plat/clock.h> 25#include <plat/clock.h>
25 26
26#include "clock.h" 27#include "clock.h"
diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach-omap2/clock3xxx_data.c
index d75e5f6b8a0..981b9f9111a 100644
--- a/arch/arm/mach-omap2/clock3xxx_data.c
+++ b/arch/arm/mach-omap2/clock3xxx_data.c
@@ -20,14 +20,15 @@
20#include <linux/clk.h> 20#include <linux/clk.h>
21#include <linux/list.h> 21#include <linux/list.h>
22 22
23#include <plat/hardware.h>
23#include <plat/clkdev_omap.h> 24#include <plat/clkdev_omap.h>
24 25
26#include "iomap.h"
25#include "clock.h" 27#include "clock.h"
26#include "clock3xxx.h" 28#include "clock3xxx.h"
27#include "clock34xx.h" 29#include "clock34xx.h"
28#include "clock36xx.h" 30#include "clock36xx.h"
29#include "clock3517.h" 31#include "clock3517.h"
30
31#include "cm2xxx_3xxx.h" 32#include "cm2xxx_3xxx.h"
32#include "cm-regbits-34xx.h" 33#include "cm-regbits-34xx.h"
33#include "prm2xxx_3xxx.h" 34#include "prm2xxx_3xxx.h"
diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c
index 08e86d793a1..79b98f22f20 100644
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -26,8 +26,11 @@
26#include <linux/kernel.h> 26#include <linux/kernel.h>
27#include <linux/list.h> 27#include <linux/list.h>
28#include <linux/clk.h> 28#include <linux/clk.h>
29
30#include <plat/hardware.h>
29#include <plat/clkdev_omap.h> 31#include <plat/clkdev_omap.h>
30 32
33#include "iomap.h"
31#include "clock.h" 34#include "clock.h"
32#include "clock44xx.h" 35#include "clock44xx.h"
33#include "cm1_44xx.h" 36#include "cm1_44xx.h"
diff --git a/arch/arm/mach-omap2/cm2xxx_3xxx.c b/arch/arm/mach-omap2/cm2xxx_3xxx.c
index 04d39cdd211..c79ed63601c 100644
--- a/arch/arm/mach-omap2/cm2xxx_3xxx.c
+++ b/arch/arm/mach-omap2/cm2xxx_3xxx.c
@@ -18,8 +18,8 @@
18#include <linux/err.h> 18#include <linux/err.h>
19#include <linux/io.h> 19#include <linux/io.h>
20 20
21#include "iomap.h"
21#include "common.h" 22#include "common.h"
22
23#include "cm.h" 23#include "cm.h"
24#include "cm2xxx_3xxx.h" 24#include "cm2xxx_3xxx.h"
25#include "cm-regbits-24xx.h" 25#include "cm-regbits-24xx.h"
diff --git a/arch/arm/mach-omap2/cm44xx.c b/arch/arm/mach-omap2/cm44xx.c
index 6a836303252..535d66e2822 100644
--- a/arch/arm/mach-omap2/cm44xx.c
+++ b/arch/arm/mach-omap2/cm44xx.c
@@ -18,8 +18,8 @@
18#include <linux/err.h> 18#include <linux/err.h>
19#include <linux/io.h> 19#include <linux/io.h>
20 20
21#include "iomap.h"
21#include "common.h" 22#include "common.h"
22
23#include "cm.h" 23#include "cm.h"
24#include "cm1_44xx.h" 24#include "cm1_44xx.h"
25#include "cm2_44xx.h" 25#include "cm2_44xx.h"
diff --git a/arch/arm/mach-omap2/cminst44xx.c b/arch/arm/mach-omap2/cminst44xx.c
index 6204deaf85b..bd8810c3753 100644
--- a/arch/arm/mach-omap2/cminst44xx.c
+++ b/arch/arm/mach-omap2/cminst44xx.c
@@ -20,8 +20,8 @@
20#include <linux/err.h> 20#include <linux/err.h>
21#include <linux/io.h> 21#include <linux/io.h>
22 22
23#include "iomap.h"
23#include "common.h" 24#include "common.h"
24
25#include "cm.h" 25#include "cm.h"
26#include "cm1_44xx.h" 26#include "cm1_44xx.h"
27#include "cm2_44xx.h" 27#include "cm2_44xx.h"
diff --git a/arch/arm/mach-omap2/common-board-devices.c b/arch/arm/mach-omap2/common-board-devices.c
index bcb0c581716..2d1d775f2c3 100644
--- a/arch/arm/mach-omap2/common-board-devices.c
+++ b/arch/arm/mach-omap2/common-board-devices.c
@@ -33,7 +33,6 @@
33 defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE) 33 defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
34static struct omap2_mcspi_device_config ads7846_mcspi_config = { 34static struct omap2_mcspi_device_config ads7846_mcspi_config = {
35 .turbo_mode = 0, 35 .turbo_mode = 0,
36 .single_channel = 1, /* 0: slave, 1: master */
37}; 36};
38 37
39static struct ads7846_platform_data ads7846_config = { 38static struct ads7846_platform_data ads7846_config = {
diff --git a/arch/arm/mach-omap2/common.c b/arch/arm/mach-omap2/common.c
index aaf421178c9..93419de4534 100644
--- a/arch/arm/mach-omap2/common.c
+++ b/arch/arm/mach-omap2/common.c
@@ -17,12 +17,12 @@
17#include <linux/clk.h> 17#include <linux/clk.h>
18#include <linux/io.h> 18#include <linux/io.h>
19 19
20#include "common.h"
21#include <plat/board.h> 20#include <plat/board.h>
22#include <plat/mux.h> 21#include <plat/mux.h>
23
24#include <plat/clock.h> 22#include <plat/clock.h>
25 23
24#include "iomap.h"
25#include "common.h"
26#include "sdrc.h" 26#include "sdrc.h"
27#include "control.h" 27#include "control.h"
28 28
diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h
index febffde2ff1..f78ec4e6a5c 100644
--- a/arch/arm/mach-omap2/common.h
+++ b/arch/arm/mach-omap2/common.h
@@ -133,6 +133,8 @@ void am33xx_map_io(void);
133void omap4_map_io(void); 133void omap4_map_io(void);
134void ti81xx_map_io(void); 134void ti81xx_map_io(void);
135 135
136extern void __init omap_init_consistent_dma_size(void);
137
136/** 138/**
137 * omap_test_timeout - busy-loop, testing a condition 139 * omap_test_timeout - busy-loop, testing a condition
138 * @cond: condition to test until it evaluates to true 140 * @cond: condition to test until it evaluates to true
@@ -235,5 +237,10 @@ static inline u32 omap4_mpuss_read_prev_context_state(void)
235 return 0; 237 return 0;
236} 238}
237#endif 239#endif
240
241struct omap_sdrc_params;
242extern void omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0,
243 struct omap_sdrc_params *sdrc_cs1);
244
238#endif /* __ASSEMBLER__ */ 245#endif /* __ASSEMBLER__ */
239#endif /* __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H */ 246#endif /* __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H */
diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c
index 114c037e433..2fd5fd1abb4 100644
--- a/arch/arm/mach-omap2/control.c
+++ b/arch/arm/mach-omap2/control.c
@@ -15,9 +15,10 @@
15#include <linux/kernel.h> 15#include <linux/kernel.h>
16#include <linux/io.h> 16#include <linux/io.h>
17 17
18#include "common.h"
19#include <plat/sdrc.h> 18#include <plat/sdrc.h>
20 19
20#include "iomap.h"
21#include "common.h"
21#include "cm-regbits-34xx.h" 22#include "cm-regbits-34xx.h"
22#include "prm-regbits-34xx.h" 23#include "prm-regbits-34xx.h"
23#include "prm2xxx_3xxx.h" 24#include "prm2xxx_3xxx.h"
diff --git a/arch/arm/mach-omap2/control.h b/arch/arm/mach-omap2/control.h
index 0ba68d3764b..03149de0854 100644
--- a/arch/arm/mach-omap2/control.h
+++ b/arch/arm/mach-omap2/control.h
@@ -16,7 +16,6 @@
16#ifndef __ARCH_ARM_MACH_OMAP2_CONTROL_H 16#ifndef __ARCH_ARM_MACH_OMAP2_CONTROL_H
17#define __ARCH_ARM_MACH_OMAP2_CONTROL_H 17#define __ARCH_ARM_MACH_OMAP2_CONTROL_H
18 18
19#include <mach/io.h>
20#include <mach/ctrl_module_core_44xx.h> 19#include <mach/ctrl_module_core_44xx.h>
21#include <mach/ctrl_module_wkup_44xx.h> 20#include <mach/ctrl_module_wkup_44xx.h>
22#include <mach/ctrl_module_pad_core_44xx.h> 21#include <mach/ctrl_module_pad_core_44xx.h>
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index 01cffcea936..71e7df8c413 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -24,7 +24,7 @@
24#include <asm/mach/map.h> 24#include <asm/mach/map.h>
25#include <asm/pmu.h> 25#include <asm/pmu.h>
26 26
27#include <plat/tc.h> 27#include "iomap.h"
28#include <plat/board.h> 28#include <plat/board.h>
29#include <plat/mcbsp.h> 29#include <plat/mcbsp.h>
30#include <plat/mmc.h> 30#include <plat/mmc.h>
diff --git a/arch/arm/mach-omap2/display.c b/arch/arm/mach-omap2/display.c
index 62e133ca431..9706c648bc1 100644
--- a/arch/arm/mach-omap2/display.c
+++ b/arch/arm/mach-omap2/display.c
@@ -30,6 +30,7 @@
30#include <plat/omap-pm.h> 30#include <plat/omap-pm.h>
31#include "common.h" 31#include "common.h"
32 32
33#include "iomap.h"
33#include "mux.h" 34#include "mux.h"
34#include "control.h" 35#include "control.h"
35#include "display.h" 36#include "display.h"
diff --git a/arch/arm/mach-omap2/emu.c b/arch/arm/mach-omap2/emu.c
index 9c442e290cc..e28e761b7ab 100644
--- a/arch/arm/mach-omap2/emu.c
+++ b/arch/arm/mach-omap2/emu.c
@@ -21,6 +21,10 @@
21#include <linux/clk.h> 21#include <linux/clk.h>
22#include <linux/err.h> 22#include <linux/err.h>
23 23
24#include <mach/hardware.h>
25
26#include "iomap.h"
27
24MODULE_LICENSE("GPL"); 28MODULE_LICENSE("GPL");
25MODULE_AUTHOR("Alexander Shishkin"); 29MODULE_AUTHOR("Alexander Shishkin");
26 30
@@ -30,29 +34,8 @@ MODULE_AUTHOR("Alexander Shishkin");
30#define ETB_BASE (L4_EMU_34XX_PHYS + 0x1b000) 34#define ETB_BASE (L4_EMU_34XX_PHYS + 0x1b000)
31#define DAPCTL (L4_EMU_34XX_PHYS + 0x1d000) 35#define DAPCTL (L4_EMU_34XX_PHYS + 0x1d000)
32 36
33static struct amba_device omap3_etb_device = { 37static AMBA_APB_DEVICE(omap3_etb, "etb", 0x000bb907, ETB_BASE, { }, NULL);
34 .dev = { 38static AMBA_APB_DEVICE(omap3_etm, "etm", 0x102bb921, ETM_BASE, { }, NULL);
35 .init_name = "etb",
36 },
37 .res = {
38 .start = ETB_BASE,
39 .end = ETB_BASE + SZ_4K - 1,
40 .flags = IORESOURCE_MEM,
41 },
42 .periphid = 0x000bb907,
43};
44
45static struct amba_device omap3_etm_device = {
46 .dev = {
47 .init_name = "etm",
48 },
49 .res = {
50 .start = ETM_BASE,
51 .end = ETM_BASE + SZ_4K - 1,
52 .flags = IORESOURCE_MEM,
53 },
54 .periphid = 0x102bb921,
55};
56 39
57static int __init emu_init(void) 40static int __init emu_init(void)
58{ 41{
@@ -66,4 +49,3 @@ static int __init emu_init(void)
66} 49}
67 50
68subsys_initcall(emu_init); 51subsys_initcall(emu_init);
69
diff --git a/arch/arm/mach-omap2/gpmc-nand.c b/arch/arm/mach-omap2/gpmc-nand.c
index 8ad210bda9a..386dec8d235 100644
--- a/arch/arm/mach-omap2/gpmc-nand.c
+++ b/arch/arm/mach-omap2/gpmc-nand.c
@@ -16,6 +16,7 @@
16 16
17#include <asm/mach/flash.h> 17#include <asm/mach/flash.h>
18 18
19#include <plat/cpu.h>
19#include <plat/nand.h> 20#include <plat/nand.h>
20#include <plat/board.h> 21#include <plat/board.h>
21#include <plat/gpmc.h> 22#include <plat/gpmc.h>
diff --git a/arch/arm/mach-omap2/gpmc-onenand.c b/arch/arm/mach-omap2/gpmc-onenand.c
index 5cdce10d618..385b3e02c4a 100644
--- a/arch/arm/mach-omap2/gpmc-onenand.c
+++ b/arch/arm/mach-omap2/gpmc-onenand.c
@@ -18,6 +18,7 @@
18 18
19#include <asm/mach/flash.h> 19#include <asm/mach/flash.h>
20 20
21#include <plat/cpu.h>
21#include <plat/onenand.h> 22#include <plat/onenand.h>
22#include <plat/board.h> 23#include <plat/board.h>
23#include <plat/gpmc.h> 24#include <plat/gpmc.h>
diff --git a/arch/arm/mach-omap2/include/mach/entry-macro.S b/arch/arm/mach-omap2/include/mach/entry-macro.S
deleted file mode 100644
index 56964a0c4c7..00000000000
--- a/arch/arm/mach-omap2/include/mach/entry-macro.S
+++ /dev/null
@@ -1,18 +0,0 @@
1/*
2 * arch/arm/plat-omap/include/mach/entry-macro.S
3 *
4 * Low-level IRQ helper macros for OMAP-based platforms
5 *
6 * Copyright (C) 2009 Texas Instruments
7 * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14 .macro disable_fiq
15 .endm
16
17 .macro arch_ret_to_user, tmp1, tmp2
18 .endm
diff --git a/arch/arm/mach-omap2/include/mach/io.h b/arch/arm/mach-omap2/include/mach/io.h
index fd78f31aa1a..b8758c8a939 100644
--- a/arch/arm/mach-omap2/include/mach/io.h
+++ b/arch/arm/mach-omap2/include/mach/io.h
@@ -1,5 +1,49 @@
1/* 1/*
2 * arch/arm/mach-omap2/include/mach/io.h 2 * arch/arm/mach-omap2/include/mach/io.h
3 *
4 * IO definitions for TI OMAP processors and boards
5 *
6 * Copied from arch/arm/mach-sa1100/include/mach/io.h
7 * Copyright (C) 1997-1999 Russell King
8 *
9 * Copyright (C) 2009 Texas Instruments
10 * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
11 *
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the
14 * Free Software Foundation; either version 2 of the License, or (at your
15 * option) any later version.
16 *
17 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
18 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
20 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
23 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
24 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * You should have received a copy of the GNU General Public License along
29 * with this program; if not, write to the Free Software Foundation, Inc.,
30 * 675 Mass Ave, Cambridge, MA 02139, USA.
31 *
32 * Modifications:
33 * 06-12-1997 RMK Created.
34 * 07-04-1999 RMK Major cleanup
3 */ 35 */
4 36
5#include <plat/io.h> 37#ifndef __ASM_ARM_ARCH_IO_H
38#define __ASM_ARM_ARCH_IO_H
39
40#define IO_SPACE_LIMIT 0xffffffff
41
42/*
43 * We don't actually have real ISA nor PCI buses, but there is so many
44 * drivers out there that might just work if we fake them...
45 */
46#define __io(a) __typesafe_io(a)
47#define __mem_pci(a) (a)
48
49#endif
diff --git a/arch/arm/mach-omap2/include/mach/system.h b/arch/arm/mach-omap2/include/mach/system.h
deleted file mode 100644
index d488721ab90..00000000000
--- a/arch/arm/mach-omap2/include/mach/system.h
+++ /dev/null
@@ -1,5 +0,0 @@
1/*
2 * arch/arm/mach-omap2/include/mach/system.h
3 */
4
5#include <plat/system.h>
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index eb50c29fb64..3203128eef7 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -24,26 +24,23 @@
24#include <linux/omapfb.h> 24#include <linux/omapfb.h>
25 25
26#include <asm/tlb.h> 26#include <asm/tlb.h>
27
28#include <asm/mach/map.h> 27#include <asm/mach/map.h>
29 28
30#include <plat/sram.h> 29#include <plat/sram.h>
31#include <plat/sdrc.h> 30#include <plat/sdrc.h>
32#include <plat/serial.h> 31#include <plat/serial.h>
33
34#include "clock2xxx.h"
35#include "clock3xxx.h"
36#include "clock44xx.h"
37
38#include "common.h"
39#include <plat/omap-pm.h> 32#include <plat/omap-pm.h>
33#include <plat/omap_hwmod.h>
34#include <plat/multi.h>
35
36#include "iomap.h"
40#include "voltage.h" 37#include "voltage.h"
41#include "powerdomain.h" 38#include "powerdomain.h"
42
43#include "clockdomain.h" 39#include "clockdomain.h"
44#include <plat/omap_hwmod.h>
45#include <plat/multi.h>
46#include "common.h" 40#include "common.h"
41#include "clock2xxx.h"
42#include "clock3xxx.h"
43#include "clock44xx.h"
47 44
48/* 45/*
49 * The machine specific code may provide the extra mapping besides the 46 * The machine specific code may provide the extra mapping besides the
@@ -490,43 +487,3 @@ void __init omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0,
490 _omap2_init_reprogram_sdrc(); 487 _omap2_init_reprogram_sdrc();
491 } 488 }
492} 489}
493
494/*
495 * NOTE: Please use ioremap + __raw_read/write where possible instead of these
496 */
497
498u8 omap_readb(u32 pa)
499{
500 return __raw_readb(OMAP2_L4_IO_ADDRESS(pa));
501}
502EXPORT_SYMBOL(omap_readb);
503
504u16 omap_readw(u32 pa)
505{
506 return __raw_readw(OMAP2_L4_IO_ADDRESS(pa));
507}
508EXPORT_SYMBOL(omap_readw);
509
510u32 omap_readl(u32 pa)
511{
512 return __raw_readl(OMAP2_L4_IO_ADDRESS(pa));
513}
514EXPORT_SYMBOL(omap_readl);
515
516void omap_writeb(u8 v, u32 pa)
517{
518 __raw_writeb(v, OMAP2_L4_IO_ADDRESS(pa));
519}
520EXPORT_SYMBOL(omap_writeb);
521
522void omap_writew(u16 v, u32 pa)
523{
524 __raw_writew(v, OMAP2_L4_IO_ADDRESS(pa));
525}
526EXPORT_SYMBOL(omap_writew);
527
528void omap_writel(u32 v, u32 pa)
529{
530 __raw_writel(v, OMAP2_L4_IO_ADDRESS(pa));
531}
532EXPORT_SYMBOL(omap_writel);
diff --git a/arch/arm/plat-omap/include/plat/io.h b/arch/arm/mach-omap2/iomap.h
index 0696bae1818..e6f95816529 100644
--- a/arch/arm/plat-omap/include/plat/io.h
+++ b/arch/arm/mach-omap2/iomap.h
@@ -1,13 +1,5 @@
1/* 1/*
2 * arch/arm/plat-omap/include/mach/io.h 2 * IO mappings for OMAP2+
3 *
4 * IO definitions for TI OMAP processors and boards
5 *
6 * Copied from arch/arm/mach-sa1100/include/mach/io.h
7 * Copyright (C) 1997-1999 Russell King
8 *
9 * Copyright (C) 2009 Texas Instruments
10 * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
11 * 3 *
12 * This program is free software; you can redistribute it and/or modify it 4 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the 5 * under the terms of the GNU General Public License as published by the
@@ -25,33 +17,9 @@
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 17 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 18 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 * 19 *
28 * You should have received a copy of the GNU General Public License along 20 * You should have received a copy of the GNU General Public License along
29 * with this program; if not, write to the Free Software Foundation, Inc., 21 * with this program; if not, write to the Free Software Foundation, Inc.,
30 * 675 Mass Ave, Cambridge, MA 02139, USA. 22 * 675 Mass Ave, Cambridge, MA 02139, USA.
31 *
32 * Modifications:
33 * 06-12-1997 RMK Created.
34 * 07-04-1999 RMK Major cleanup
35 */
36
37#ifndef __ASM_ARM_ARCH_IO_H
38#define __ASM_ARM_ARCH_IO_H
39
40#include <mach/hardware.h>
41
42#define IO_SPACE_LIMIT 0xffffffff
43
44/*
45 * We don't actually have real ISA nor PCI buses, but there is so many
46 * drivers out there that might just work if we fake them...
47 */
48#define __io(a) __typesafe_io(a)
49#define __mem_pci(a) (a)
50
51/*
52 * ----------------------------------------------------------------------------
53 * I/O mapping
54 * ----------------------------------------------------------------------------
55 */ 23 */
56 24
57#ifdef __ASSEMBLER__ 25#ifdef __ASSEMBLER__
@@ -60,13 +28,9 @@
60#define IOMEM(x) ((void __force __iomem *)(x)) 28#define IOMEM(x) ((void __force __iomem *)(x))
61#endif 29#endif
62 30
63#define OMAP1_IO_OFFSET 0x01000000 /* Virtual IO = 0xfefb0000 */
64#define OMAP1_IO_ADDRESS(pa) IOMEM((pa) - OMAP1_IO_OFFSET)
65
66#define OMAP2_L3_IO_OFFSET 0x90000000 31#define OMAP2_L3_IO_OFFSET 0x90000000
67#define OMAP2_L3_IO_ADDRESS(pa) IOMEM((pa) + OMAP2_L3_IO_OFFSET) /* L3 */ 32#define OMAP2_L3_IO_ADDRESS(pa) IOMEM((pa) + OMAP2_L3_IO_OFFSET) /* L3 */
68 33
69
70#define OMAP2_L4_IO_OFFSET 0xb2000000 34#define OMAP2_L4_IO_OFFSET 0xb2000000
71#define OMAP2_L4_IO_ADDRESS(pa) IOMEM((pa) + OMAP2_L4_IO_OFFSET) /* L4 */ 35#define OMAP2_L4_IO_ADDRESS(pa) IOMEM((pa) + OMAP2_L4_IO_OFFSET) /* L4 */
72 36
@@ -87,16 +51,6 @@
87 51
88/* 52/*
89 * ---------------------------------------------------------------------------- 53 * ----------------------------------------------------------------------------
90 * Omap1 specific IO mapping
91 * ----------------------------------------------------------------------------
92 */
93
94#define OMAP1_IO_PHYS 0xFFFB0000
95#define OMAP1_IO_SIZE 0x40000
96#define OMAP1_IO_VIRT (OMAP1_IO_PHYS - OMAP1_IO_OFFSET)
97
98/*
99 * ----------------------------------------------------------------------------
100 * Omap2 specific IO mapping 54 * Omap2 specific IO mapping
101 * ---------------------------------------------------------------------------- 55 * ----------------------------------------------------------------------------
102 */ 56 */
@@ -247,31 +201,3 @@
247 /* 0x4e000000 --> 0xfd300000 */ 201 /* 0x4e000000 --> 0xfd300000 */
248#define OMAP44XX_DMM_SIZE SZ_1M 202#define OMAP44XX_DMM_SIZE SZ_1M
249#define OMAP44XX_DMM_VIRT (OMAP44XX_EMIF2_VIRT + OMAP44XX_EMIF2_SIZE) 203#define OMAP44XX_DMM_VIRT (OMAP44XX_EMIF2_VIRT + OMAP44XX_EMIF2_SIZE)
250/*
251 * ----------------------------------------------------------------------------
252 * Omap specific register access
253 * ----------------------------------------------------------------------------
254 */
255
256#ifndef __ASSEMBLER__
257
258/*
259 * NOTE: Please use ioremap + __raw_read/write where possible instead of these
260 */
261
262extern u8 omap_readb(u32 pa);
263extern u16 omap_readw(u32 pa);
264extern u32 omap_readl(u32 pa);
265extern void omap_writeb(u8 v, u32 pa);
266extern void omap_writew(u16 v, u32 pa);
267extern void omap_writel(u32 v, u32 pa);
268
269struct omap_sdrc_params;
270extern void omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0,
271 struct omap_sdrc_params *sdrc_cs1);
272
273extern void __init omap_init_consistent_dma_size(void);
274
275#endif
276
277#endif
diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c
index 1fef061f792..6da2d0edee1 100644
--- a/arch/arm/mach-omap2/irq.c
+++ b/arch/arm/mach-omap2/irq.c
@@ -14,10 +14,13 @@
14#include <linux/init.h> 14#include <linux/init.h>
15#include <linux/interrupt.h> 15#include <linux/interrupt.h>
16#include <linux/io.h> 16#include <linux/io.h>
17#include <mach/hardware.h> 17
18#include <asm/exception.h> 18#include <asm/exception.h>
19#include <asm/mach/irq.h> 19#include <asm/mach/irq.h>
20 20
21#include <mach/hardware.h>
22
23#include "iomap.h"
21 24
22/* selected INTC register offsets */ 25/* selected INTC register offsets */
23 26
diff --git a/arch/arm/mach-omap2/omap-mpuss-lowpower.c b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
index 1d5d0105655..bbabe1d8324 100644
--- a/arch/arm/mach-omap2/omap-mpuss-lowpower.c
+++ b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
@@ -263,12 +263,10 @@ int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state)
263 * In MPUSS OSWR or device OFF, interrupt controller contest is lost. 263 * In MPUSS OSWR or device OFF, interrupt controller contest is lost.
264 */ 264 */
265 mpuss_clear_prev_logic_pwrst(); 265 mpuss_clear_prev_logic_pwrst();
266 pwrdm_clear_all_prev_pwrst(mpuss_pd);
267 if ((pwrdm_read_next_pwrst(mpuss_pd) == PWRDM_POWER_RET) && 266 if ((pwrdm_read_next_pwrst(mpuss_pd) == PWRDM_POWER_RET) &&
268 (pwrdm_read_logic_retst(mpuss_pd) == PWRDM_POWER_OFF)) 267 (pwrdm_read_logic_retst(mpuss_pd) == PWRDM_POWER_OFF))
269 save_state = 2; 268 save_state = 2;
270 269
271 clear_cpu_prev_pwrst(cpu);
272 cpu_clear_prev_logic_pwrst(cpu); 270 cpu_clear_prev_logic_pwrst(cpu);
273 set_cpu_next_pwrst(cpu, power_state); 271 set_cpu_next_pwrst(cpu, power_state);
274 set_cpu_wakeup_addr(cpu, virt_to_phys(omap4_cpu_resume)); 272 set_cpu_wakeup_addr(cpu, virt_to_phys(omap4_cpu_resume));
diff --git a/arch/arm/mach-omap2/omap-smp.c b/arch/arm/mach-omap2/omap-smp.c
index c1bf3ef0ba0..deffbf1c962 100644
--- a/arch/arm/mach-omap2/omap-smp.c
+++ b/arch/arm/mach-omap2/omap-smp.c
@@ -23,11 +23,12 @@
23#include <asm/cacheflush.h> 23#include <asm/cacheflush.h>
24#include <asm/hardware/gic.h> 24#include <asm/hardware/gic.h>
25#include <asm/smp_scu.h> 25#include <asm/smp_scu.h>
26
26#include <mach/hardware.h> 27#include <mach/hardware.h>
27#include <mach/omap-secure.h> 28#include <mach/omap-secure.h>
28 29
30#include "iomap.h"
29#include "common.h" 31#include "common.h"
30
31#include "clockdomain.h" 32#include "clockdomain.h"
32 33
33/* SCU base address */ 34/* SCU base address */
diff --git a/arch/arm/mach-omap2/opp2420_data.c b/arch/arm/mach-omap2/opp2420_data.c
index e6dda694fd5..5037e76e4e2 100644
--- a/arch/arm/mach-omap2/opp2420_data.c
+++ b/arch/arm/mach-omap2/opp2420_data.c
@@ -28,6 +28,8 @@
28 * http://repository.maemo.org/pool/diablo/free/k/kernel-source-diablo/ 28 * http://repository.maemo.org/pool/diablo/free/k/kernel-source-diablo/
29 */ 29 */
30 30
31#include <plat/hardware.h>
32
31#include "opp2xxx.h" 33#include "opp2xxx.h"
32#include "sdrc.h" 34#include "sdrc.h"
33#include "clock.h" 35#include "clock.h"
diff --git a/arch/arm/mach-omap2/opp2430_data.c b/arch/arm/mach-omap2/opp2430_data.c
index 1b9596ae201..750805c528d 100644
--- a/arch/arm/mach-omap2/opp2430_data.c
+++ b/arch/arm/mach-omap2/opp2430_data.c
@@ -26,6 +26,8 @@
26 * This is technically part of the OMAP2xxx clock code. 26 * This is technically part of the OMAP2xxx clock code.
27 */ 27 */
28 28
29#include <plat/hardware.h>
30
29#include "opp2xxx.h" 31#include "opp2xxx.h"
30#include "sdrc.h" 32#include "sdrc.h"
31#include "clock.h" 33#include "clock.h"
diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm-debug.c
index 4411163e012..814bcd90159 100644
--- a/arch/arm/mach-omap2/pm-debug.c
+++ b/arch/arm/mach-omap2/pm-debug.c
@@ -220,8 +220,8 @@ static int __init pwrdms_setup(struct powerdomain *pwrdm, void *dir)
220 return 0; 220 return 0;
221 221
222 d = debugfs_create_dir(pwrdm->name, (struct dentry *)dir); 222 d = debugfs_create_dir(pwrdm->name, (struct dentry *)dir);
223 223 if (!(IS_ERR_OR_NULL(d)))
224 (void) debugfs_create_file("suspend", S_IRUGO|S_IWUSR, d, 224 (void) debugfs_create_file("suspend", S_IRUGO|S_IWUSR, d,
225 (void *)pwrdm, &pwrdm_suspend_fops); 225 (void *)pwrdm, &pwrdm_suspend_fops);
226 226
227 return 0; 227 return 0;
@@ -264,7 +264,7 @@ static int __init pm_dbg_init(void)
264 return 0; 264 return 0;
265 265
266 d = debugfs_create_dir("pm_debug", NULL); 266 d = debugfs_create_dir("pm_debug", NULL);
267 if (IS_ERR(d)) 267 if (IS_ERR_OR_NULL(d))
268 return PTR_ERR(d); 268 return PTR_ERR(d);
269 269
270 (void) debugfs_create_file("count", S_IRUGO, 270 (void) debugfs_create_file("count", S_IRUGO,
diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c
index fb9b85bfc30..28706696a34 100644
--- a/arch/arm/mach-omap2/pm.c
+++ b/arch/arm/mach-omap2/pm.c
@@ -15,11 +15,13 @@
15#include <linux/err.h> 15#include <linux/err.h>
16#include <linux/opp.h> 16#include <linux/opp.h>
17#include <linux/export.h> 17#include <linux/export.h>
18#include <linux/suspend.h>
18 19
19#include <plat/omap-pm.h> 20#include <plat/omap-pm.h>
20#include <plat/omap_device.h> 21#include <plat/omap_device.h>
21#include "common.h" 22#include "common.h"
22 23
24#include "prcm-common.h"
23#include "voltage.h" 25#include "voltage.h"
24#include "powerdomain.h" 26#include "powerdomain.h"
25#include "clockdomain.h" 27#include "clockdomain.h"
@@ -28,6 +30,12 @@
28 30
29static struct omap_device_pm_latency *pm_lats; 31static struct omap_device_pm_latency *pm_lats;
30 32
33/*
34 * omap_pm_suspend: points to a function that does the SoC-specific
35 * suspend work
36 */
37int (*omap_pm_suspend)(void);
38
31static int __init _init_omap_device(char *name) 39static int __init _init_omap_device(char *name)
32{ 40{
33 struct omap_hwmod *oh; 41 struct omap_hwmod *oh;
@@ -68,32 +76,41 @@ static void omap2_init_processor_devices(void)
68#define FORCEWAKEUP_SWITCH 0 76#define FORCEWAKEUP_SWITCH 0
69#define LOWPOWERSTATE_SWITCH 1 77#define LOWPOWERSTATE_SWITCH 1
70 78
79int __init omap_pm_clkdms_setup(struct clockdomain *clkdm, void *unused)
80{
81 if (clkdm->flags & CLKDM_CAN_ENABLE_AUTO)
82 clkdm_allow_idle(clkdm);
83 else if (clkdm->flags & CLKDM_CAN_FORCE_SLEEP &&
84 atomic_read(&clkdm->usecount) == 0)
85 clkdm_sleep(clkdm);
86 return 0;
87}
88
71/* 89/*
72 * This sets pwrdm state (other than mpu & core. Currently only ON & 90 * This sets pwrdm state (other than mpu & core. Currently only ON &
73 * RET are supported. 91 * RET are supported.
74 */ 92 */
75int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32 state) 93int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32 pwrst)
76{ 94{
77 u32 cur_state; 95 u8 curr_pwrst, next_pwrst;
78 int sleep_switch = -1; 96 int sleep_switch = -1, ret = 0, hwsup = 0;
79 int ret = 0;
80 int hwsup = 0;
81 97
82 if (pwrdm == NULL || IS_ERR(pwrdm)) 98 if (!pwrdm || IS_ERR(pwrdm))
83 return -EINVAL; 99 return -EINVAL;
84 100
85 while (!(pwrdm->pwrsts & (1 << state))) { 101 while (!(pwrdm->pwrsts & (1 << pwrst))) {
86 if (state == PWRDM_POWER_OFF) 102 if (pwrst == PWRDM_POWER_OFF)
87 return ret; 103 return ret;
88 state--; 104 pwrst--;
89 } 105 }
90 106
91 cur_state = pwrdm_read_next_pwrst(pwrdm); 107 next_pwrst = pwrdm_read_next_pwrst(pwrdm);
92 if (cur_state == state) 108 if (next_pwrst == pwrst)
93 return ret; 109 return ret;
94 110
95 if (pwrdm_read_pwrst(pwrdm) < PWRDM_POWER_ON) { 111 curr_pwrst = pwrdm_read_pwrst(pwrdm);
96 if ((pwrdm_read_pwrst(pwrdm) > state) && 112 if (curr_pwrst < PWRDM_POWER_ON) {
113 if ((curr_pwrst > pwrst) &&
97 (pwrdm->flags & PWRDM_HAS_LOWPOWERSTATECHANGE)) { 114 (pwrdm->flags & PWRDM_HAS_LOWPOWERSTATECHANGE)) {
98 sleep_switch = LOWPOWERSTATE_SWITCH; 115 sleep_switch = LOWPOWERSTATE_SWITCH;
99 } else { 116 } else {
@@ -103,12 +120,10 @@ int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32 state)
103 } 120 }
104 } 121 }
105 122
106 ret = pwrdm_set_next_pwrst(pwrdm, state); 123 ret = pwrdm_set_next_pwrst(pwrdm, pwrst);
107 if (ret) { 124 if (ret)
108 pr_err("%s: unable to set state of powerdomain: %s\n", 125 pr_err("%s: unable to set power state of powerdomain: %s\n",
109 __func__, pwrdm->name); 126 __func__, pwrdm->name);
110 goto err;
111 }
112 127
113 switch (sleep_switch) { 128 switch (sleep_switch) {
114 case FORCEWAKEUP_SWITCH: 129 case FORCEWAKEUP_SWITCH:
@@ -119,16 +134,16 @@ int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32 state)
119 break; 134 break;
120 case LOWPOWERSTATE_SWITCH: 135 case LOWPOWERSTATE_SWITCH:
121 pwrdm_set_lowpwrstchange(pwrdm); 136 pwrdm_set_lowpwrstchange(pwrdm);
137 pwrdm_wait_transition(pwrdm);
138 pwrdm_state_switch(pwrdm);
122 break; 139 break;
123 default:
124 return ret;
125 } 140 }
126 141
127 pwrdm_state_switch(pwrdm);
128err:
129 return ret; 142 return ret;
130} 143}
131 144
145
146
132/* 147/*
133 * This API is to be called during init to set the various voltage 148 * This API is to be called during init to set the various voltage
134 * domains to the voltage as per the opp table. Typically we boot up 149 * domains to the voltage as per the opp table. Typically we boot up
@@ -196,6 +211,56 @@ exit:
196 return -EINVAL; 211 return -EINVAL;
197} 212}
198 213
214#ifdef CONFIG_SUSPEND
215static int omap_pm_enter(suspend_state_t suspend_state)
216{
217 int ret = 0;
218
219 if (!omap_pm_suspend)
220 return -ENOENT; /* XXX doublecheck */
221
222 switch (suspend_state) {
223 case PM_SUSPEND_STANDBY:
224 case PM_SUSPEND_MEM:
225 ret = omap_pm_suspend();
226 break;
227 default:
228 ret = -EINVAL;
229 }
230
231 return ret;
232}
233
234static int omap_pm_begin(suspend_state_t state)
235{
236 disable_hlt();
237 if (cpu_is_omap34xx())
238 omap_prcm_irq_prepare();
239 return 0;
240}
241
242static void omap_pm_end(void)
243{
244 enable_hlt();
245 return;
246}
247
248static void omap_pm_finish(void)
249{
250 if (cpu_is_omap34xx())
251 omap_prcm_irq_complete();
252}
253
254static const struct platform_suspend_ops omap_pm_ops = {
255 .begin = omap_pm_begin,
256 .end = omap_pm_end,
257 .enter = omap_pm_enter,
258 .finish = omap_pm_finish,
259 .valid = suspend_valid_only_mem,
260};
261
262#endif /* CONFIG_SUSPEND */
263
199static void __init omap3_init_voltages(void) 264static void __init omap3_init_voltages(void)
200{ 265{
201 if (!cpu_is_omap34xx()) 266 if (!cpu_is_omap34xx())
@@ -238,6 +303,10 @@ static int __init omap2_common_pm_late_init(void)
238 /* Smartreflex device init */ 303 /* Smartreflex device init */
239 omap_devinit_smartreflex(); 304 omap_devinit_smartreflex();
240 305
306#ifdef CONFIG_SUSPEND
307 suspend_set_ops(&omap_pm_ops);
308#endif
309
241 return 0; 310 return 0;
242} 311}
243late_initcall(omap2_common_pm_late_init); 312late_initcall(omap2_common_pm_late_init);
diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h
index b737b11e449..a0514310d15 100644
--- a/arch/arm/mach-omap2/pm.h
+++ b/arch/arm/mach-omap2/pm.h
@@ -22,6 +22,8 @@ extern int omap3_can_sleep(void);
22extern int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32 state); 22extern int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32 state);
23extern int omap3_idle_init(void); 23extern int omap3_idle_init(void);
24extern int omap4_idle_init(void); 24extern int omap4_idle_init(void);
25extern int omap_pm_clkdms_setup(struct clockdomain *clkdm, void *unused);
26extern int (*omap_pm_suspend)(void);
25 27
26#if defined(CONFIG_PM_OPP) 28#if defined(CONFIG_PM_OPP)
27extern int omap3_opp_init(void); 29extern int omap3_opp_init(void);
diff --git a/arch/arm/mach-omap2/pm24xx.c b/arch/arm/mach-omap2/pm24xx.c
index 23de98d0384..5ca45ca7694 100644
--- a/arch/arm/mach-omap2/pm24xx.c
+++ b/arch/arm/mach-omap2/pm24xx.c
@@ -26,7 +26,6 @@
26#include <linux/module.h> 26#include <linux/module.h>
27#include <linux/delay.h> 27#include <linux/delay.h>
28#include <linux/clk.h> 28#include <linux/clk.h>
29#include <linux/io.h>
30#include <linux/irq.h> 29#include <linux/irq.h>
31#include <linux/time.h> 30#include <linux/time.h>
32#include <linux/gpio.h> 31#include <linux/gpio.h>
@@ -35,12 +34,13 @@
35#include <asm/mach/irq.h> 34#include <asm/mach/irq.h>
36#include <asm/mach-types.h> 35#include <asm/mach-types.h>
37 36
38#include <mach/irqs.h>
39#include <plat/clock.h> 37#include <plat/clock.h>
40#include <plat/sram.h> 38#include <plat/sram.h>
41#include <plat/dma.h> 39#include <plat/dma.h>
42#include <plat/board.h> 40#include <plat/board.h>
43 41
42#include <mach/irqs.h>
43
44#include "common.h" 44#include "common.h"
45#include "prm2xxx_3xxx.h" 45#include "prm2xxx_3xxx.h"
46#include "prm-regbits-24xx.h" 46#include "prm-regbits-24xx.h"
@@ -49,23 +49,9 @@
49#include "sdrc.h" 49#include "sdrc.h"
50#include "pm.h" 50#include "pm.h"
51#include "control.h" 51#include "control.h"
52
53#include "powerdomain.h" 52#include "powerdomain.h"
54#include "clockdomain.h" 53#include "clockdomain.h"
55 54
56#ifdef CONFIG_SUSPEND
57static suspend_state_t suspend_state = PM_SUSPEND_ON;
58static inline bool is_suspending(void)
59{
60 return (suspend_state != PM_SUSPEND_ON);
61}
62#else
63static inline bool is_suspending(void)
64{
65 return false;
66}
67#endif
68
69static void (*omap2_sram_idle)(void); 55static void (*omap2_sram_idle)(void);
70static void (*omap2_sram_suspend)(u32 dllctrl, void __iomem *sdrc_dlla_ctrl, 56static void (*omap2_sram_suspend)(u32 dllctrl, void __iomem *sdrc_dlla_ctrl,
71 void __iomem *sdrc_power); 57 void __iomem *sdrc_power);
@@ -85,7 +71,7 @@ static int omap2_fclks_active(void)
85 return (f1 | f2) ? 1 : 0; 71 return (f1 | f2) ? 1 : 0;
86} 72}
87 73
88static void omap2_enter_full_retention(void) 74static int omap2_enter_full_retention(void)
89{ 75{
90 u32 l; 76 u32 l;
91 77
@@ -148,6 +134,8 @@ no_sleep:
148 134
149 /* Mask future PRCM-to-MPU interrupts */ 135 /* Mask future PRCM-to-MPU interrupts */
150 omap2_prm_write_mod_reg(0x0, OCP_MOD, OMAP2_PRCM_IRQSTATUS_MPU_OFFSET); 136 omap2_prm_write_mod_reg(0x0, OCP_MOD, OMAP2_PRCM_IRQSTATUS_MPU_OFFSET);
137
138 return 0;
151} 139}
152 140
153static int omap2_i2c_active(void) 141static int omap2_i2c_active(void)
@@ -226,7 +214,6 @@ static int omap2_can_sleep(void)
226 214
227static void omap2_pm_idle(void) 215static void omap2_pm_idle(void)
228{ 216{
229 local_irq_disable();
230 local_fiq_disable(); 217 local_fiq_disable();
231 218
232 if (!omap2_can_sleep()) { 219 if (!omap2_can_sleep()) {
@@ -243,78 +230,6 @@ static void omap2_pm_idle(void)
243 230
244out: 231out:
245 local_fiq_enable(); 232 local_fiq_enable();
246 local_irq_enable();
247}
248
249#ifdef CONFIG_SUSPEND
250static int omap2_pm_begin(suspend_state_t state)
251{
252 disable_hlt();
253 suspend_state = state;
254 return 0;
255}
256
257static int omap2_pm_suspend(void)
258{
259 u32 wken_wkup, mir1;
260
261 wken_wkup = omap2_prm_read_mod_reg(WKUP_MOD, PM_WKEN);
262 wken_wkup &= ~OMAP24XX_EN_GPT1_MASK;
263 omap2_prm_write_mod_reg(wken_wkup, WKUP_MOD, PM_WKEN);
264
265 /* Mask GPT1 */
266 mir1 = omap_readl(0x480fe0a4);
267 omap_writel(1 << 5, 0x480fe0ac);
268
269 omap2_enter_full_retention();
270
271 omap_writel(mir1, 0x480fe0a4);
272 omap2_prm_write_mod_reg(wken_wkup, WKUP_MOD, PM_WKEN);
273
274 return 0;
275}
276
277static int omap2_pm_enter(suspend_state_t state)
278{
279 int ret = 0;
280
281 switch (state) {
282 case PM_SUSPEND_STANDBY:
283 case PM_SUSPEND_MEM:
284 ret = omap2_pm_suspend();
285 break;
286 default:
287 ret = -EINVAL;
288 }
289
290 return ret;
291}
292
293static void omap2_pm_end(void)
294{
295 suspend_state = PM_SUSPEND_ON;
296 enable_hlt();
297}
298
299static const struct platform_suspend_ops omap_pm_ops = {
300 .begin = omap2_pm_begin,
301 .enter = omap2_pm_enter,
302 .end = omap2_pm_end,
303 .valid = suspend_valid_only_mem,
304};
305#else
306static const struct platform_suspend_ops __initdata omap_pm_ops;
307#endif /* CONFIG_SUSPEND */
308
309/* XXX This function should be shareable between OMAP2xxx and OMAP3 */
310static int __init clkdms_setup(struct clockdomain *clkdm, void *unused)
311{
312 if (clkdm->flags & CLKDM_CAN_ENABLE_AUTO)
313 clkdm_allow_idle(clkdm);
314 else if (clkdm->flags & CLKDM_CAN_FORCE_SLEEP &&
315 atomic_read(&clkdm->usecount) == 0)
316 clkdm_sleep(clkdm);
317 return 0;
318} 233}
319 234
320static void __init prcm_setup_regs(void) 235static void __init prcm_setup_regs(void)
@@ -358,9 +273,13 @@ static void __init prcm_setup_regs(void)
358 clkdm_sleep(gfx_clkdm); 273 clkdm_sleep(gfx_clkdm);
359 274
360 /* Enable hardware-supervised idle for all clkdms */ 275 /* Enable hardware-supervised idle for all clkdms */
361 clkdm_for_each(clkdms_setup, NULL); 276 clkdm_for_each(omap_pm_clkdms_setup, NULL);
362 clkdm_add_wkdep(mpu_clkdm, wkup_clkdm); 277 clkdm_add_wkdep(mpu_clkdm, wkup_clkdm);
363 278
279#ifdef CONFIG_SUSPEND
280 omap_pm_suspend = omap2_enter_full_retention;
281#endif
282
364 /* REVISIT: Configure number of 32 kHz clock cycles for sys_clk 283 /* REVISIT: Configure number of 32 kHz clock cycles for sys_clk
365 * stabilisation */ 284 * stabilisation */
366 omap2_prm_write_mod_reg(15 << OMAP_SETUP_TIME_SHIFT, OMAP24XX_GR_MOD, 285 omap2_prm_write_mod_reg(15 << OMAP_SETUP_TIME_SHIFT, OMAP24XX_GR_MOD,
@@ -461,8 +380,7 @@ static int __init omap2_pm_init(void)
461 omap24xx_cpu_suspend_sz); 380 omap24xx_cpu_suspend_sz);
462 } 381 }
463 382
464 suspend_set_ops(&omap_pm_ops); 383 arm_pm_idle = omap2_pm_idle;
465 pm_idle = omap2_pm_idle;
466 384
467 return 0; 385 return 0;
468} 386}
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index fc698757892..da054370f83 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -50,10 +50,6 @@
50#include "sdrc.h" 50#include "sdrc.h"
51#include "control.h" 51#include "control.h"
52 52
53#ifdef CONFIG_SUSPEND
54static suspend_state_t suspend_state = PM_SUSPEND_ON;
55#endif
56
57/* pm34xx errata defined in pm.h */ 53/* pm34xx errata defined in pm.h */
58u16 pm34xx_errata; 54u16 pm34xx_errata;
59 55
@@ -290,11 +286,6 @@ void omap_sram_idle(void)
290 int core_prev_state, per_prev_state; 286 int core_prev_state, per_prev_state;
291 u32 sdrc_pwr = 0; 287 u32 sdrc_pwr = 0;
292 288
293 pwrdm_clear_all_prev_pwrst(mpu_pwrdm);
294 pwrdm_clear_all_prev_pwrst(neon_pwrdm);
295 pwrdm_clear_all_prev_pwrst(core_pwrdm);
296 pwrdm_clear_all_prev_pwrst(per_pwrdm);
297
298 mpu_next_state = pwrdm_read_next_pwrst(mpu_pwrdm); 289 mpu_next_state = pwrdm_read_next_pwrst(mpu_pwrdm);
299 switch (mpu_next_state) { 290 switch (mpu_next_state) {
300 case PWRDM_POWER_ON: 291 case PWRDM_POWER_ON:
@@ -418,10 +409,9 @@ void omap_sram_idle(void)
418 409
419static void omap3_pm_idle(void) 410static void omap3_pm_idle(void)
420{ 411{
421 local_irq_disable();
422 local_fiq_disable(); 412 local_fiq_disable();
423 413
424 if (omap_irq_pending() || need_resched()) 414 if (omap_irq_pending())
425 goto out; 415 goto out;
426 416
427 trace_power_start(POWER_CSTATE, 1, smp_processor_id()); 417 trace_power_start(POWER_CSTATE, 1, smp_processor_id());
@@ -434,7 +424,6 @@ static void omap3_pm_idle(void)
434 424
435out: 425out:
436 local_fiq_enable(); 426 local_fiq_enable();
437 local_irq_enable();
438} 427}
439 428
440#ifdef CONFIG_SUSPEND 429#ifdef CONFIG_SUSPEND
@@ -479,50 +468,6 @@ restore:
479 return ret; 468 return ret;
480} 469}
481 470
482static int omap3_pm_enter(suspend_state_t unused)
483{
484 int ret = 0;
485
486 switch (suspend_state) {
487 case PM_SUSPEND_STANDBY:
488 case PM_SUSPEND_MEM:
489 ret = omap3_pm_suspend();
490 break;
491 default:
492 ret = -EINVAL;
493 }
494
495 return ret;
496}
497
498/* Hooks to enable / disable UART interrupts during suspend */
499static int omap3_pm_begin(suspend_state_t state)
500{
501 disable_hlt();
502 suspend_state = state;
503 omap_prcm_irq_prepare();
504 return 0;
505}
506
507static void omap3_pm_end(void)
508{
509 suspend_state = PM_SUSPEND_ON;
510 enable_hlt();
511 return;
512}
513
514static void omap3_pm_finish(void)
515{
516 omap_prcm_irq_complete();
517}
518
519static const struct platform_suspend_ops omap_pm_ops = {
520 .begin = omap3_pm_begin,
521 .end = omap3_pm_end,
522 .enter = omap3_pm_enter,
523 .finish = omap3_pm_finish,
524 .valid = suspend_valid_only_mem,
525};
526#endif /* CONFIG_SUSPEND */ 471#endif /* CONFIG_SUSPEND */
527 472
528 473
@@ -743,21 +688,6 @@ static int __init pwrdms_setup(struct powerdomain *pwrdm, void *unused)
743} 688}
744 689
745/* 690/*
746 * Enable hw supervised mode for all clockdomains if it's
747 * supported. Initiate sleep transition for other clockdomains, if
748 * they are not used
749 */
750static int __init clkdms_setup(struct clockdomain *clkdm, void *unused)
751{
752 if (clkdm->flags & CLKDM_CAN_ENABLE_AUTO)
753 clkdm_allow_idle(clkdm);
754 else if (clkdm->flags & CLKDM_CAN_FORCE_SLEEP &&
755 atomic_read(&clkdm->usecount) == 0)
756 clkdm_sleep(clkdm);
757 return 0;
758}
759
760/*
761 * Push functions to SRAM 691 * Push functions to SRAM
762 * 692 *
763 * The minimum set of functions is pushed to SRAM for execution: 693 * The minimum set of functions is pushed to SRAM for execution:
@@ -826,7 +756,7 @@ static int __init omap3_pm_init(void)
826 goto err2; 756 goto err2;
827 } 757 }
828 758
829 (void) clkdm_for_each(clkdms_setup, NULL); 759 (void) clkdm_for_each(omap_pm_clkdms_setup, NULL);
830 760
831 mpu_pwrdm = pwrdm_lookup("mpu_pwrdm"); 761 mpu_pwrdm = pwrdm_lookup("mpu_pwrdm");
832 if (mpu_pwrdm == NULL) { 762 if (mpu_pwrdm == NULL) {
@@ -845,10 +775,10 @@ static int __init omap3_pm_init(void)
845 core_clkdm = clkdm_lookup("core_clkdm"); 775 core_clkdm = clkdm_lookup("core_clkdm");
846 776
847#ifdef CONFIG_SUSPEND 777#ifdef CONFIG_SUSPEND
848 suspend_set_ops(&omap_pm_ops); 778 omap_pm_suspend = omap3_pm_suspend;
849#endif /* CONFIG_SUSPEND */ 779#endif
850 780
851 pm_idle = omap3_pm_idle; 781 arm_pm_idle = omap3_pm_idle;
852 omap3_idle_init(); 782 omap3_idle_init();
853 783
854 /* 784 /*
diff --git a/arch/arm/mach-omap2/pm44xx.c b/arch/arm/mach-omap2/pm44xx.c
index c264ef7219c..91e0b1c9b76 100644
--- a/arch/arm/mach-omap2/pm44xx.c
+++ b/arch/arm/mach-omap2/pm44xx.c
@@ -83,59 +83,8 @@ static int omap4_pm_suspend(void)
83 83
84 return 0; 84 return 0;
85} 85}
86
87static int omap4_pm_enter(suspend_state_t suspend_state)
88{
89 int ret = 0;
90
91 switch (suspend_state) {
92 case PM_SUSPEND_STANDBY:
93 case PM_SUSPEND_MEM:
94 ret = omap4_pm_suspend();
95 break;
96 default:
97 ret = -EINVAL;
98 }
99
100 return ret;
101}
102
103static int omap4_pm_begin(suspend_state_t state)
104{
105 disable_hlt();
106 return 0;
107}
108
109static void omap4_pm_end(void)
110{
111 enable_hlt();
112 return;
113}
114
115static const struct platform_suspend_ops omap_pm_ops = {
116 .begin = omap4_pm_begin,
117 .end = omap4_pm_end,
118 .enter = omap4_pm_enter,
119 .valid = suspend_valid_only_mem,
120};
121#endif /* CONFIG_SUSPEND */ 86#endif /* CONFIG_SUSPEND */
122 87
123/*
124 * Enable hardware supervised mode for all clockdomains if it's
125 * supported. Initiate sleep transition for other clockdomains, if
126 * they are not used
127 */
128static int __init clkdms_setup(struct clockdomain *clkdm, void *unused)
129{
130 if (clkdm->flags & CLKDM_CAN_ENABLE_AUTO)
131 clkdm_allow_idle(clkdm);
132 else if (clkdm->flags & CLKDM_CAN_FORCE_SLEEP &&
133 atomic_read(&clkdm->usecount) == 0)
134 clkdm_sleep(clkdm);
135 return 0;
136}
137
138
139static int __init pwrdms_setup(struct powerdomain *pwrdm, void *unused) 88static int __init pwrdms_setup(struct powerdomain *pwrdm, void *unused)
140{ 89{
141 struct power_state *pwrst; 90 struct power_state *pwrst;
@@ -173,18 +122,16 @@ static int __init pwrdms_setup(struct powerdomain *pwrdm, void *unused)
173 * omap_default_idle - OMAP4 default ilde routine.' 122 * omap_default_idle - OMAP4 default ilde routine.'
174 * 123 *
175 * Implements OMAP4 memory, IO ordering requirements which can't be addressed 124 * Implements OMAP4 memory, IO ordering requirements which can't be addressed
176 * with default arch_idle() hook. Used by all CPUs with !CONFIG_CPUIDLE and 125 * with default cpu_do_idle() hook. Used by all CPUs with !CONFIG_CPUIDLE and
177 * by secondary CPU with CONFIG_CPUIDLE. 126 * by secondary CPU with CONFIG_CPUIDLE.
178 */ 127 */
179static void omap_default_idle(void) 128static void omap_default_idle(void)
180{ 129{
181 local_irq_disable();
182 local_fiq_disable(); 130 local_fiq_disable();
183 131
184 omap_do_wfi(); 132 omap_do_wfi();
185 133
186 local_fiq_enable(); 134 local_fiq_enable();
187 local_irq_enable();
188} 135}
189 136
190/** 137/**
@@ -249,14 +196,14 @@ static int __init omap4_pm_init(void)
249 goto err2; 196 goto err2;
250 } 197 }
251 198
252 (void) clkdm_for_each(clkdms_setup, NULL); 199 (void) clkdm_for_each(omap_pm_clkdms_setup, NULL);
253 200
254#ifdef CONFIG_SUSPEND 201#ifdef CONFIG_SUSPEND
255 suspend_set_ops(&omap_pm_ops); 202 omap_pm_suspend = omap4_pm_suspend;
256#endif /* CONFIG_SUSPEND */ 203#endif
257 204
258 /* Overwrite the default arch_idle() */ 205 /* Overwrite the default cpu_do_idle() */
259 pm_idle = omap_default_idle; 206 arm_pm_idle = omap_default_idle;
260 207
261 omap4_idle_init(); 208 omap4_idle_init();
262 209
diff --git a/arch/arm/mach-omap2/prcm_mpu44xx.c b/arch/arm/mach-omap2/prcm_mpu44xx.c
index ca669b50f39..928dbd4f20e 100644
--- a/arch/arm/mach-omap2/prcm_mpu44xx.c
+++ b/arch/arm/mach-omap2/prcm_mpu44xx.c
@@ -15,8 +15,8 @@
15#include <linux/err.h> 15#include <linux/err.h>
16#include <linux/io.h> 16#include <linux/io.h>
17 17
18#include "iomap.h"
18#include "common.h" 19#include "common.h"
19
20#include "prcm_mpu44xx.h" 20#include "prcm_mpu44xx.h"
21#include "cm-regbits-44xx.h" 21#include "cm-regbits-44xx.h"
22 22
diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
index a1d6154dc12..eac623c7c3d 100644
--- a/arch/arm/mach-omap2/prm44xx.c
+++ b/arch/arm/mach-omap2/prm44xx.c
@@ -17,11 +17,12 @@
17#include <linux/err.h> 17#include <linux/err.h>
18#include <linux/io.h> 18#include <linux/io.h>
19 19
20#include "common.h"
21#include <plat/cpu.h> 20#include <plat/cpu.h>
22#include <plat/irqs.h> 21#include <plat/irqs.h>
23#include <plat/prcm.h> 22#include <plat/prcm.h>
24 23
24#include "iomap.h"
25#include "common.h"
25#include "vp.h" 26#include "vp.h"
26#include "prm44xx.h" 27#include "prm44xx.h"
27#include "prm-regbits-44xx.h" 28#include "prm-regbits-44xx.h"
diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c
index 860118ab43e..873b51d494e 100644
--- a/arch/arm/mach-omap2/prm_common.c
+++ b/arch/arm/mach-omap2/prm_common.c
@@ -24,7 +24,6 @@
24#include <linux/interrupt.h> 24#include <linux/interrupt.h>
25#include <linux/slab.h> 25#include <linux/slab.h>
26 26
27#include <mach/system.h>
28#include <plat/common.h> 27#include <plat/common.h>
29#include <plat/prcm.h> 28#include <plat/prcm.h>
30#include <plat/irqs.h> 29#include <plat/irqs.h>
diff --git a/arch/arm/mach-omap2/prminst44xx.c b/arch/arm/mach-omap2/prminst44xx.c
index f6de5bc6b12..9b3898a3ac9 100644
--- a/arch/arm/mach-omap2/prminst44xx.c
+++ b/arch/arm/mach-omap2/prminst44xx.c
@@ -16,8 +16,8 @@
16#include <linux/err.h> 16#include <linux/err.h>
17#include <linux/io.h> 17#include <linux/io.h>
18 18
19#include "iomap.h"
19#include "common.h" 20#include "common.h"
20
21#include "prm44xx.h" 21#include "prm44xx.h"
22#include "prminst44xx.h" 22#include "prminst44xx.h"
23#include "prm-regbits-44xx.h" 23#include "prm-regbits-44xx.h"
diff --git a/arch/arm/mach-omap2/sdram-nokia.c b/arch/arm/mach-omap2/sdram-nokia.c
index 7479d7ea137..845c4fd2b12 100644
--- a/arch/arm/mach-omap2/sdram-nokia.c
+++ b/arch/arm/mach-omap2/sdram-nokia.c
@@ -17,7 +17,6 @@
17#include <linux/err.h> 17#include <linux/err.h>
18#include <linux/io.h> 18#include <linux/io.h>
19 19
20#include <plat/io.h>
21#include "common.h" 20#include "common.h"
22#include <plat/clock.h> 21#include <plat/clock.h>
23#include <plat/sdrc.h> 22#include <plat/sdrc.h>
diff --git a/arch/arm/mach-omap2/sdrc2xxx.c b/arch/arm/mach-omap2/sdrc2xxx.c
index 791a63cdceb..2c329a6f477 100644
--- a/arch/arm/mach-omap2/sdrc2xxx.c
+++ b/arch/arm/mach-omap2/sdrc2xxx.c
@@ -24,13 +24,14 @@
24#include <linux/clk.h> 24#include <linux/clk.h>
25#include <linux/io.h> 25#include <linux/io.h>
26 26
27#include "common.h"
28#include <plat/clock.h> 27#include <plat/clock.h>
29#include <plat/sram.h> 28#include <plat/sram.h>
29#include <plat/sdrc.h>
30 30
31#include "iomap.h"
32#include "common.h"
31#include "prm2xxx_3xxx.h" 33#include "prm2xxx_3xxx.h"
32#include "clock.h" 34#include "clock.h"
33#include <plat/sdrc.h>
34#include "sdrc.h" 35#include "sdrc.h"
35 36
36/* Memory timing, DLL mode flags */ 37/* Memory timing, DLL mode flags */
diff --git a/arch/arm/mach-omap2/sleep24xx.S b/arch/arm/mach-omap2/sleep24xx.S
index b5071a47ec3..d4bf904d84a 100644
--- a/arch/arm/mach-omap2/sleep24xx.S
+++ b/arch/arm/mach-omap2/sleep24xx.S
@@ -27,7 +27,6 @@
27 27
28#include <linux/linkage.h> 28#include <linux/linkage.h>
29#include <asm/assembler.h> 29#include <asm/assembler.h>
30#include <mach/io.h>
31 30
32#include <plat/omap24xx.h> 31#include <plat/omap24xx.h>
33 32
diff --git a/arch/arm/mach-omap2/sleep34xx.S b/arch/arm/mach-omap2/sleep34xx.S
index f2ea1bd1c69..1f62f23673f 100644
--- a/arch/arm/mach-omap2/sleep34xx.S
+++ b/arch/arm/mach-omap2/sleep34xx.S
@@ -23,10 +23,13 @@
23 * MA 02111-1307 USA 23 * MA 02111-1307 USA
24 */ 24 */
25#include <linux/linkage.h> 25#include <linux/linkage.h>
26
26#include <asm/assembler.h> 27#include <asm/assembler.h>
28
29#include <plat/hardware.h>
27#include <plat/sram.h> 30#include <plat/sram.h>
28#include <mach/io.h>
29 31
32#include "iomap.h"
30#include "cm2xxx_3xxx.h" 33#include "cm2xxx_3xxx.h"
31#include "prm2xxx_3xxx.h" 34#include "prm2xxx_3xxx.h"
32#include "sdrc.h" 35#include "sdrc.h"
diff --git a/arch/arm/mach-omap2/sram242x.S b/arch/arm/mach-omap2/sram242x.S
index ff9b9dbcb30..ee0bfcc1410 100644
--- a/arch/arm/mach-omap2/sram242x.S
+++ b/arch/arm/mach-omap2/sram242x.S
@@ -29,10 +29,12 @@
29 * These crashes may be intermittent. 29 * These crashes may be intermittent.
30 */ 30 */
31#include <linux/linkage.h> 31#include <linux/linkage.h>
32
32#include <asm/assembler.h> 33#include <asm/assembler.h>
33#include <mach/io.h> 34
34#include <mach/hardware.h> 35#include <mach/hardware.h>
35 36
37#include "iomap.h"
36#include "prm2xxx_3xxx.h" 38#include "prm2xxx_3xxx.h"
37#include "cm2xxx_3xxx.h" 39#include "cm2xxx_3xxx.h"
38#include "sdrc.h" 40#include "sdrc.h"
diff --git a/arch/arm/mach-omap2/sram243x.S b/arch/arm/mach-omap2/sram243x.S
index 76730209fa0..d4d39ef0476 100644
--- a/arch/arm/mach-omap2/sram243x.S
+++ b/arch/arm/mach-omap2/sram243x.S
@@ -29,10 +29,12 @@
29 * These crashes may be intermittent. 29 * These crashes may be intermittent.
30 */ 30 */
31#include <linux/linkage.h> 31#include <linux/linkage.h>
32
32#include <asm/assembler.h> 33#include <asm/assembler.h>
33#include <mach/io.h> 34
34#include <mach/hardware.h> 35#include <mach/hardware.h>
35 36
37#include "iomap.h"
36#include "prm2xxx_3xxx.h" 38#include "prm2xxx_3xxx.h"
37#include "cm2xxx_3xxx.h" 39#include "cm2xxx_3xxx.h"
38#include "sdrc.h" 40#include "sdrc.h"
diff --git a/arch/arm/mach-omap2/sram34xx.S b/arch/arm/mach-omap2/sram34xx.S
index 6f5849aaa7c..df5a21322b0 100644
--- a/arch/arm/mach-omap2/sram34xx.S
+++ b/arch/arm/mach-omap2/sram34xx.S
@@ -26,11 +26,12 @@
26 * MA 02111-1307 USA 26 * MA 02111-1307 USA
27 */ 27 */
28#include <linux/linkage.h> 28#include <linux/linkage.h>
29
29#include <asm/assembler.h> 30#include <asm/assembler.h>
30#include <mach/hardware.h>
31 31
32#include <mach/io.h> 32#include <mach/hardware.h>
33 33
34#include "iomap.h"
34#include "sdrc.h" 35#include "sdrc.h"
35#include "cm2xxx_3xxx.h" 36#include "cm2xxx_3xxx.h"
36 37
diff --git a/arch/arm/mach-orion5x/include/mach/entry-macro.S b/arch/arm/mach-orion5x/include/mach/entry-macro.S
index d658992e540..79eb502a1e6 100644
--- a/arch/arm/mach-orion5x/include/mach/entry-macro.S
+++ b/arch/arm/mach-orion5x/include/mach/entry-macro.S
@@ -10,12 +10,6 @@
10 10
11#include <mach/bridge-regs.h> 11#include <mach/bridge-regs.h>
12 12
13 .macro disable_fiq
14 .endm
15
16 .macro arch_ret_to_user, tmp1, tmp2
17 .endm
18
19 .macro get_irqnr_preamble, base, tmp 13 .macro get_irqnr_preamble, base, tmp
20 ldr \base, =MAIN_IRQ_CAUSE 14 ldr \base, =MAIN_IRQ_CAUSE
21 .endm 15 .endm
diff --git a/arch/arm/mach-orion5x/include/mach/system.h b/arch/arm/mach-orion5x/include/mach/system.h
deleted file mode 100644
index 825a2650cef..00000000000
--- a/arch/arm/mach-orion5x/include/mach/system.h
+++ /dev/null
@@ -1,19 +0,0 @@
1/*
2 * arch/arm/mach-orion5x/include/mach/system.h
3 *
4 * Tzachi Perelstein <tzachi@marvell.com>
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10
11#ifndef __ASM_ARCH_SYSTEM_H
12#define __ASM_ARCH_SYSTEM_H
13
14static inline void arch_idle(void)
15{
16 cpu_do_idle();
17}
18
19#endif
diff --git a/arch/arm/mach-picoxcell/include/mach/entry-macro.S b/arch/arm/mach-picoxcell/include/mach/entry-macro.S
deleted file mode 100644
index 9b505ac00be..00000000000
--- a/arch/arm/mach-picoxcell/include/mach/entry-macro.S
+++ /dev/null
@@ -1,16 +0,0 @@
1/*
2 * entry-macro.S
3 *
4 * Copyright (c) 2011 Picochip Ltd., Jamie Iles
5 *
6 * Low-level IRQ helper macros for picoXcell platforms
7 *
8 * This file is licensed under the terms of the GNU General Public
9 * License version 2. This program is licensed "as is" without any
10 * warranty of any kind, whether express or implied.
11 */
12 .macro disable_fiq
13 .endm
14
15 .macro arch_ret_to_user, tmp1, tmp2
16 .endm
diff --git a/arch/arm/mach-picoxcell/include/mach/system.h b/arch/arm/mach-picoxcell/include/mach/system.h
deleted file mode 100644
index 1a5d8cb57df..00000000000
--- a/arch/arm/mach-picoxcell/include/mach/system.h
+++ /dev/null
@@ -1,26 +0,0 @@
1/*
2 * Copyright (c) 2011 Picochip Ltd., Jamie Iles
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 */
14#ifndef __ASM_ARCH_SYSTEM_H
15#define __ASM_ARCH_SYSTEM_H
16
17static inline void arch_idle(void)
18{
19 /*
20 * This should do all the clock switching and wait for interrupt
21 * tricks.
22 */
23 cpu_do_idle();
24}
25
26#endif /* __ASM_ARCH_SYSTEM_H */
diff --git a/arch/arm/mach-pnx4008/include/mach/entry-macro.S b/arch/arm/mach-pnx4008/include/mach/entry-macro.S
index db7eeebf30d..77a55584671 100644
--- a/arch/arm/mach-pnx4008/include/mach/entry-macro.S
+++ b/arch/arm/mach-pnx4008/include/mach/entry-macro.S
@@ -25,15 +25,9 @@
25#define SIC1_BASE_INT 32 25#define SIC1_BASE_INT 32
26#define SIC2_BASE_INT 64 26#define SIC2_BASE_INT 64
27 27
28 .macro disable_fiq
29 .endm
30
31 .macro get_irqnr_preamble, base, tmp 28 .macro get_irqnr_preamble, base, tmp
32 .endm 29 .endm
33 30
34 .macro arch_ret_to_user, tmp1, tmp2
35 .endm
36
37 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp 31 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
38/* decode the MIC interrupt numbers */ 32/* decode the MIC interrupt numbers */
39 ldr \base, =IO_ADDRESS(PNX4008_INTCTRLMIC_BASE) 33 ldr \base, =IO_ADDRESS(PNX4008_INTCTRLMIC_BASE)
diff --git a/arch/arm/mach-pnx4008/include/mach/system.h b/arch/arm/mach-pnx4008/include/mach/system.h
deleted file mode 100644
index 60cfe718809..00000000000
--- a/arch/arm/mach-pnx4008/include/mach/system.h
+++ /dev/null
@@ -1,29 +0,0 @@
1/*
2 * arch/arm/mach-pnx4008/include/mach/system.h
3 *
4 * Copyright (C) 2003 Philips Semiconductors
5 * Copyright (C) 2005 MontaVista Software, Inc.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21#ifndef __ASM_ARCH_SYSTEM_H
22#define __ASM_ARCH_SYSTEM_H
23
24static void arch_idle(void)
25{
26 cpu_do_idle();
27}
28
29#endif
diff --git a/arch/arm/mach-prima2/include/mach/entry-macro.S b/arch/arm/mach-prima2/include/mach/entry-macro.S
index 1c8a50f102a..86434e7a5be 100644
--- a/arch/arm/mach-prima2/include/mach/entry-macro.S
+++ b/arch/arm/mach-prima2/include/mach/entry-macro.S
@@ -20,10 +20,3 @@
20 cmp \irqnr, #0x40 @ the irq num can't be larger than 0x3f 20 cmp \irqnr, #0x40 @ the irq num can't be larger than 0x3f
21 movges \irqnr, #0 21 movges \irqnr, #0
22 .endm 22 .endm
23
24 .macro disable_fiq
25 .endm
26
27 .macro arch_ret_to_user, tmp1, tmp2
28 .endm
29
diff --git a/arch/arm/mach-prima2/include/mach/system.h b/arch/arm/mach-prima2/include/mach/system.h
deleted file mode 100644
index 2c7d2a9d0c9..00000000000
--- a/arch/arm/mach-prima2/include/mach/system.h
+++ /dev/null
@@ -1,17 +0,0 @@
1/*
2 * arch/arm/mach-prima2/include/mach/system.h
3 *
4 * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company.
5 *
6 * Licensed under GPLv2 or later.
7 */
8
9#ifndef __MACH_SYSTEM_H__
10#define __MACH_SYSTEM_H__
11
12static inline void arch_idle(void)
13{
14 cpu_do_idle();
15}
16
17#endif
diff --git a/arch/arm/mach-pxa/include/mach/entry-macro.S b/arch/arm/mach-pxa/include/mach/entry-macro.S
deleted file mode 100644
index 260c0c17692..00000000000
--- a/arch/arm/mach-pxa/include/mach/entry-macro.S
+++ /dev/null
@@ -1,15 +0,0 @@
1/*
2 * arch/arm/mach-pxa/include/mach/entry-macro.S
3 *
4 * Low-level IRQ helper macros for PXA-based platforms
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10
11 .macro disable_fiq
12 .endm
13
14 .macro arch_ret_to_user, tmp1, tmp2
15 .endm
diff --git a/arch/arm/mach-pxa/include/mach/system.h b/arch/arm/mach-pxa/include/mach/system.h
deleted file mode 100644
index c5afacd3cc0..00000000000
--- a/arch/arm/mach-pxa/include/mach/system.h
+++ /dev/null
@@ -1,15 +0,0 @@
1/*
2 * arch/arm/mach-pxa/include/mach/system.h
3 *
4 * Author: Nicolas Pitre
5 * Created: Jun 15, 2001
6 * Copyright: MontaVista Software Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12static inline void arch_idle(void)
13{
14 cpu_do_idle();
15}
diff --git a/arch/arm/mach-realview/core.h b/arch/arm/mach-realview/core.h
index 735b57aaf2d..f8f2c0ac4c0 100644
--- a/arch/arm/mach-realview/core.h
+++ b/arch/arm/mach-realview/core.h
@@ -28,21 +28,11 @@
28#include <asm/setup.h> 28#include <asm/setup.h>
29#include <asm/leds.h> 29#include <asm/leds.h>
30 30
31#define AMBA_DEVICE(name,busid,base,plat) \ 31#define APB_DEVICE(name, busid, base, plat) \
32static struct amba_device name##_device = { \ 32static AMBA_APB_DEVICE(name, busid, 0, REALVIEW_##base##_BASE, base##_IRQ, plat)
33 .dev = { \ 33
34 .coherent_dma_mask = ~0, \ 34#define AHB_DEVICE(name, busid, base, plat) \
35 .init_name = busid, \ 35static AMBA_AHB_DEVICE(name, busid, 0, REALVIEW_##base##_BASE, base##_IRQ, plat)
36 .platform_data = plat, \
37 }, \
38 .res = { \
39 .start = REALVIEW_##base##_BASE, \
40 .end = (REALVIEW_##base##_BASE) + SZ_4K - 1, \
41 .flags = IORESOURCE_MEM, \
42 }, \
43 .dma_mask = ~0, \
44 .irq = base##_IRQ, \
45}
46 36
47struct machine_desc; 37struct machine_desc;
48 38
diff --git a/arch/arm/mach-realview/include/mach/entry-macro.S b/arch/arm/mach-realview/include/mach/entry-macro.S
deleted file mode 100644
index e8a5179c265..00000000000
--- a/arch/arm/mach-realview/include/mach/entry-macro.S
+++ /dev/null
@@ -1,16 +0,0 @@
1/*
2 * arch/arm/mach-realview/include/mach/entry-macro.S
3 *
4 * Low-level IRQ helper macros for RealView platforms
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10
11 .macro disable_fiq
12 .endm
13
14 .macro arch_ret_to_user, tmp1, tmp2
15 .endm
16
diff --git a/arch/arm/mach-realview/include/mach/irqs-pb1176.h b/arch/arm/mach-realview/include/mach/irqs-pb1176.h
index 5c3c625e3e0..708f84156f2 100644
--- a/arch/arm/mach-realview/include/mach/irqs-pb1176.h
+++ b/arch/arm/mach-realview/include/mach/irqs-pb1176.h
@@ -40,6 +40,7 @@
40#define IRQ_DC1176_L2CC (IRQ_DC1176_GIC_START + 13) 40#define IRQ_DC1176_L2CC (IRQ_DC1176_GIC_START + 13)
41#define IRQ_DC1176_RTC (IRQ_DC1176_GIC_START + 14) 41#define IRQ_DC1176_RTC (IRQ_DC1176_GIC_START + 14)
42#define IRQ_DC1176_CLCD (IRQ_DC1176_GIC_START + 15) /* CLCD controller */ 42#define IRQ_DC1176_CLCD (IRQ_DC1176_GIC_START + 15) /* CLCD controller */
43#define IRQ_DC1176_GPIO0 (IRQ_DC1176_GIC_START + 16)
43#define IRQ_DC1176_SSP (IRQ_DC1176_GIC_START + 17) /* SSP port */ 44#define IRQ_DC1176_SSP (IRQ_DC1176_GIC_START + 17) /* SSP port */
44#define IRQ_DC1176_UART0 (IRQ_DC1176_GIC_START + 18) /* UART 0 on development chip */ 45#define IRQ_DC1176_UART0 (IRQ_DC1176_GIC_START + 18) /* UART 0 on development chip */
45#define IRQ_DC1176_UART1 (IRQ_DC1176_GIC_START + 19) /* UART 1 on development chip */ 46#define IRQ_DC1176_UART1 (IRQ_DC1176_GIC_START + 19) /* UART 1 on development chip */
@@ -73,7 +74,6 @@
73#define IRQ_PB1176_DMAC (IRQ_PB1176_GIC_START + 24) /* DMA controller */ 74#define IRQ_PB1176_DMAC (IRQ_PB1176_GIC_START + 24) /* DMA controller */
74#define IRQ_PB1176_RTC (IRQ_PB1176_GIC_START + 25) /* Real Time Clock */ 75#define IRQ_PB1176_RTC (IRQ_PB1176_GIC_START + 25) /* Real Time Clock */
75 76
76#define IRQ_PB1176_GPIO0 -1
77#define IRQ_PB1176_SCTL -1 77#define IRQ_PB1176_SCTL -1
78 78
79#define NR_GIC_PB1176 2 79#define NR_GIC_PB1176 2
diff --git a/arch/arm/mach-realview/include/mach/system.h b/arch/arm/mach-realview/include/mach/system.h
deleted file mode 100644
index 471b671159c..00000000000
--- a/arch/arm/mach-realview/include/mach/system.h
+++ /dev/null
@@ -1,33 +0,0 @@
1/*
2 * arch/arm/mach-realview/include/mach/system.h
3 *
4 * Copyright (C) 2003 ARM Limited
5 * Copyright (C) 2000 Deep Blue Solutions Ltd
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21#ifndef __ASM_ARCH_SYSTEM_H
22#define __ASM_ARCH_SYSTEM_H
23
24static inline void arch_idle(void)
25{
26 /*
27 * This should do all the clock switching
28 * and wait for interrupt tricks
29 */
30 cpu_do_idle();
31}
32
33#endif
diff --git a/arch/arm/mach-realview/realview_eb.c b/arch/arm/mach-realview/realview_eb.c
index 9578145f2df..157e1bc6e83 100644
--- a/arch/arm/mach-realview/realview_eb.c
+++ b/arch/arm/mach-realview/realview_eb.c
@@ -135,63 +135,63 @@ static struct pl022_ssp_controller ssp0_plat_data = {
135/* 135/*
136 * These devices are connected via the core APB bridge 136 * These devices are connected via the core APB bridge
137 */ 137 */
138#define GPIO2_IRQ { IRQ_EB_GPIO2, NO_IRQ } 138#define GPIO2_IRQ { IRQ_EB_GPIO2 }
139#define GPIO3_IRQ { IRQ_EB_GPIO3, NO_IRQ } 139#define GPIO3_IRQ { IRQ_EB_GPIO3 }
140 140
141#define AACI_IRQ { IRQ_EB_AACI, NO_IRQ } 141#define AACI_IRQ { IRQ_EB_AACI }
142#define MMCI0_IRQ { IRQ_EB_MMCI0A, IRQ_EB_MMCI0B } 142#define MMCI0_IRQ { IRQ_EB_MMCI0A, IRQ_EB_MMCI0B }
143#define KMI0_IRQ { IRQ_EB_KMI0, NO_IRQ } 143#define KMI0_IRQ { IRQ_EB_KMI0 }
144#define KMI1_IRQ { IRQ_EB_KMI1, NO_IRQ } 144#define KMI1_IRQ { IRQ_EB_KMI1 }
145 145
146/* 146/*
147 * These devices are connected directly to the multi-layer AHB switch 147 * These devices are connected directly to the multi-layer AHB switch
148 */ 148 */
149#define EB_SMC_IRQ { NO_IRQ, NO_IRQ } 149#define EB_SMC_IRQ { }
150#define MPMC_IRQ { NO_IRQ, NO_IRQ } 150#define MPMC_IRQ { }
151#define EB_CLCD_IRQ { IRQ_EB_CLCD, NO_IRQ } 151#define EB_CLCD_IRQ { IRQ_EB_CLCD }
152#define DMAC_IRQ { IRQ_EB_DMA, NO_IRQ } 152#define DMAC_IRQ { IRQ_EB_DMA }
153 153
154/* 154/*
155 * These devices are connected via the core APB bridge 155 * These devices are connected via the core APB bridge
156 */ 156 */
157#define SCTL_IRQ { NO_IRQ, NO_IRQ } 157#define SCTL_IRQ { }
158#define EB_WATCHDOG_IRQ { IRQ_EB_WDOG, NO_IRQ } 158#define EB_WATCHDOG_IRQ { IRQ_EB_WDOG }
159#define EB_GPIO0_IRQ { IRQ_EB_GPIO0, NO_IRQ } 159#define EB_GPIO0_IRQ { IRQ_EB_GPIO0 }
160#define GPIO1_IRQ { IRQ_EB_GPIO1, NO_IRQ } 160#define GPIO1_IRQ { IRQ_EB_GPIO1 }
161#define EB_RTC_IRQ { IRQ_EB_RTC, NO_IRQ } 161#define EB_RTC_IRQ { IRQ_EB_RTC }
162 162
163/* 163/*
164 * These devices are connected via the DMA APB bridge 164 * These devices are connected via the DMA APB bridge
165 */ 165 */
166#define SCI_IRQ { IRQ_EB_SCI, NO_IRQ } 166#define SCI_IRQ { IRQ_EB_SCI }
167#define EB_UART0_IRQ { IRQ_EB_UART0, NO_IRQ } 167#define EB_UART0_IRQ { IRQ_EB_UART0 }
168#define EB_UART1_IRQ { IRQ_EB_UART1, NO_IRQ } 168#define EB_UART1_IRQ { IRQ_EB_UART1 }
169#define EB_UART2_IRQ { IRQ_EB_UART2, NO_IRQ } 169#define EB_UART2_IRQ { IRQ_EB_UART2 }
170#define EB_UART3_IRQ { IRQ_EB_UART3, NO_IRQ } 170#define EB_UART3_IRQ { IRQ_EB_UART3 }
171#define EB_SSP_IRQ { IRQ_EB_SSP, NO_IRQ } 171#define EB_SSP_IRQ { IRQ_EB_SSP }
172 172
173/* FPGA Primecells */ 173/* FPGA Primecells */
174AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL); 174APB_DEVICE(aaci, "fpga:aaci", AACI, NULL);
175AMBA_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data); 175APB_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data);
176AMBA_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL); 176APB_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL);
177AMBA_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL); 177APB_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL);
178AMBA_DEVICE(uart3, "fpga:uart3", EB_UART3, NULL); 178APB_DEVICE(uart3, "fpga:uart3", EB_UART3, NULL);
179 179
180/* DevChip Primecells */ 180/* DevChip Primecells */
181AMBA_DEVICE(smc, "dev:smc", EB_SMC, NULL); 181AHB_DEVICE(smc, "dev:smc", EB_SMC, NULL);
182AMBA_DEVICE(clcd, "dev:clcd", EB_CLCD, &clcd_plat_data); 182AHB_DEVICE(clcd, "dev:clcd", EB_CLCD, &clcd_plat_data);
183AMBA_DEVICE(dmac, "dev:dmac", DMAC, NULL); 183AHB_DEVICE(dmac, "dev:dmac", DMAC, NULL);
184AMBA_DEVICE(sctl, "dev:sctl", SCTL, NULL); 184AHB_DEVICE(sctl, "dev:sctl", SCTL, NULL);
185AMBA_DEVICE(wdog, "dev:wdog", EB_WATCHDOG, NULL); 185APB_DEVICE(wdog, "dev:wdog", EB_WATCHDOG, NULL);
186AMBA_DEVICE(gpio0, "dev:gpio0", EB_GPIO0, &gpio0_plat_data); 186APB_DEVICE(gpio0, "dev:gpio0", EB_GPIO0, &gpio0_plat_data);
187AMBA_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data); 187APB_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data);
188AMBA_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data); 188APB_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data);
189AMBA_DEVICE(rtc, "dev:rtc", EB_RTC, NULL); 189APB_DEVICE(rtc, "dev:rtc", EB_RTC, NULL);
190AMBA_DEVICE(sci0, "dev:sci0", SCI, NULL); 190APB_DEVICE(sci0, "dev:sci0", SCI, NULL);
191AMBA_DEVICE(uart0, "dev:uart0", EB_UART0, NULL); 191APB_DEVICE(uart0, "dev:uart0", EB_UART0, NULL);
192AMBA_DEVICE(uart1, "dev:uart1", EB_UART1, NULL); 192APB_DEVICE(uart1, "dev:uart1", EB_UART1, NULL);
193AMBA_DEVICE(uart2, "dev:uart2", EB_UART2, NULL); 193APB_DEVICE(uart2, "dev:uart2", EB_UART2, NULL);
194AMBA_DEVICE(ssp0, "dev:ssp0", EB_SSP, &ssp0_plat_data); 194APB_DEVICE(ssp0, "dev:ssp0", EB_SSP, &ssp0_plat_data);
195 195
196static struct amba_device *amba_devs[] __initdata = { 196static struct amba_device *amba_devs[] __initdata = {
197 &dmac_device, 197 &dmac_device,
diff --git a/arch/arm/mach-realview/realview_pb1176.c b/arch/arm/mach-realview/realview_pb1176.c
index e4abe94fb11..b1d7cafa1a6 100644
--- a/arch/arm/mach-realview/realview_pb1176.c
+++ b/arch/arm/mach-realview/realview_pb1176.c
@@ -132,50 +132,50 @@ static struct pl022_ssp_controller ssp0_plat_data = {
132/* 132/*
133 * RealView PB1176 AMBA devices 133 * RealView PB1176 AMBA devices
134 */ 134 */
135#define GPIO2_IRQ { IRQ_PB1176_GPIO2, NO_IRQ } 135#define GPIO2_IRQ { IRQ_PB1176_GPIO2 }
136#define GPIO3_IRQ { IRQ_PB1176_GPIO3, NO_IRQ } 136#define GPIO3_IRQ { IRQ_PB1176_GPIO3 }
137#define AACI_IRQ { IRQ_PB1176_AACI, NO_IRQ } 137#define AACI_IRQ { IRQ_PB1176_AACI }
138#define MMCI0_IRQ { IRQ_PB1176_MMCI0A, IRQ_PB1176_MMCI0B } 138#define MMCI0_IRQ { IRQ_PB1176_MMCI0A, IRQ_PB1176_MMCI0B }
139#define KMI0_IRQ { IRQ_PB1176_KMI0, NO_IRQ } 139#define KMI0_IRQ { IRQ_PB1176_KMI0 }
140#define KMI1_IRQ { IRQ_PB1176_KMI1, NO_IRQ } 140#define KMI1_IRQ { IRQ_PB1176_KMI1 }
141#define PB1176_SMC_IRQ { NO_IRQ, NO_IRQ } 141#define PB1176_SMC_IRQ { }
142#define MPMC_IRQ { NO_IRQ, NO_IRQ } 142#define MPMC_IRQ { }
143#define PB1176_CLCD_IRQ { IRQ_DC1176_CLCD, NO_IRQ } 143#define PB1176_CLCD_IRQ { IRQ_DC1176_CLCD }
144#define SCTL_IRQ { NO_IRQ, NO_IRQ } 144#define SCTL_IRQ { }
145#define PB1176_WATCHDOG_IRQ { IRQ_DC1176_WATCHDOG, NO_IRQ } 145#define PB1176_WATCHDOG_IRQ { IRQ_DC1176_WATCHDOG }
146#define PB1176_GPIO0_IRQ { IRQ_PB1176_GPIO0, NO_IRQ } 146#define PB1176_GPIO0_IRQ { IRQ_DC1176_GPIO0 }
147#define GPIO1_IRQ { IRQ_PB1176_GPIO1, NO_IRQ } 147#define GPIO1_IRQ { IRQ_PB1176_GPIO1 }
148#define PB1176_RTC_IRQ { IRQ_DC1176_RTC, NO_IRQ } 148#define PB1176_RTC_IRQ { IRQ_DC1176_RTC }
149#define SCI_IRQ { IRQ_PB1176_SCI, NO_IRQ } 149#define SCI_IRQ { IRQ_PB1176_SCI }
150#define PB1176_UART0_IRQ { IRQ_DC1176_UART0, NO_IRQ } 150#define PB1176_UART0_IRQ { IRQ_DC1176_UART0 }
151#define PB1176_UART1_IRQ { IRQ_DC1176_UART1, NO_IRQ } 151#define PB1176_UART1_IRQ { IRQ_DC1176_UART1 }
152#define PB1176_UART2_IRQ { IRQ_DC1176_UART2, NO_IRQ } 152#define PB1176_UART2_IRQ { IRQ_DC1176_UART2 }
153#define PB1176_UART3_IRQ { IRQ_DC1176_UART3, NO_IRQ } 153#define PB1176_UART3_IRQ { IRQ_DC1176_UART3 }
154#define PB1176_UART4_IRQ { IRQ_PB1176_UART4, NO_IRQ } 154#define PB1176_UART4_IRQ { IRQ_PB1176_UART4 }
155#define PB1176_SSP_IRQ { IRQ_DC1176_SSP, NO_IRQ } 155#define PB1176_SSP_IRQ { IRQ_DC1176_SSP }
156 156
157/* FPGA Primecells */ 157/* FPGA Primecells */
158AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL); 158APB_DEVICE(aaci, "fpga:aaci", AACI, NULL);
159AMBA_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data); 159APB_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data);
160AMBA_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL); 160APB_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL);
161AMBA_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL); 161APB_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL);
162AMBA_DEVICE(uart4, "fpga:uart4", PB1176_UART4, NULL); 162APB_DEVICE(uart4, "fpga:uart4", PB1176_UART4, NULL);
163 163
164/* DevChip Primecells */ 164/* DevChip Primecells */
165AMBA_DEVICE(smc, "dev:smc", PB1176_SMC, NULL); 165AHB_DEVICE(smc, "dev:smc", PB1176_SMC, NULL);
166AMBA_DEVICE(sctl, "dev:sctl", SCTL, NULL); 166AHB_DEVICE(sctl, "dev:sctl", SCTL, NULL);
167AMBA_DEVICE(wdog, "dev:wdog", PB1176_WATCHDOG, NULL); 167APB_DEVICE(wdog, "dev:wdog", PB1176_WATCHDOG, NULL);
168AMBA_DEVICE(gpio0, "dev:gpio0", PB1176_GPIO0, &gpio0_plat_data); 168APB_DEVICE(gpio0, "dev:gpio0", PB1176_GPIO0, &gpio0_plat_data);
169AMBA_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data); 169APB_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data);
170AMBA_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data); 170APB_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data);
171AMBA_DEVICE(rtc, "dev:rtc", PB1176_RTC, NULL); 171APB_DEVICE(rtc, "dev:rtc", PB1176_RTC, NULL);
172AMBA_DEVICE(sci0, "dev:sci0", SCI, NULL); 172APB_DEVICE(sci0, "dev:sci0", SCI, NULL);
173AMBA_DEVICE(uart0, "dev:uart0", PB1176_UART0, NULL); 173APB_DEVICE(uart0, "dev:uart0", PB1176_UART0, NULL);
174AMBA_DEVICE(uart1, "dev:uart1", PB1176_UART1, NULL); 174APB_DEVICE(uart1, "dev:uart1", PB1176_UART1, NULL);
175AMBA_DEVICE(uart2, "dev:uart2", PB1176_UART2, NULL); 175APB_DEVICE(uart2, "dev:uart2", PB1176_UART2, NULL);
176AMBA_DEVICE(uart3, "dev:uart3", PB1176_UART3, NULL); 176APB_DEVICE(uart3, "dev:uart3", PB1176_UART3, NULL);
177AMBA_DEVICE(ssp0, "dev:ssp0", PB1176_SSP, &ssp0_plat_data); 177APB_DEVICE(ssp0, "dev:ssp0", PB1176_SSP, &ssp0_plat_data);
178AMBA_DEVICE(clcd, "dev:clcd", PB1176_CLCD, &clcd_plat_data); 178AHB_DEVICE(clcd, "dev:clcd", PB1176_CLCD, &clcd_plat_data);
179 179
180static struct amba_device *amba_devs[] __initdata = { 180static struct amba_device *amba_devs[] __initdata = {
181 &uart0_device, 181 &uart0_device,
diff --git a/arch/arm/mach-realview/realview_pb11mp.c b/arch/arm/mach-realview/realview_pb11mp.c
index 2147335f66f..ae7fe54f6eb 100644
--- a/arch/arm/mach-realview/realview_pb11mp.c
+++ b/arch/arm/mach-realview/realview_pb11mp.c
@@ -127,52 +127,52 @@ static struct pl022_ssp_controller ssp0_plat_data = {
127 * RealView PB11MPCore AMBA devices 127 * RealView PB11MPCore AMBA devices
128 */ 128 */
129 129
130#define GPIO2_IRQ { IRQ_PB11MP_GPIO2, NO_IRQ } 130#define GPIO2_IRQ { IRQ_PB11MP_GPIO2 }
131#define GPIO3_IRQ { IRQ_PB11MP_GPIO3, NO_IRQ } 131#define GPIO3_IRQ { IRQ_PB11MP_GPIO3 }
132#define AACI_IRQ { IRQ_TC11MP_AACI, NO_IRQ } 132#define AACI_IRQ { IRQ_TC11MP_AACI }
133#define MMCI0_IRQ { IRQ_TC11MP_MMCI0A, IRQ_TC11MP_MMCI0B } 133#define MMCI0_IRQ { IRQ_TC11MP_MMCI0A, IRQ_TC11MP_MMCI0B }
134#define KMI0_IRQ { IRQ_TC11MP_KMI0, NO_IRQ } 134#define KMI0_IRQ { IRQ_TC11MP_KMI0 }
135#define KMI1_IRQ { IRQ_TC11MP_KMI1, NO_IRQ } 135#define KMI1_IRQ { IRQ_TC11MP_KMI1 }
136#define PB11MP_SMC_IRQ { NO_IRQ, NO_IRQ } 136#define PB11MP_SMC_IRQ { }
137#define MPMC_IRQ { NO_IRQ, NO_IRQ } 137#define MPMC_IRQ { }
138#define PB11MP_CLCD_IRQ { IRQ_PB11MP_CLCD, NO_IRQ } 138#define PB11MP_CLCD_IRQ { IRQ_PB11MP_CLCD }
139#define DMAC_IRQ { IRQ_PB11MP_DMAC, NO_IRQ } 139#define DMAC_IRQ { IRQ_PB11MP_DMAC }
140#define SCTL_IRQ { NO_IRQ, NO_IRQ } 140#define SCTL_IRQ { }
141#define PB11MP_WATCHDOG_IRQ { IRQ_PB11MP_WATCHDOG, NO_IRQ } 141#define PB11MP_WATCHDOG_IRQ { IRQ_PB11MP_WATCHDOG }
142#define PB11MP_GPIO0_IRQ { IRQ_PB11MP_GPIO0, NO_IRQ } 142#define PB11MP_GPIO0_IRQ { IRQ_PB11MP_GPIO0 }
143#define GPIO1_IRQ { IRQ_PB11MP_GPIO1, NO_IRQ } 143#define GPIO1_IRQ { IRQ_PB11MP_GPIO1 }
144#define PB11MP_RTC_IRQ { IRQ_TC11MP_RTC, NO_IRQ } 144#define PB11MP_RTC_IRQ { IRQ_TC11MP_RTC }
145#define SCI_IRQ { IRQ_PB11MP_SCI, NO_IRQ } 145#define SCI_IRQ { IRQ_PB11MP_SCI }
146#define PB11MP_UART0_IRQ { IRQ_TC11MP_UART0, NO_IRQ } 146#define PB11MP_UART0_IRQ { IRQ_TC11MP_UART0 }
147#define PB11MP_UART1_IRQ { IRQ_TC11MP_UART1, NO_IRQ } 147#define PB11MP_UART1_IRQ { IRQ_TC11MP_UART1 }
148#define PB11MP_UART2_IRQ { IRQ_PB11MP_UART2, NO_IRQ } 148#define PB11MP_UART2_IRQ { IRQ_PB11MP_UART2 }
149#define PB11MP_UART3_IRQ { IRQ_PB11MP_UART3, NO_IRQ } 149#define PB11MP_UART3_IRQ { IRQ_PB11MP_UART3 }
150#define PB11MP_SSP_IRQ { IRQ_PB11MP_SSP, NO_IRQ } 150#define PB11MP_SSP_IRQ { IRQ_PB11MP_SSP }
151 151
152/* FPGA Primecells */ 152/* FPGA Primecells */
153AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL); 153APB_DEVICE(aaci, "fpga:aaci", AACI, NULL);
154AMBA_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data); 154APB_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data);
155AMBA_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL); 155APB_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL);
156AMBA_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL); 156APB_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL);
157AMBA_DEVICE(uart3, "fpga:uart3", PB11MP_UART3, NULL); 157APB_DEVICE(uart3, "fpga:uart3", PB11MP_UART3, NULL);
158 158
159/* DevChip Primecells */ 159/* DevChip Primecells */
160AMBA_DEVICE(smc, "dev:smc", PB11MP_SMC, NULL); 160AHB_DEVICE(smc, "dev:smc", PB11MP_SMC, NULL);
161AMBA_DEVICE(sctl, "dev:sctl", SCTL, NULL); 161AHB_DEVICE(sctl, "dev:sctl", SCTL, NULL);
162AMBA_DEVICE(wdog, "dev:wdog", PB11MP_WATCHDOG, NULL); 162APB_DEVICE(wdog, "dev:wdog", PB11MP_WATCHDOG, NULL);
163AMBA_DEVICE(gpio0, "dev:gpio0", PB11MP_GPIO0, &gpio0_plat_data); 163APB_DEVICE(gpio0, "dev:gpio0", PB11MP_GPIO0, &gpio0_plat_data);
164AMBA_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data); 164APB_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data);
165AMBA_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data); 165APB_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data);
166AMBA_DEVICE(rtc, "dev:rtc", PB11MP_RTC, NULL); 166APB_DEVICE(rtc, "dev:rtc", PB11MP_RTC, NULL);
167AMBA_DEVICE(sci0, "dev:sci0", SCI, NULL); 167APB_DEVICE(sci0, "dev:sci0", SCI, NULL);
168AMBA_DEVICE(uart0, "dev:uart0", PB11MP_UART0, NULL); 168APB_DEVICE(uart0, "dev:uart0", PB11MP_UART0, NULL);
169AMBA_DEVICE(uart1, "dev:uart1", PB11MP_UART1, NULL); 169APB_DEVICE(uart1, "dev:uart1", PB11MP_UART1, NULL);
170AMBA_DEVICE(uart2, "dev:uart2", PB11MP_UART2, NULL); 170APB_DEVICE(uart2, "dev:uart2", PB11MP_UART2, NULL);
171AMBA_DEVICE(ssp0, "dev:ssp0", PB11MP_SSP, &ssp0_plat_data); 171APB_DEVICE(ssp0, "dev:ssp0", PB11MP_SSP, &ssp0_plat_data);
172 172
173/* Primecells on the NEC ISSP chip */ 173/* Primecells on the NEC ISSP chip */
174AMBA_DEVICE(clcd, "issp:clcd", PB11MP_CLCD, &clcd_plat_data); 174AHB_DEVICE(clcd, "issp:clcd", PB11MP_CLCD, &clcd_plat_data);
175AMBA_DEVICE(dmac, "issp:dmac", DMAC, NULL); 175AHB_DEVICE(dmac, "issp:dmac", DMAC, NULL);
176 176
177static struct amba_device *amba_devs[] __initdata = { 177static struct amba_device *amba_devs[] __initdata = {
178 &dmac_device, 178 &dmac_device,
diff --git a/arch/arm/mach-realview/realview_pba8.c b/arch/arm/mach-realview/realview_pba8.c
index 25b2e59296f..59650174e6e 100644
--- a/arch/arm/mach-realview/realview_pba8.c
+++ b/arch/arm/mach-realview/realview_pba8.c
@@ -122,52 +122,52 @@ static struct pl022_ssp_controller ssp0_plat_data = {
122 * RealView PBA8Core AMBA devices 122 * RealView PBA8Core AMBA devices
123 */ 123 */
124 124
125#define GPIO2_IRQ { IRQ_PBA8_GPIO2, NO_IRQ } 125#define GPIO2_IRQ { IRQ_PBA8_GPIO2 }
126#define GPIO3_IRQ { IRQ_PBA8_GPIO3, NO_IRQ } 126#define GPIO3_IRQ { IRQ_PBA8_GPIO3 }
127#define AACI_IRQ { IRQ_PBA8_AACI, NO_IRQ } 127#define AACI_IRQ { IRQ_PBA8_AACI }
128#define MMCI0_IRQ { IRQ_PBA8_MMCI0A, IRQ_PBA8_MMCI0B } 128#define MMCI0_IRQ { IRQ_PBA8_MMCI0A, IRQ_PBA8_MMCI0B }
129#define KMI0_IRQ { IRQ_PBA8_KMI0, NO_IRQ } 129#define KMI0_IRQ { IRQ_PBA8_KMI0 }
130#define KMI1_IRQ { IRQ_PBA8_KMI1, NO_IRQ } 130#define KMI1_IRQ { IRQ_PBA8_KMI1 }
131#define PBA8_SMC_IRQ { NO_IRQ, NO_IRQ } 131#define PBA8_SMC_IRQ { }
132#define MPMC_IRQ { NO_IRQ, NO_IRQ } 132#define MPMC_IRQ { }
133#define PBA8_CLCD_IRQ { IRQ_PBA8_CLCD, NO_IRQ } 133#define PBA8_CLCD_IRQ { IRQ_PBA8_CLCD }
134#define DMAC_IRQ { IRQ_PBA8_DMAC, NO_IRQ } 134#define DMAC_IRQ { IRQ_PBA8_DMAC }
135#define SCTL_IRQ { NO_IRQ, NO_IRQ } 135#define SCTL_IRQ { }
136#define PBA8_WATCHDOG_IRQ { IRQ_PBA8_WATCHDOG, NO_IRQ } 136#define PBA8_WATCHDOG_IRQ { IRQ_PBA8_WATCHDOG }
137#define PBA8_GPIO0_IRQ { IRQ_PBA8_GPIO0, NO_IRQ } 137#define PBA8_GPIO0_IRQ { IRQ_PBA8_GPIO0 }
138#define GPIO1_IRQ { IRQ_PBA8_GPIO1, NO_IRQ } 138#define GPIO1_IRQ { IRQ_PBA8_GPIO1 }
139#define PBA8_RTC_IRQ { IRQ_PBA8_RTC, NO_IRQ } 139#define PBA8_RTC_IRQ { IRQ_PBA8_RTC }
140#define SCI_IRQ { IRQ_PBA8_SCI, NO_IRQ } 140#define SCI_IRQ { IRQ_PBA8_SCI }
141#define PBA8_UART0_IRQ { IRQ_PBA8_UART0, NO_IRQ } 141#define PBA8_UART0_IRQ { IRQ_PBA8_UART0 }
142#define PBA8_UART1_IRQ { IRQ_PBA8_UART1, NO_IRQ } 142#define PBA8_UART1_IRQ { IRQ_PBA8_UART1 }
143#define PBA8_UART2_IRQ { IRQ_PBA8_UART2, NO_IRQ } 143#define PBA8_UART2_IRQ { IRQ_PBA8_UART2 }
144#define PBA8_UART3_IRQ { IRQ_PBA8_UART3, NO_IRQ } 144#define PBA8_UART3_IRQ { IRQ_PBA8_UART3 }
145#define PBA8_SSP_IRQ { IRQ_PBA8_SSP, NO_IRQ } 145#define PBA8_SSP_IRQ { IRQ_PBA8_SSP }
146 146
147/* FPGA Primecells */ 147/* FPGA Primecells */
148AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL); 148APB_DEVICE(aaci, "fpga:aaci", AACI, NULL);
149AMBA_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data); 149APB_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data);
150AMBA_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL); 150APB_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL);
151AMBA_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL); 151APB_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL);
152AMBA_DEVICE(uart3, "fpga:uart3", PBA8_UART3, NULL); 152APB_DEVICE(uart3, "fpga:uart3", PBA8_UART3, NULL);
153 153
154/* DevChip Primecells */ 154/* DevChip Primecells */
155AMBA_DEVICE(smc, "dev:smc", PBA8_SMC, NULL); 155AHB_DEVICE(smc, "dev:smc", PBA8_SMC, NULL);
156AMBA_DEVICE(sctl, "dev:sctl", SCTL, NULL); 156AHB_DEVICE(sctl, "dev:sctl", SCTL, NULL);
157AMBA_DEVICE(wdog, "dev:wdog", PBA8_WATCHDOG, NULL); 157APB_DEVICE(wdog, "dev:wdog", PBA8_WATCHDOG, NULL);
158AMBA_DEVICE(gpio0, "dev:gpio0", PBA8_GPIO0, &gpio0_plat_data); 158APB_DEVICE(gpio0, "dev:gpio0", PBA8_GPIO0, &gpio0_plat_data);
159AMBA_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data); 159APB_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data);
160AMBA_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data); 160APB_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data);
161AMBA_DEVICE(rtc, "dev:rtc", PBA8_RTC, NULL); 161APB_DEVICE(rtc, "dev:rtc", PBA8_RTC, NULL);
162AMBA_DEVICE(sci0, "dev:sci0", SCI, NULL); 162APB_DEVICE(sci0, "dev:sci0", SCI, NULL);
163AMBA_DEVICE(uart0, "dev:uart0", PBA8_UART0, NULL); 163APB_DEVICE(uart0, "dev:uart0", PBA8_UART0, NULL);
164AMBA_DEVICE(uart1, "dev:uart1", PBA8_UART1, NULL); 164APB_DEVICE(uart1, "dev:uart1", PBA8_UART1, NULL);
165AMBA_DEVICE(uart2, "dev:uart2", PBA8_UART2, NULL); 165APB_DEVICE(uart2, "dev:uart2", PBA8_UART2, NULL);
166AMBA_DEVICE(ssp0, "dev:ssp0", PBA8_SSP, &ssp0_plat_data); 166APB_DEVICE(ssp0, "dev:ssp0", PBA8_SSP, &ssp0_plat_data);
167 167
168/* Primecells on the NEC ISSP chip */ 168/* Primecells on the NEC ISSP chip */
169AMBA_DEVICE(clcd, "issp:clcd", PBA8_CLCD, &clcd_plat_data); 169AHB_DEVICE(clcd, "issp:clcd", PBA8_CLCD, &clcd_plat_data);
170AMBA_DEVICE(dmac, "issp:dmac", DMAC, NULL); 170AHB_DEVICE(dmac, "issp:dmac", DMAC, NULL);
171 171
172static struct amba_device *amba_devs[] __initdata = { 172static struct amba_device *amba_devs[] __initdata = {
173 &dmac_device, 173 &dmac_device,
diff --git a/arch/arm/mach-realview/realview_pbx.c b/arch/arm/mach-realview/realview_pbx.c
index ac715645b86..1cd9956f587 100644
--- a/arch/arm/mach-realview/realview_pbx.c
+++ b/arch/arm/mach-realview/realview_pbx.c
@@ -144,52 +144,52 @@ static struct pl022_ssp_controller ssp0_plat_data = {
144 * RealView PBXCore AMBA devices 144 * RealView PBXCore AMBA devices
145 */ 145 */
146 146
147#define GPIO2_IRQ { IRQ_PBX_GPIO2, NO_IRQ } 147#define GPIO2_IRQ { IRQ_PBX_GPIO2 }
148#define GPIO3_IRQ { IRQ_PBX_GPIO3, NO_IRQ } 148#define GPIO3_IRQ { IRQ_PBX_GPIO3 }
149#define AACI_IRQ { IRQ_PBX_AACI, NO_IRQ } 149#define AACI_IRQ { IRQ_PBX_AACI }
150#define MMCI0_IRQ { IRQ_PBX_MMCI0A, IRQ_PBX_MMCI0B } 150#define MMCI0_IRQ { IRQ_PBX_MMCI0A, IRQ_PBX_MMCI0B }
151#define KMI0_IRQ { IRQ_PBX_KMI0, NO_IRQ } 151#define KMI0_IRQ { IRQ_PBX_KMI0 }
152#define KMI1_IRQ { IRQ_PBX_KMI1, NO_IRQ } 152#define KMI1_IRQ { IRQ_PBX_KMI1 }
153#define PBX_SMC_IRQ { NO_IRQ, NO_IRQ } 153#define PBX_SMC_IRQ { }
154#define MPMC_IRQ { NO_IRQ, NO_IRQ } 154#define MPMC_IRQ { }
155#define PBX_CLCD_IRQ { IRQ_PBX_CLCD, NO_IRQ } 155#define PBX_CLCD_IRQ { IRQ_PBX_CLCD }
156#define DMAC_IRQ { IRQ_PBX_DMAC, NO_IRQ } 156#define DMAC_IRQ { IRQ_PBX_DMAC }
157#define SCTL_IRQ { NO_IRQ, NO_IRQ } 157#define SCTL_IRQ { }
158#define PBX_WATCHDOG_IRQ { IRQ_PBX_WATCHDOG, NO_IRQ } 158#define PBX_WATCHDOG_IRQ { IRQ_PBX_WATCHDOG }
159#define PBX_GPIO0_IRQ { IRQ_PBX_GPIO0, NO_IRQ } 159#define PBX_GPIO0_IRQ { IRQ_PBX_GPIO0 }
160#define GPIO1_IRQ { IRQ_PBX_GPIO1, NO_IRQ } 160#define GPIO1_IRQ { IRQ_PBX_GPIO1 }
161#define PBX_RTC_IRQ { IRQ_PBX_RTC, NO_IRQ } 161#define PBX_RTC_IRQ { IRQ_PBX_RTC }
162#define SCI_IRQ { IRQ_PBX_SCI, NO_IRQ } 162#define SCI_IRQ { IRQ_PBX_SCI }
163#define PBX_UART0_IRQ { IRQ_PBX_UART0, NO_IRQ } 163#define PBX_UART0_IRQ { IRQ_PBX_UART0 }
164#define PBX_UART1_IRQ { IRQ_PBX_UART1, NO_IRQ } 164#define PBX_UART1_IRQ { IRQ_PBX_UART1 }
165#define PBX_UART2_IRQ { IRQ_PBX_UART2, NO_IRQ } 165#define PBX_UART2_IRQ { IRQ_PBX_UART2 }
166#define PBX_UART3_IRQ { IRQ_PBX_UART3, NO_IRQ } 166#define PBX_UART3_IRQ { IRQ_PBX_UART3 }
167#define PBX_SSP_IRQ { IRQ_PBX_SSP, NO_IRQ } 167#define PBX_SSP_IRQ { IRQ_PBX_SSP }
168 168
169/* FPGA Primecells */ 169/* FPGA Primecells */
170AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL); 170APB_DEVICE(aaci, "fpga:aaci", AACI, NULL);
171AMBA_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data); 171APB_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data);
172AMBA_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL); 172APB_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL);
173AMBA_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL); 173APB_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL);
174AMBA_DEVICE(uart3, "fpga:uart3", PBX_UART3, NULL); 174APB_DEVICE(uart3, "fpga:uart3", PBX_UART3, NULL);
175 175
176/* DevChip Primecells */ 176/* DevChip Primecells */
177AMBA_DEVICE(smc, "dev:smc", PBX_SMC, NULL); 177AHB_DEVICE(smc, "dev:smc", PBX_SMC, NULL);
178AMBA_DEVICE(sctl, "dev:sctl", SCTL, NULL); 178AHB_DEVICE(sctl, "dev:sctl", SCTL, NULL);
179AMBA_DEVICE(wdog, "dev:wdog", PBX_WATCHDOG, NULL); 179APB_DEVICE(wdog, "dev:wdog", PBX_WATCHDOG, NULL);
180AMBA_DEVICE(gpio0, "dev:gpio0", PBX_GPIO0, &gpio0_plat_data); 180APB_DEVICE(gpio0, "dev:gpio0", PBX_GPIO0, &gpio0_plat_data);
181AMBA_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data); 181APB_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data);
182AMBA_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data); 182APB_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data);
183AMBA_DEVICE(rtc, "dev:rtc", PBX_RTC, NULL); 183APB_DEVICE(rtc, "dev:rtc", PBX_RTC, NULL);
184AMBA_DEVICE(sci0, "dev:sci0", SCI, NULL); 184APB_DEVICE(sci0, "dev:sci0", SCI, NULL);
185AMBA_DEVICE(uart0, "dev:uart0", PBX_UART0, NULL); 185APB_DEVICE(uart0, "dev:uart0", PBX_UART0, NULL);
186AMBA_DEVICE(uart1, "dev:uart1", PBX_UART1, NULL); 186APB_DEVICE(uart1, "dev:uart1", PBX_UART1, NULL);
187AMBA_DEVICE(uart2, "dev:uart2", PBX_UART2, NULL); 187APB_DEVICE(uart2, "dev:uart2", PBX_UART2, NULL);
188AMBA_DEVICE(ssp0, "dev:ssp0", PBX_SSP, &ssp0_plat_data); 188APB_DEVICE(ssp0, "dev:ssp0", PBX_SSP, &ssp0_plat_data);
189 189
190/* Primecells on the NEC ISSP chip */ 190/* Primecells on the NEC ISSP chip */
191AMBA_DEVICE(clcd, "issp:clcd", PBX_CLCD, &clcd_plat_data); 191AHB_DEVICE(clcd, "issp:clcd", PBX_CLCD, &clcd_plat_data);
192AMBA_DEVICE(dmac, "issp:dmac", DMAC, NULL); 192AHB_DEVICE(dmac, "issp:dmac", DMAC, NULL);
193 193
194static struct amba_device *amba_devs[] __initdata = { 194static struct amba_device *amba_devs[] __initdata = {
195 &dmac_device, 195 &dmac_device,
diff --git a/arch/arm/mach-rpc/Makefile b/arch/arm/mach-rpc/Makefile
index aa77bc9efbb..dfa405c0cfd 100644
--- a/arch/arm/mach-rpc/Makefile
+++ b/arch/arm/mach-rpc/Makefile
@@ -4,7 +4,7 @@
4 4
5# Object file lists. 5# Object file lists.
6 6
7obj-y := dma.o irq.o riscpc.o 7obj-y := dma.o fiq.o irq.o riscpc.o
8obj-m := 8obj-m :=
9obj-n := 9obj-n :=
10obj- := 10obj- :=
diff --git a/arch/arm/mach-rpc/fiq.S b/arch/arm/mach-rpc/fiq.S
new file mode 100644
index 00000000000..48ddd57db16
--- /dev/null
+++ b/arch/arm/mach-rpc/fiq.S
@@ -0,0 +1,16 @@
1#include <linux/linkage.h>
2#include <asm/assembler.h>
3#include <mach/hardware.h>
4#include <mach/entry-macro.S>
5
6 .text
7
8 .global rpc_default_fiq_end
9ENTRY(rpc_default_fiq_start)
10 mov r12, #ioc_base_high
11 .if ioc_base_low
12 orr r12, r12, #ioc_base_low
13 .endif
14 strb r12, [r12, #0x38] @ Disable FIQ register
15 subs pc, lr, #4
16rpc_default_fiq_end:
diff --git a/arch/arm/mach-rpc/include/mach/entry-macro.S b/arch/arm/mach-rpc/include/mach/entry-macro.S
index 4e7e5414409..7178368d706 100644
--- a/arch/arm/mach-rpc/include/mach/entry-macro.S
+++ b/arch/arm/mach-rpc/include/mach/entry-macro.S
@@ -10,7 +10,3 @@
10 orr \base, \base, #ioc_base_low 10 orr \base, \base, #ioc_base_low
11 .endif 11 .endif
12 .endm 12 .endm
13
14 .macro arch_ret_to_user, tmp1, tmp2
15 .endm
16
diff --git a/arch/arm/mach-rpc/include/mach/system.h b/arch/arm/mach-rpc/include/mach/system.h
deleted file mode 100644
index 359bab94b6a..00000000000
--- a/arch/arm/mach-rpc/include/mach/system.h
+++ /dev/null
@@ -1,13 +0,0 @@
1/*
2 * arch/arm/mach-rpc/include/mach/system.h
3 *
4 * Copyright (C) 1996-1999 Russell King.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10static inline void arch_idle(void)
11{
12 cpu_do_idle();
13}
diff --git a/arch/arm/mach-rpc/irq.c b/arch/arm/mach-rpc/irq.c
index 2e1b5309fba..cf0e669eaf1 100644
--- a/arch/arm/mach-rpc/irq.c
+++ b/arch/arm/mach-rpc/irq.c
@@ -5,6 +5,7 @@
5#include <asm/mach/irq.h> 5#include <asm/mach/irq.h>
6#include <asm/hardware/iomd.h> 6#include <asm/hardware/iomd.h>
7#include <asm/irq.h> 7#include <asm/irq.h>
8#include <asm/fiq.h>
8 9
9static void iomd_ack_irq_a(struct irq_data *d) 10static void iomd_ack_irq_a(struct irq_data *d)
10{ 11{
@@ -112,6 +113,8 @@ static struct irq_chip iomd_fiq_chip = {
112 .irq_unmask = iomd_unmask_irq_fiq, 113 .irq_unmask = iomd_unmask_irq_fiq,
113}; 114};
114 115
116extern unsigned char rpc_default_fiq_start, rpc_default_fiq_end;
117
115void __init rpc_init_irq(void) 118void __init rpc_init_irq(void)
116{ 119{
117 unsigned int irq, flags; 120 unsigned int irq, flags;
@@ -121,6 +124,9 @@ void __init rpc_init_irq(void)
121 iomd_writeb(0, IOMD_FIQMASK); 124 iomd_writeb(0, IOMD_FIQMASK);
122 iomd_writeb(0, IOMD_DMAMASK); 125 iomd_writeb(0, IOMD_DMAMASK);
123 126
127 set_fiq_handler(&rpc_default_fiq_start,
128 &rpc_default_fiq_end - &rpc_default_fiq_start);
129
124 for (irq = 0; irq < NR_IRQS; irq++) { 130 for (irq = 0; irq < NR_IRQS; irq++) {
125 flags = IRQF_VALID; 131 flags = IRQF_VALID;
126 132
diff --git a/arch/arm/mach-s3c2410/include/mach/entry-macro.S b/arch/arm/mach-s3c2410/include/mach/entry-macro.S
index 473b3cd37d9..7615a14773f 100644
--- a/arch/arm/mach-s3c2410/include/mach/entry-macro.S
+++ b/arch/arm/mach-s3c2410/include/mach/entry-macro.S
@@ -25,9 +25,6 @@
25 .macro get_irqnr_preamble, base, tmp 25 .macro get_irqnr_preamble, base, tmp
26 .endm 26 .endm
27 27
28 .macro arch_ret_to_user, tmp1, tmp2
29 .endm
30
31 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp 28 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
32 29
33 mov \base, #S3C24XX_VA_IRQ 30 mov \base, #S3C24XX_VA_IRQ
@@ -71,8 +68,3 @@
71 @@ exit here, Z flag unset if IRQ 68 @@ exit here, Z flag unset if IRQ
72 69
73 .endm 70 .endm
74
75 /* currently don't need an disable_fiq macro */
76
77 .macro disable_fiq
78 .endm
diff --git a/arch/arm/mach-s3c2410/include/mach/system.h b/arch/arm/mach-s3c2410/include/mach/system.h
deleted file mode 100644
index 5e215c1a5c8..00000000000
--- a/arch/arm/mach-s3c2410/include/mach/system.h
+++ /dev/null
@@ -1,54 +0,0 @@
1/* arch/arm/mach-s3c2410/include/mach/system.h
2 *
3 * Copyright (c) 2003 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * S3C2410 - System function defines and includes
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#include <linux/io.h>
14#include <mach/hardware.h>
15
16#include <mach/map.h>
17#include <mach/idle.h>
18
19#include <mach/regs-clock.h>
20
21void (*s3c24xx_idle)(void);
22
23void s3c24xx_default_idle(void)
24{
25 unsigned long tmp;
26 int i;
27
28 /* idle the system by using the idle mode which will wait for an
29 * interrupt to happen before restarting the system.
30 */
31
32 /* Warning: going into idle state upsets jtag scanning */
33
34 __raw_writel(__raw_readl(S3C2410_CLKCON) | S3C2410_CLKCON_IDLE,
35 S3C2410_CLKCON);
36
37 /* the samsung port seems to do a loop and then unset idle.. */
38 for (i = 0; i < 50; i++) {
39 tmp += __raw_readl(S3C2410_CLKCON); /* ensure loop not optimised out */
40 }
41
42 /* this bit is not cleared on re-start... */
43
44 __raw_writel(__raw_readl(S3C2410_CLKCON) & ~S3C2410_CLKCON_IDLE,
45 S3C2410_CLKCON);
46}
47
48static void arch_idle(void)
49{
50 if (s3c24xx_idle != NULL)
51 (s3c24xx_idle)();
52 else
53 s3c24xx_default_idle();
54}
diff --git a/arch/arm/mach-s3c2412/s3c2412.c b/arch/arm/mach-s3c2412/s3c2412.c
index aff6e85a97c..c6eac987109 100644
--- a/arch/arm/mach-s3c2412/s3c2412.c
+++ b/arch/arm/mach-s3c2412/s3c2412.c
@@ -32,8 +32,6 @@
32#include <asm/proc-fns.h> 32#include <asm/proc-fns.h>
33#include <asm/irq.h> 33#include <asm/irq.h>
34 34
35#include <mach/idle.h>
36
37#include <plat/cpu-freq.h> 35#include <plat/cpu-freq.h>
38 36
39#include <mach/regs-clock.h> 37#include <mach/regs-clock.h>
@@ -164,7 +162,7 @@ void __init s3c2412_map_io(void)
164 162
165 /* set our idle function */ 163 /* set our idle function */
166 164
167 s3c24xx_idle = s3c2412_idle; 165 arm_pm_idle = s3c2412_idle;
168 166
169 /* register our io-tables */ 167 /* register our io-tables */
170 168
diff --git a/arch/arm/mach-s3c2416/s3c2416.c b/arch/arm/mach-s3c2416/s3c2416.c
index 5287d2808d3..08bb0355159 100644
--- a/arch/arm/mach-s3c2416/s3c2416.c
+++ b/arch/arm/mach-s3c2416/s3c2416.c
@@ -44,7 +44,6 @@
44#include <asm/proc-fns.h> 44#include <asm/proc-fns.h>
45#include <asm/irq.h> 45#include <asm/irq.h>
46 46
47#include <mach/idle.h>
48#include <mach/regs-s3c2443-clock.h> 47#include <mach/regs-s3c2443-clock.h>
49 48
50#include <plat/gpio-core.h> 49#include <plat/gpio-core.h>
@@ -88,8 +87,6 @@ int __init s3c2416_init(void)
88{ 87{
89 printk(KERN_INFO "S3C2416: Initializing architecture\n"); 88 printk(KERN_INFO "S3C2416: Initializing architecture\n");
90 89
91 /* s3c24xx_idle = s3c2416_idle; */
92
93 /* change WDT IRQ number */ 90 /* change WDT IRQ number */
94 s3c_device_wdt.resource[1].start = IRQ_S3C2443_WDT; 91 s3c_device_wdt.resource[1].start = IRQ_S3C2443_WDT;
95 s3c_device_wdt.resource[1].end = IRQ_S3C2443_WDT; 92 s3c_device_wdt.resource[1].end = IRQ_S3C2443_WDT;
diff --git a/arch/arm/mach-s3c64xx/include/mach/entry-macro.S b/arch/arm/mach-s3c64xx/include/mach/entry-macro.S
deleted file mode 100644
index dc2bc15142c..00000000000
--- a/arch/arm/mach-s3c64xx/include/mach/entry-macro.S
+++ /dev/null
@@ -1,19 +0,0 @@
1/* arch/arm/mach-s3c6400/include/mach/entry-macro.S
2 *
3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics
5 * http://armlinux.simtec.co.uk/
6 * Ben Dooks <ben@simtec.co.uk>
7 *
8 * Low-level IRQ helper macros for the Samsung S3C64XX series
9 *
10 * This file is licensed under the terms of the GNU General Public
11 * License version 2. This program is licensed "as is" without any
12 * warranty of any kind, whether express or implied.
13*/
14
15 .macro disable_fiq
16 .endm
17
18 .macro arch_ret_to_user, tmp1, tmp2
19 .endm
diff --git a/arch/arm/mach-s3c64xx/include/mach/system.h b/arch/arm/mach-s3c64xx/include/mach/system.h
deleted file mode 100644
index 353ed4389ae..00000000000
--- a/arch/arm/mach-s3c64xx/include/mach/system.h
+++ /dev/null
@@ -1,19 +0,0 @@
1/* linux/arch/arm/mach-s3c6400/include/mach/system.h
2 *
3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk>
6 * http://armlinux.simtec.co.uk/
7 *
8 * S3C6400 - system implementation
9 */
10
11#ifndef __ASM_ARCH_SYSTEM_H
12#define __ASM_ARCH_SYSTEM_H __FILE__
13
14static void arch_idle(void)
15{
16 /* nothing here yet */
17}
18
19#endif /* __ASM_ARCH_IRQ_H */
diff --git a/arch/arm/mach-s5p64x0/common.c b/arch/arm/mach-s5p64x0/common.c
index 52b89a37644..9143f8b1996 100644
--- a/arch/arm/mach-s5p64x0/common.c
+++ b/arch/arm/mach-s5p64x0/common.c
@@ -146,15 +146,12 @@ static void s5p64x0_idle(void)
146{ 146{
147 unsigned long val; 147 unsigned long val;
148 148
149 if (!need_resched()) { 149 val = __raw_readl(S5P64X0_PWR_CFG);
150 val = __raw_readl(S5P64X0_PWR_CFG); 150 val &= ~(0x3 << 5);
151 val &= ~(0x3 << 5); 151 val |= (0x1 << 5);
152 val |= (0x1 << 5); 152 __raw_writel(val, S5P64X0_PWR_CFG);
153 __raw_writel(val, S5P64X0_PWR_CFG);
154 153
155 cpu_do_idle(); 154 cpu_do_idle();
156 }
157 local_irq_enable();
158} 155}
159 156
160/* 157/*
@@ -286,7 +283,7 @@ int __init s5p64x0_init(void)
286 printk(KERN_INFO "S5P64X0(S5P6440/S5P6450): Initializing architecture\n"); 283 printk(KERN_INFO "S5P64X0(S5P6440/S5P6450): Initializing architecture\n");
287 284
288 /* set idle function */ 285 /* set idle function */
289 pm_idle = s5p64x0_idle; 286 arm_pm_idle = s5p64x0_idle;
290 287
291 return device_register(&s5p64x0_dev); 288 return device_register(&s5p64x0_dev);
292} 289}
diff --git a/arch/arm/mach-s5p64x0/dma.c b/arch/arm/mach-s5p64x0/dma.c
index f820c074440..f7f68ad7791 100644
--- a/arch/arm/mach-s5p64x0/dma.c
+++ b/arch/arm/mach-s5p64x0/dma.c
@@ -108,34 +108,22 @@ struct dma_pl330_platdata s5p6450_pdma_pdata = {
108 .peri_id = s5p6450_pdma_peri, 108 .peri_id = s5p6450_pdma_peri,
109}; 109};
110 110
111struct amba_device s5p64x0_device_pdma = { 111AMBA_AHB_DEVICE(s5p64x0_pdma, "dma-pl330", 0x00041330, S5P64X0_PA_PDMA,
112 .dev = { 112 {IRQ_DMA0}, NULL);
113 .init_name = "dma-pl330",
114 .dma_mask = &dma_dmamask,
115 .coherent_dma_mask = DMA_BIT_MASK(32),
116 },
117 .res = {
118 .start = S5P64X0_PA_PDMA,
119 .end = S5P64X0_PA_PDMA + SZ_4K,
120 .flags = IORESOURCE_MEM,
121 },
122 .irq = {IRQ_DMA0, NO_IRQ},
123 .periphid = 0x00041330,
124};
125 113
126static int __init s5p64x0_dma_init(void) 114static int __init s5p64x0_dma_init(void)
127{ 115{
128 if (soc_is_s5p6450()) { 116 if (soc_is_s5p6450()) {
129 dma_cap_set(DMA_SLAVE, s5p6450_pdma_pdata.cap_mask); 117 dma_cap_set(DMA_SLAVE, s5p6450_pdma_pdata.cap_mask);
130 dma_cap_set(DMA_CYCLIC, s5p6450_pdma_pdata.cap_mask); 118 dma_cap_set(DMA_CYCLIC, s5p6450_pdma_pdata.cap_mask);
131 s5p64x0_device_pdma.dev.platform_data = &s5p6450_pdma_pdata; 119 s5p64x0_pdma_device.dev.platform_data = &s5p6450_pdma_pdata;
132 } else { 120 } else {
133 dma_cap_set(DMA_SLAVE, s5p6440_pdma_pdata.cap_mask); 121 dma_cap_set(DMA_SLAVE, s5p6440_pdma_pdata.cap_mask);
134 dma_cap_set(DMA_CYCLIC, s5p6440_pdma_pdata.cap_mask); 122 dma_cap_set(DMA_CYCLIC, s5p6440_pdma_pdata.cap_mask);
135 s5p64x0_device_pdma.dev.platform_data = &s5p6440_pdma_pdata; 123 s5p64x0_pdma_device.dev.platform_data = &s5p6440_pdma_pdata;
136 } 124 }
137 125
138 amba_device_register(&s5p64x0_device_pdma, &iomem_resource); 126 amba_device_register(&s5p64x0_pdma_device, &iomem_resource);
139 127
140 return 0; 128 return 0;
141} 129}
diff --git a/arch/arm/mach-s5p64x0/include/mach/entry-macro.S b/arch/arm/mach-s5p64x0/include/mach/entry-macro.S
deleted file mode 100644
index fbb246d0a3d..00000000000
--- a/arch/arm/mach-s5p64x0/include/mach/entry-macro.S
+++ /dev/null
@@ -1,17 +0,0 @@
1/* linux/arch/arm/mach-s5p64x0/include/mach/entry-macro.S
2 *
3 * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * Low-level IRQ helper macros for the Samsung S5P64X0
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13 .macro disable_fiq
14 .endm
15
16 .macro arch_ret_to_user, tmp1, tmp2
17 .endm
diff --git a/arch/arm/mach-s5p64x0/include/mach/system.h b/arch/arm/mach-s5p64x0/include/mach/system.h
deleted file mode 100644
index cf26e0954a2..00000000000
--- a/arch/arm/mach-s5p64x0/include/mach/system.h
+++ /dev/null
@@ -1,21 +0,0 @@
1/* linux/arch/arm/mach-s5p64x0/include/mach/system.h
2 *
3 * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * S5P64X0 - system support header
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_SYSTEM_H
14#define __ASM_ARCH_SYSTEM_H __FILE__
15
16static void arch_idle(void)
17{
18 /* nothing here yet */
19}
20
21#endif /* __ASM_ARCH_SYSTEM_H */
diff --git a/arch/arm/mach-s5pc100/common.c b/arch/arm/mach-s5pc100/common.c
index c9095730a7f..ff71e2d467c 100644
--- a/arch/arm/mach-s5pc100/common.c
+++ b/arch/arm/mach-s5pc100/common.c
@@ -129,14 +129,6 @@ static struct map_desc s5pc100_iodesc[] __initdata = {
129 } 129 }
130}; 130};
131 131
132static void s5pc100_idle(void)
133{
134 if (!need_resched())
135 cpu_do_idle();
136
137 local_irq_enable();
138}
139
140/* 132/*
141 * s5pc100_map_io 133 * s5pc100_map_io
142 * 134 *
@@ -210,10 +202,6 @@ core_initcall(s5pc100_core_init);
210int __init s5pc100_init(void) 202int __init s5pc100_init(void)
211{ 203{
212 printk(KERN_INFO "S5PC100: Initializing architecture\n"); 204 printk(KERN_INFO "S5PC100: Initializing architecture\n");
213
214 /* set idle function */
215 pm_idle = s5pc100_idle;
216
217 return device_register(&s5pc100_dev); 205 return device_register(&s5pc100_dev);
218} 206}
219 207
diff --git a/arch/arm/mach-s5pc100/dma.c b/arch/arm/mach-s5pc100/dma.c
index c841f4d313f..96b1ab3dcd4 100644
--- a/arch/arm/mach-s5pc100/dma.c
+++ b/arch/arm/mach-s5pc100/dma.c
@@ -73,21 +73,8 @@ struct dma_pl330_platdata s5pc100_pdma0_pdata = {
73 .peri_id = pdma0_peri, 73 .peri_id = pdma0_peri,
74}; 74};
75 75
76struct amba_device s5pc100_device_pdma0 = { 76AMBA_AHB_DEVICE(s5pc100_pdma0, "dma-pl330.0", 0x00041330, S5PC100_PA_PDMA0,
77 .dev = { 77 {IRQ_PDMA0}, &s5pc100_pdma0_pdata);
78 .init_name = "dma-pl330.0",
79 .dma_mask = &dma_dmamask,
80 .coherent_dma_mask = DMA_BIT_MASK(32),
81 .platform_data = &s5pc100_pdma0_pdata,
82 },
83 .res = {
84 .start = S5PC100_PA_PDMA0,
85 .end = S5PC100_PA_PDMA0 + SZ_4K,
86 .flags = IORESOURCE_MEM,
87 },
88 .irq = {IRQ_PDMA0, NO_IRQ},
89 .periphid = 0x00041330,
90};
91 78
92u8 pdma1_peri[] = { 79u8 pdma1_peri[] = {
93 DMACH_UART0_RX, 80 DMACH_UART0_RX,
@@ -127,31 +114,18 @@ struct dma_pl330_platdata s5pc100_pdma1_pdata = {
127 .peri_id = pdma1_peri, 114 .peri_id = pdma1_peri,
128}; 115};
129 116
130struct amba_device s5pc100_device_pdma1 = { 117AMBA_AHB_DEVICE(s5pc100_pdma1, "dma-pl330.1", 0x00041330, S5PC100_PA_PDMA1,
131 .dev = { 118 {IRQ_PDMA1}, &s5pc100_pdma1_pdata);
132 .init_name = "dma-pl330.1",
133 .dma_mask = &dma_dmamask,
134 .coherent_dma_mask = DMA_BIT_MASK(32),
135 .platform_data = &s5pc100_pdma1_pdata,
136 },
137 .res = {
138 .start = S5PC100_PA_PDMA1,
139 .end = S5PC100_PA_PDMA1 + SZ_4K,
140 .flags = IORESOURCE_MEM,
141 },
142 .irq = {IRQ_PDMA1, NO_IRQ},
143 .periphid = 0x00041330,
144};
145 119
146static int __init s5pc100_dma_init(void) 120static int __init s5pc100_dma_init(void)
147{ 121{
148 dma_cap_set(DMA_SLAVE, s5pc100_pdma0_pdata.cap_mask); 122 dma_cap_set(DMA_SLAVE, s5pc100_pdma0_pdata.cap_mask);
149 dma_cap_set(DMA_CYCLIC, s5pc100_pdma0_pdata.cap_mask); 123 dma_cap_set(DMA_CYCLIC, s5pc100_pdma0_pdata.cap_mask);
150 amba_device_register(&s5pc100_device_pdma0, &iomem_resource); 124 amba_device_register(&s5pc100_pdma0_device, &iomem_resource);
151 125
152 dma_cap_set(DMA_SLAVE, s5pc100_pdma1_pdata.cap_mask); 126 dma_cap_set(DMA_SLAVE, s5pc100_pdma1_pdata.cap_mask);
153 dma_cap_set(DMA_CYCLIC, s5pc100_pdma1_pdata.cap_mask); 127 dma_cap_set(DMA_CYCLIC, s5pc100_pdma1_pdata.cap_mask);
154 amba_device_register(&s5pc100_device_pdma1, &iomem_resource); 128 amba_device_register(&s5pc100_pdma1_device, &iomem_resource);
155 129
156 return 0; 130 return 0;
157} 131}
diff --git a/arch/arm/mach-s5pc100/include/mach/entry-macro.S b/arch/arm/mach-s5pc100/include/mach/entry-macro.S
index b8c242edfa2..bad0700457d 100644
--- a/arch/arm/mach-s5pc100/include/mach/entry-macro.S
+++ b/arch/arm/mach-s5pc100/include/mach/entry-macro.S
@@ -12,14 +12,8 @@
12 * warranty of any kind, whether express or implied. 12 * warranty of any kind, whether express or implied.
13*/ 13*/
14 14
15 .macro disable_fiq
16 .endm
17
18 .macro get_irqnr_preamble, base, tmp 15 .macro get_irqnr_preamble, base, tmp
19 .endm 16 .endm
20 17
21 .macro arch_ret_to_user, tmp1, tmp2
22 .endm
23
24 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp 18 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
25 .endm 19 .endm
diff --git a/arch/arm/mach-s5pc100/include/mach/system.h b/arch/arm/mach-s5pc100/include/mach/system.h
deleted file mode 100644
index afc96c29851..00000000000
--- a/arch/arm/mach-s5pc100/include/mach/system.h
+++ /dev/null
@@ -1,19 +0,0 @@
1/* linux/arch/arm/mach-s5pc100/include/mach/system.h
2 *
3 * Copyright 2009 Samsung Electronics Co.
4 * Byungho Min <bhmin@samsung.com>
5 *
6 * S5PC100 - system implementation
7 *
8 * Based on mach-s3c6400/include/mach/system.h
9 */
10
11#ifndef __ASM_ARCH_SYSTEM_H
12#define __ASM_ARCH_SYSTEM_H __FILE__
13
14static void arch_idle(void)
15{
16 /* nothing here yet */
17}
18
19#endif /* __ASM_ARCH_IRQ_H */
diff --git a/arch/arm/mach-s5pv210/common.c b/arch/arm/mach-s5pv210/common.c
index 9c1bcdcc12c..4c9e9027df9 100644
--- a/arch/arm/mach-s5pv210/common.c
+++ b/arch/arm/mach-s5pv210/common.c
@@ -142,14 +142,6 @@ static struct map_desc s5pv210_iodesc[] __initdata = {
142 } 142 }
143}; 143};
144 144
145static void s5pv210_idle(void)
146{
147 if (!need_resched())
148 cpu_do_idle();
149
150 local_irq_enable();
151}
152
153void s5pv210_restart(char mode, const char *cmd) 145void s5pv210_restart(char mode, const char *cmd)
154{ 146{
155 __raw_writel(0x1, S5P_SWRESET); 147 __raw_writel(0x1, S5P_SWRESET);
@@ -247,10 +239,6 @@ core_initcall(s5pv210_core_init);
247int __init s5pv210_init(void) 239int __init s5pv210_init(void)
248{ 240{
249 printk(KERN_INFO "S5PV210: Initializing architecture\n"); 241 printk(KERN_INFO "S5PV210: Initializing architecture\n");
250
251 /* set idle function */
252 pm_idle = s5pv210_idle;
253
254 return device_register(&s5pv210_dev); 242 return device_register(&s5pv210_dev);
255} 243}
256 244
diff --git a/arch/arm/mach-s5pv210/dma.c b/arch/arm/mach-s5pv210/dma.c
index a6113e0267f..f6885d247d1 100644
--- a/arch/arm/mach-s5pv210/dma.c
+++ b/arch/arm/mach-s5pv210/dma.c
@@ -71,21 +71,8 @@ struct dma_pl330_platdata s5pv210_pdma0_pdata = {
71 .peri_id = pdma0_peri, 71 .peri_id = pdma0_peri,
72}; 72};
73 73
74struct amba_device s5pv210_device_pdma0 = { 74AMBA_AHB_DEVICE(s5pv210_pdma0, "dma-pl330.0", 0x00041330, S5PV210_PA_PDMA0,
75 .dev = { 75 {IRQ_PDMA0}, &s5pv210_pdma0_pdata);
76 .init_name = "dma-pl330.0",
77 .dma_mask = &dma_dmamask,
78 .coherent_dma_mask = DMA_BIT_MASK(32),
79 .platform_data = &s5pv210_pdma0_pdata,
80 },
81 .res = {
82 .start = S5PV210_PA_PDMA0,
83 .end = S5PV210_PA_PDMA0 + SZ_4K,
84 .flags = IORESOURCE_MEM,
85 },
86 .irq = {IRQ_PDMA0, NO_IRQ},
87 .periphid = 0x00041330,
88};
89 76
90u8 pdma1_peri[] = { 77u8 pdma1_peri[] = {
91 DMACH_UART0_RX, 78 DMACH_UART0_RX,
@@ -127,31 +114,18 @@ struct dma_pl330_platdata s5pv210_pdma1_pdata = {
127 .peri_id = pdma1_peri, 114 .peri_id = pdma1_peri,
128}; 115};
129 116
130struct amba_device s5pv210_device_pdma1 = { 117AMBA_AHB_DEVICE(s5pv210_pdma1, "dma-pl330.1", 0x00041330, S5PV210_PA_PDMA1,
131 .dev = { 118 {IRQ_PDMA1}, &s5pv210_pdma1_pdata);
132 .init_name = "dma-pl330.1",
133 .dma_mask = &dma_dmamask,
134 .coherent_dma_mask = DMA_BIT_MASK(32),
135 .platform_data = &s5pv210_pdma1_pdata,
136 },
137 .res = {
138 .start = S5PV210_PA_PDMA1,
139 .end = S5PV210_PA_PDMA1 + SZ_4K,
140 .flags = IORESOURCE_MEM,
141 },
142 .irq = {IRQ_PDMA1, NO_IRQ},
143 .periphid = 0x00041330,
144};
145 119
146static int __init s5pv210_dma_init(void) 120static int __init s5pv210_dma_init(void)
147{ 121{
148 dma_cap_set(DMA_SLAVE, s5pv210_pdma0_pdata.cap_mask); 122 dma_cap_set(DMA_SLAVE, s5pv210_pdma0_pdata.cap_mask);
149 dma_cap_set(DMA_CYCLIC, s5pv210_pdma0_pdata.cap_mask); 123 dma_cap_set(DMA_CYCLIC, s5pv210_pdma0_pdata.cap_mask);
150 amba_device_register(&s5pv210_device_pdma0, &iomem_resource); 124 amba_device_register(&s5pv210_pdma0_device, &iomem_resource);
151 125
152 dma_cap_set(DMA_SLAVE, s5pv210_pdma1_pdata.cap_mask); 126 dma_cap_set(DMA_SLAVE, s5pv210_pdma1_pdata.cap_mask);
153 dma_cap_set(DMA_CYCLIC, s5pv210_pdma1_pdata.cap_mask); 127 dma_cap_set(DMA_CYCLIC, s5pv210_pdma1_pdata.cap_mask);
154 amba_device_register(&s5pv210_device_pdma1, &iomem_resource); 128 amba_device_register(&s5pv210_pdma1_device, &iomem_resource);
155 129
156 return 0; 130 return 0;
157} 131}
diff --git a/arch/arm/mach-s5pv210/include/mach/entry-macro.S b/arch/arm/mach-s5pv210/include/mach/entry-macro.S
deleted file mode 100644
index bebca1b5d0b..00000000000
--- a/arch/arm/mach-s5pv210/include/mach/entry-macro.S
+++ /dev/null
@@ -1,17 +0,0 @@
1/* linux/arch/arm/mach-s5pv210/include/mach/entry-macro.S
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * Low-level IRQ helper macros for the Samsung S5PV210
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13 .macro disable_fiq
14 .endm
15
16 .macro arch_ret_to_user, tmp1, tmp2
17 .endm
diff --git a/arch/arm/mach-s5pv210/include/mach/system.h b/arch/arm/mach-s5pv210/include/mach/system.h
deleted file mode 100644
index bf288ced860..00000000000
--- a/arch/arm/mach-s5pv210/include/mach/system.h
+++ /dev/null
@@ -1,21 +0,0 @@
1/* linux/arch/arm/mach-s5pv210/include/mach/system.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5PV210 - system support header
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_SYSTEM_H
14#define __ASM_ARCH_SYSTEM_H __FILE__
15
16static void arch_idle(void)
17{
18 /* nothing here yet */
19}
20
21#endif /* __ASM_ARCH_SYSTEM_H */
diff --git a/arch/arm/mach-sa1100/include/mach/entry-macro.S b/arch/arm/mach-sa1100/include/mach/entry-macro.S
index 6aa13c46c5d..8cf7630bf02 100644
--- a/arch/arm/mach-sa1100/include/mach/entry-macro.S
+++ b/arch/arm/mach-sa1100/include/mach/entry-macro.S
@@ -8,17 +8,11 @@
8 * warranty of any kind, whether express or implied. 8 * warranty of any kind, whether express or implied.
9 */ 9 */
10 10
11 .macro disable_fiq
12 .endm
13
14 .macro get_irqnr_preamble, base, tmp 11 .macro get_irqnr_preamble, base, tmp
15 mov \base, #0xfa000000 @ ICIP = 0xfa050000 12 mov \base, #0xfa000000 @ ICIP = 0xfa050000
16 add \base, \base, #0x00050000 13 add \base, \base, #0x00050000
17 .endm 14 .endm
18 15
19 .macro arch_ret_to_user, tmp1, tmp2
20 .endm
21
22 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp 16 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
23 ldr \irqstat, [\base] @ get irqs 17 ldr \irqstat, [\base] @ get irqs
24 ldr \irqnr, [\base, #4] @ ICMR = 0xfa050004 18 ldr \irqnr, [\base, #4] @ ICMR = 0xfa050004
diff --git a/arch/arm/mach-sa1100/include/mach/system.h b/arch/arm/mach-sa1100/include/mach/system.h
deleted file mode 100644
index e17b208f76d..00000000000
--- a/arch/arm/mach-sa1100/include/mach/system.h
+++ /dev/null
@@ -1,9 +0,0 @@
1/*
2 * arch/arm/mach-sa1100/include/mach/system.h
3 *
4 * Copyright (c) 1999 Nicolas Pitre <nico@fluxnic.net>
5 */
6static inline void arch_idle(void)
7{
8 cpu_do_idle();
9}
diff --git a/arch/arm/mach-shark/core.c b/arch/arm/mach-shark/core.c
index a851c254ad6..6a2a7f2c255 100644
--- a/arch/arm/mach-shark/core.c
+++ b/arch/arm/mach-shark/core.c
@@ -149,10 +149,16 @@ static struct sys_timer shark_timer = {
149 .init = shark_timer_init, 149 .init = shark_timer_init,
150}; 150};
151 151
152static void shark_init_early(void)
153{
154 disable_hlt();
155}
156
152MACHINE_START(SHARK, "Shark") 157MACHINE_START(SHARK, "Shark")
153 /* Maintainer: Alexander Schulz */ 158 /* Maintainer: Alexander Schulz */
154 .atag_offset = 0x3000, 159 .atag_offset = 0x3000,
155 .map_io = shark_map_io, 160 .map_io = shark_map_io,
161 .init_early = shark_init_early,
156 .init_irq = shark_init_irq, 162 .init_irq = shark_init_irq,
157 .timer = &shark_timer, 163 .timer = &shark_timer,
158 .dma_zone_size = SZ_4M, 164 .dma_zone_size = SZ_4M,
diff --git a/arch/arm/mach-shark/include/mach/entry-macro.S b/arch/arm/mach-shark/include/mach/entry-macro.S
index 0bb6cc626eb..5901b09fc96 100644
--- a/arch/arm/mach-shark/include/mach/entry-macro.S
+++ b/arch/arm/mach-shark/include/mach/entry-macro.S
@@ -7,16 +7,10 @@
7 * License version 2. This program is licensed "as is" without any 7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied. 8 * warranty of any kind, whether express or implied.
9 */ 9 */
10 .macro disable_fiq
11 .endm
12
13 .macro get_irqnr_preamble, base, tmp 10 .macro get_irqnr_preamble, base, tmp
14 mov \base, #0xe0000000 11 mov \base, #0xe0000000
15 .endm 12 .endm
16 13
17 .macro arch_ret_to_user, tmp1, tmp2
18 .endm
19
20 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp 14 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
21 15
22 mov \irqstat, #0x0C 16 mov \irqstat, #0x0C
diff --git a/arch/arm/mach-shark/include/mach/system.h b/arch/arm/mach-shark/include/mach/system.h
deleted file mode 100644
index 1b2f2c5050a..00000000000
--- a/arch/arm/mach-shark/include/mach/system.h
+++ /dev/null
@@ -1,13 +0,0 @@
1/*
2 * arch/arm/mach-shark/include/mach/system.h
3 *
4 * by Alexander Schulz
5 */
6#ifndef __ASM_ARCH_SYSTEM_H
7#define __ASM_ARCH_SYSTEM_H
8
9static inline void arch_idle(void)
10{
11}
12
13#endif
diff --git a/arch/arm/mach-shmobile/include/mach/entry-macro.S b/arch/arm/mach-shmobile/include/mach/entry-macro.S
deleted file mode 100644
index 2a57b2964ee..00000000000
--- a/arch/arm/mach-shmobile/include/mach/entry-macro.S
+++ /dev/null
@@ -1,22 +0,0 @@
1/*
2 * Copyright (C) 2010 Paul Mundt
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; version 2 of the License.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program; if not, write to the Free Software
15 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
16 */
17
18 .macro disable_fiq
19 .endm
20
21 .macro arch_ret_to_user, tmp1, tmp2
22 .endm
diff --git a/arch/arm/mach-shmobile/include/mach/system.h b/arch/arm/mach-shmobile/include/mach/system.h
index 956ac18ddbf..3bbcb3fa077 100644
--- a/arch/arm/mach-shmobile/include/mach/system.h
+++ b/arch/arm/mach-shmobile/include/mach/system.h
@@ -1,11 +1,6 @@
1#ifndef __ASM_ARCH_SYSTEM_H 1#ifndef __ASM_ARCH_SYSTEM_H
2#define __ASM_ARCH_SYSTEM_H 2#define __ASM_ARCH_SYSTEM_H
3 3
4static inline void arch_idle(void)
5{
6 cpu_do_idle();
7}
8
9static inline void arch_reset(char mode, const char *cmd) 4static inline void arch_reset(char mode, const char *cmd)
10{ 5{
11 soft_restart(0); 6 soft_restart(0);
diff --git a/arch/arm/mach-spear3xx/include/mach/entry-macro.S b/arch/arm/mach-spear3xx/include/mach/entry-macro.S
deleted file mode 100644
index de3bb41c8e9..00000000000
--- a/arch/arm/mach-spear3xx/include/mach/entry-macro.S
+++ /dev/null
@@ -1,18 +0,0 @@
1/*
2 * arch/arm/mach-spear3xx/include/mach/entry-macro.S
3 *
4 * Low-level IRQ helper macros for SPEAr3xx machine family
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14 .macro disable_fiq
15 .endm
16
17 .macro arch_ret_to_user, tmp1, tmp2
18 .endm
diff --git a/arch/arm/mach-spear3xx/include/mach/system.h b/arch/arm/mach-spear3xx/include/mach/system.h
deleted file mode 100644
index 92cee6335c9..00000000000
--- a/arch/arm/mach-spear3xx/include/mach/system.h
+++ /dev/null
@@ -1,19 +0,0 @@
1/*
2 * arch/arm/mach-spear3xx/include/mach/system.h
3 *
4 * SPEAr3xx Machine family specific architecture functions
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#ifndef __MACH_SYSTEM_H
15#define __MACH_SYSTEM_H
16
17#include <plat/system.h>
18
19#endif /* __MACH_SYSTEM_H */
diff --git a/arch/arm/mach-spear3xx/spear300.c b/arch/arm/mach-spear3xx/spear300.c
index a5e46b4ade2..9da50e281e9 100644
--- a/arch/arm/mach-spear3xx/spear300.c
+++ b/arch/arm/mach-spear3xx/spear300.c
@@ -430,18 +430,8 @@ static struct pl061_platform_data gpio1_plat_data = {
430 .irq_base = SPEAR300_GPIO1_INT_BASE, 430 .irq_base = SPEAR300_GPIO1_INT_BASE,
431}; 431};
432 432
433struct amba_device spear300_gpio1_device = { 433AMBA_APB_DEVICE(spear300_gpio1, "gpio1", 0, SPEAR300_GPIO_BASE,
434 .dev = { 434 {SPEAR300_VIRQ_GPIO1}, &gpio1_plat_data);
435 .init_name = "gpio1",
436 .platform_data = &gpio1_plat_data,
437 },
438 .res = {
439 .start = SPEAR300_GPIO_BASE,
440 .end = SPEAR300_GPIO_BASE + SZ_4K - 1,
441 .flags = IORESOURCE_MEM,
442 },
443 .irq = {SPEAR300_VIRQ_GPIO1, NO_IRQ},
444};
445 435
446/* spear300 routines */ 436/* spear300 routines */
447void __init spear300_init(struct pmx_mode *pmx_mode, struct pmx_dev **pmx_devs, 437void __init spear300_init(struct pmx_mode *pmx_mode, struct pmx_dev **pmx_devs,
diff --git a/arch/arm/mach-spear3xx/spear3xx.c b/arch/arm/mach-spear3xx/spear3xx.c
index 10af45da86a..b1733c37f20 100644
--- a/arch/arm/mach-spear3xx/spear3xx.c
+++ b/arch/arm/mach-spear3xx/spear3xx.c
@@ -28,31 +28,12 @@ static struct pl061_platform_data gpio_plat_data = {
28 .irq_base = SPEAR3XX_GPIO_INT_BASE, 28 .irq_base = SPEAR3XX_GPIO_INT_BASE,
29}; 29};
30 30
31struct amba_device spear3xx_gpio_device = { 31AMBA_APB_DEVICE(spear3xx_gpio, "gpio", 0, SPEAR3XX_ICM3_GPIO_BASE,
32 .dev = { 32 {SPEAR3XX_IRQ_BASIC_GPIO}, &gpio_plat_data);
33 .init_name = "gpio",
34 .platform_data = &gpio_plat_data,
35 },
36 .res = {
37 .start = SPEAR3XX_ICM3_GPIO_BASE,
38 .end = SPEAR3XX_ICM3_GPIO_BASE + SZ_4K - 1,
39 .flags = IORESOURCE_MEM,
40 },
41 .irq = {SPEAR3XX_IRQ_BASIC_GPIO, NO_IRQ},
42};
43 33
44/* uart device registration */ 34/* uart device registration */
45struct amba_device spear3xx_uart_device = { 35AMBA_APB_DEVICE(spear3xx_uart, "uart", 0, SPEAR3XX_ICM1_UART_BASE,
46 .dev = { 36 {SPEAR3XX_IRQ_UART}, NULL);
47 .init_name = "uart",
48 },
49 .res = {
50 .start = SPEAR3XX_ICM1_UART_BASE,
51 .end = SPEAR3XX_ICM1_UART_BASE + SZ_4K - 1,
52 .flags = IORESOURCE_MEM,
53 },
54 .irq = {SPEAR3XX_IRQ_UART, NO_IRQ},
55};
56 37
57/* Do spear3xx familiy common initialization part here */ 38/* Do spear3xx familiy common initialization part here */
58void __init spear3xx_init(void) 39void __init spear3xx_init(void)
diff --git a/arch/arm/mach-spear6xx/include/mach/entry-macro.S b/arch/arm/mach-spear6xx/include/mach/entry-macro.S
deleted file mode 100644
index d490a910d92..00000000000
--- a/arch/arm/mach-spear6xx/include/mach/entry-macro.S
+++ /dev/null
@@ -1,18 +0,0 @@
1/*
2 * arch/arm/mach-spear6xx/include/mach/entry-macro.S
3 *
4 * Low-level IRQ helper macros for SPEAr6xx machine family
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Rajeev Kumar<rajeev-dlh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14 .macro disable_fiq
15 .endm
16
17 .macro arch_ret_to_user, tmp1, tmp2
18 .endm
diff --git a/arch/arm/mach-spear6xx/include/mach/system.h b/arch/arm/mach-spear6xx/include/mach/system.h
deleted file mode 100644
index 0b1d2be81cf..00000000000
--- a/arch/arm/mach-spear6xx/include/mach/system.h
+++ /dev/null
@@ -1,19 +0,0 @@
1/*
2 * arch/arm/mach-spear6xx/include/mach/system.h
3 *
4 * SPEAr6xx Machine family specific architecture functions
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Rajeev Kumar<rajeev-dlh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#ifndef __MACH_SYSTEM_H
15#define __MACH_SYSTEM_H
16
17#include <plat/system.h>
18
19#endif /* __MACH_SYSTEM_H */
diff --git a/arch/arm/mach-spear6xx/spear6xx.c b/arch/arm/mach-spear6xx/spear6xx.c
index e0f6628c8b2..b997b1b10ba 100644
--- a/arch/arm/mach-spear6xx/spear6xx.c
+++ b/arch/arm/mach-spear6xx/spear6xx.c
@@ -34,7 +34,7 @@ struct amba_device uart_device[] = {
34 .end = SPEAR6XX_ICM1_UART0_BASE + SZ_4K - 1, 34 .end = SPEAR6XX_ICM1_UART0_BASE + SZ_4K - 1,
35 .flags = IORESOURCE_MEM, 35 .flags = IORESOURCE_MEM,
36 }, 36 },
37 .irq = {IRQ_UART_0, NO_IRQ}, 37 .irq = {IRQ_UART_0},
38 }, { 38 }, {
39 .dev = { 39 .dev = {
40 .init_name = "uart1", 40 .init_name = "uart1",
@@ -44,7 +44,7 @@ struct amba_device uart_device[] = {
44 .end = SPEAR6XX_ICM1_UART1_BASE + SZ_4K - 1, 44 .end = SPEAR6XX_ICM1_UART1_BASE + SZ_4K - 1,
45 .flags = IORESOURCE_MEM, 45 .flags = IORESOURCE_MEM,
46 }, 46 },
47 .irq = {IRQ_UART_1, NO_IRQ}, 47 .irq = {IRQ_UART_1},
48 } 48 }
49}; 49};
50 50
@@ -73,7 +73,7 @@ struct amba_device gpio_device[] = {
73 .end = SPEAR6XX_CPU_GPIO_BASE + SZ_4K - 1, 73 .end = SPEAR6XX_CPU_GPIO_BASE + SZ_4K - 1,
74 .flags = IORESOURCE_MEM, 74 .flags = IORESOURCE_MEM,
75 }, 75 },
76 .irq = {IRQ_LOCAL_GPIO, NO_IRQ}, 76 .irq = {IRQ_LOCAL_GPIO},
77 }, { 77 }, {
78 .dev = { 78 .dev = {
79 .init_name = "gpio1", 79 .init_name = "gpio1",
@@ -84,7 +84,7 @@ struct amba_device gpio_device[] = {
84 .end = SPEAR6XX_ICM3_GPIO_BASE + SZ_4K - 1, 84 .end = SPEAR6XX_ICM3_GPIO_BASE + SZ_4K - 1,
85 .flags = IORESOURCE_MEM, 85 .flags = IORESOURCE_MEM,
86 }, 86 },
87 .irq = {IRQ_BASIC_GPIO, NO_IRQ}, 87 .irq = {IRQ_BASIC_GPIO},
88 }, { 88 }, {
89 .dev = { 89 .dev = {
90 .init_name = "gpio2", 90 .init_name = "gpio2",
@@ -95,7 +95,7 @@ struct amba_device gpio_device[] = {
95 .end = SPEAR6XX_ICM2_GPIO_BASE + SZ_4K - 1, 95 .end = SPEAR6XX_ICM2_GPIO_BASE + SZ_4K - 1,
96 .flags = IORESOURCE_MEM, 96 .flags = IORESOURCE_MEM,
97 }, 97 },
98 .irq = {IRQ_APPL_GPIO, NO_IRQ}, 98 .irq = {IRQ_APPL_GPIO},
99 } 99 }
100}; 100};
101 101
diff --git a/arch/arm/mach-tegra/common.c b/arch/arm/mach-tegra/common.c
index a2eb90169ae..2db20da1d58 100644
--- a/arch/arm/mach-tegra/common.c
+++ b/arch/arm/mach-tegra/common.c
@@ -27,7 +27,6 @@
27#include <asm/hardware/gic.h> 27#include <asm/hardware/gic.h>
28 28
29#include <mach/iomap.h> 29#include <mach/iomap.h>
30#include <mach/system.h>
31 30
32#include "board.h" 31#include "board.h"
33#include "clock.h" 32#include "clock.h"
@@ -96,6 +95,8 @@ static void __init tegra_init_cache(u32 tag_latency, u32 data_latency)
96#ifdef CONFIG_ARCH_TEGRA_2x_SOC 95#ifdef CONFIG_ARCH_TEGRA_2x_SOC
97void __init tegra20_init_early(void) 96void __init tegra20_init_early(void)
98{ 97{
98 disable_hlt(); /* idle WFI usage needs to be confirmed */
99
99 tegra_init_fuse(); 100 tegra_init_fuse();
100 tegra2_init_clocks(); 101 tegra2_init_clocks();
101 tegra_clk_init_from_table(tegra20_clk_init_table); 102 tegra_clk_init_from_table(tegra20_clk_init_table);
diff --git a/arch/arm/mach-tegra/include/mach/entry-macro.S b/arch/arm/mach-tegra/include/mach/entry-macro.S
deleted file mode 100644
index e577cfe27e7..00000000000
--- a/arch/arm/mach-tegra/include/mach/entry-macro.S
+++ /dev/null
@@ -1,20 +0,0 @@
1/* arch/arm/mach-tegra/include/mach/entry-macro.S
2 *
3 * Copyright (C) 2009 Palm, Inc.
4 *
5 * This software is licensed under the terms of the GNU General Public
6 * License version 2, as published by the Free Software Foundation, and
7 * may be copied, distributed, and modified under those terms.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 */
15
16 .macro disable_fiq
17 .endm
18
19 .macro arch_ret_to_user, tmp1, tmp2
20 .endm
diff --git a/arch/arm/mach-tegra/include/mach/system.h b/arch/arm/mach-tegra/include/mach/system.h
deleted file mode 100644
index a312988bf6f..00000000000
--- a/arch/arm/mach-tegra/include/mach/system.h
+++ /dev/null
@@ -1,28 +0,0 @@
1/*
2 * arch/arm/mach-tegra/include/mach/system.h
3 *
4 * Copyright (C) 2010 Google, Inc.
5 *
6 * Author:
7 * Colin Cross <ccross@google.com>
8 * Erik Gilling <konkers@google.com>
9 *
10 * This software is licensed under the terms of the GNU General Public
11 * License version 2, as published by the Free Software Foundation, and
12 * may be copied, distributed, and modified under those terms.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 */
20
21#ifndef __MACH_TEGRA_SYSTEM_H
22#define __MACH_TEGRA_SYSTEM_H
23
24static inline void arch_idle(void)
25{
26}
27
28#endif
diff --git a/arch/arm/mach-u300/core.c b/arch/arm/mach-u300/core.c
index b4c6926a700..b9865605da0 100644
--- a/arch/arm/mach-u300/core.c
+++ b/arch/arm/mach-u300/core.c
@@ -94,19 +94,9 @@ static struct amba_pl011_data uart0_plat_data = {
94#endif 94#endif
95}; 95};
96 96
97static struct amba_device uart0_device = { 97/* Slow device at 0x3000 offset */
98 .dev = { 98static AMBA_APB_DEVICE(uart0, "uart0", 0, U300_UART0_BASE,
99 .coherent_dma_mask = ~0, 99 { IRQ_U300_UART0 }, &uart0_plat_data);
100 .init_name = "uart0", /* Slow device at 0x3000 offset */
101 .platform_data = &uart0_plat_data,
102 },
103 .res = {
104 .start = U300_UART0_BASE,
105 .end = U300_UART0_BASE + SZ_4K - 1,
106 .flags = IORESOURCE_MEM,
107 },
108 .irq = { IRQ_U300_UART0, NO_IRQ },
109};
110 100
111/* The U335 have an additional UART1 on the APP CPU */ 101/* The U335 have an additional UART1 on the APP CPU */
112#ifdef CONFIG_MACH_U300_BS335 102#ifdef CONFIG_MACH_U300_BS335
@@ -118,71 +108,28 @@ static struct amba_pl011_data uart1_plat_data = {
118#endif 108#endif
119}; 109};
120 110
121static struct amba_device uart1_device = { 111/* Fast device at 0x7000 offset */
122 .dev = { 112static AMBA_APB_DEVICE(uart1, "uart1", 0, U300_UART1_BASE,
123 .coherent_dma_mask = ~0, 113 { IRQ_U300_UART1 }, &uart1_plat_data);
124 .init_name = "uart1", /* Fast device at 0x7000 offset */
125 .platform_data = &uart1_plat_data,
126 },
127 .res = {
128 .start = U300_UART1_BASE,
129 .end = U300_UART1_BASE + SZ_4K - 1,
130 .flags = IORESOURCE_MEM,
131 },
132 .irq = { IRQ_U300_UART1, NO_IRQ },
133};
134#endif 114#endif
135 115
136static struct amba_device pl172_device = { 116/* AHB device at 0x4000 offset */
137 .dev = { 117static AMBA_APB_DEVICE(pl172, "pl172", 0, U300_EMIF_CFG_BASE, { }, NULL);
138 .init_name = "pl172", /* AHB device at 0x4000 offset */
139 .platform_data = NULL,
140 },
141 .res = {
142 .start = U300_EMIF_CFG_BASE,
143 .end = U300_EMIF_CFG_BASE + SZ_4K - 1,
144 .flags = IORESOURCE_MEM,
145 },
146};
147 118
148 119
149/* 120/*
150 * Everything within this next ifdef deals with external devices connected to 121 * Everything within this next ifdef deals with external devices connected to
151 * the APP SPI bus. 122 * the APP SPI bus.
152 */ 123 */
153static struct amba_device pl022_device = { 124/* Fast device at 0x6000 offset */
154 .dev = { 125static AMBA_APB_DEVICE(pl022, "pl022", 0, U300_SPI_BASE,
155 .coherent_dma_mask = ~0, 126 { IRQ_U300_SPI }, NULL);
156 .init_name = "pl022", /* Fast device at 0x6000 offset */
157 },
158 .res = {
159 .start = U300_SPI_BASE,
160 .end = U300_SPI_BASE + SZ_4K - 1,
161 .flags = IORESOURCE_MEM,
162 },
163 .irq = {IRQ_U300_SPI, NO_IRQ },
164 /*
165 * This device has a DMA channel but the Linux driver does not use
166 * it currently.
167 */
168};
169 127
170static struct amba_device mmcsd_device = { 128/* Fast device at 0x1000 offset */
171 .dev = { 129#define U300_MMCSD_IRQS { IRQ_U300_MMCSD_MCIINTR0, IRQ_U300_MMCSD_MCIINTR1 }
172 .init_name = "mmci", /* Fast device at 0x1000 offset */ 130
173 .platform_data = NULL, /* Added later */ 131static AMBA_APB_DEVICE(mmcsd, "mmci", 0, U300_MMCSD_BASE,
174 }, 132 U300_MMCSD_IRQS, NULL);
175 .res = {
176 .start = U300_MMCSD_BASE,
177 .end = U300_MMCSD_BASE + SZ_4K - 1,
178 .flags = IORESOURCE_MEM,
179 },
180 .irq = {IRQ_U300_MMCSD_MCIINTR0, IRQ_U300_MMCSD_MCIINTR1 },
181 /*
182 * This device has a DMA channel but the Linux driver does not use
183 * it currently.
184 */
185};
186 133
187/* 134/*
188 * The order of device declaration may be important, since some devices 135 * The order of device declaration may be important, since some devices
diff --git a/arch/arm/mach-u300/include/mach/entry-macro.S b/arch/arm/mach-u300/include/mach/entry-macro.S
deleted file mode 100644
index 7181d6ac665..00000000000
--- a/arch/arm/mach-u300/include/mach/entry-macro.S
+++ /dev/null
@@ -1,16 +0,0 @@
1/*
2 *
3 * arch-arm/mach-u300/include/mach/entry-macro.S
4 *
5 *
6 * Copyright (C) 2006-2009 ST-Ericsson AB
7 * License terms: GNU General Public License (GPL) version 2
8 * Low-level IRQ helper macros for ST-Ericsson U300
9 * Author: Linus Walleij <linus.walleij@stericsson.com>
10 */
11
12 .macro disable_fiq
13 .endm
14
15 .macro arch_ret_to_user, tmp1, tmp2
16 .endm
diff --git a/arch/arm/mach-u300/include/mach/system.h b/arch/arm/mach-u300/include/mach/system.h
deleted file mode 100644
index 574d46e3829..00000000000
--- a/arch/arm/mach-u300/include/mach/system.h
+++ /dev/null
@@ -1,14 +0,0 @@
1/*
2 *
3 * arch/arm/mach-u300/include/mach/system.h
4 *
5 *
6 * Copyright (C) 2007-2009 ST-Ericsson AB
7 * License terms: GNU General Public License (GPL) version 2
8 * System shutdown and reset functions.
9 * Author: Linus Walleij <linus.walleij@stericsson.com>
10 */
11static inline void arch_idle(void)
12{
13 cpu_do_idle();
14}
diff --git a/arch/arm/mach-ux500/devices-common.c b/arch/arm/mach-ux500/devices-common.c
index c563e5418d8..898a64517b0 100644
--- a/arch/arm/mach-ux500/devices-common.c
+++ b/arch/arm/mach-ux500/devices-common.c
@@ -26,29 +26,22 @@ dbx500_add_amba_device(const char *name, resource_size_t base,
26 struct amba_device *dev; 26 struct amba_device *dev;
27 int ret; 27 int ret;
28 28
29 dev = kzalloc(sizeof *dev, GFP_KERNEL); 29 dev = amba_device_alloc(name, base, SZ_4K);
30 if (!dev) 30 if (!dev)
31 return ERR_PTR(-ENOMEM); 31 return ERR_PTR(-ENOMEM);
32 32
33 dev->dev.init_name = name;
34
35 dev->res.start = base;
36 dev->res.end = base + SZ_4K - 1;
37 dev->res.flags = IORESOURCE_MEM;
38
39 dev->dma_mask = DMA_BIT_MASK(32); 33 dev->dma_mask = DMA_BIT_MASK(32);
40 dev->dev.coherent_dma_mask = DMA_BIT_MASK(32); 34 dev->dev.coherent_dma_mask = DMA_BIT_MASK(32);
41 35
42 dev->irq[0] = irq; 36 dev->irq[0] = irq;
43 dev->irq[1] = NO_IRQ;
44 37
45 dev->periphid = periphid; 38 dev->periphid = periphid;
46 39
47 dev->dev.platform_data = pdata; 40 dev->dev.platform_data = pdata;
48 41
49 ret = amba_device_register(dev, &iomem_resource); 42 ret = amba_device_add(dev, &iomem_resource);
50 if (ret) { 43 if (ret) {
51 kfree(dev); 44 amba_device_put(dev);
52 return ERR_PTR(ret); 45 return ERR_PTR(ret);
53 } 46 }
54 47
diff --git a/arch/arm/mach-ux500/include/mach/entry-macro.S b/arch/arm/mach-ux500/include/mach/entry-macro.S
deleted file mode 100644
index e16299e1020..00000000000
--- a/arch/arm/mach-ux500/include/mach/entry-macro.S
+++ /dev/null
@@ -1,18 +0,0 @@
1/*
2 * Low-level IRQ helper macros for U8500 platforms
3 *
4 * Copyright (C) 2009 ST-Ericsson.
5 *
6 * This file is a copy of ARM Realview platform.
7 * -just satisfied checkpatch script.
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14 .macro disable_fiq
15 .endm
16
17 .macro arch_ret_to_user, tmp1, tmp2
18 .endm
diff --git a/arch/arm/mach-ux500/include/mach/system.h b/arch/arm/mach-ux500/include/mach/system.h
deleted file mode 100644
index 258e5c919c2..00000000000
--- a/arch/arm/mach-ux500/include/mach/system.h
+++ /dev/null
@@ -1,20 +0,0 @@
1/*
2 * Copyright (C) 2009 ST-Ericsson.
3 *
4 * This file is licensed under the terms of the GNU General Public
5 * License version 2. This program is licensed "as is" without any
6 * warranty of any kind, whether express or implied.
7 */
8#ifndef __ASM_ARCH_SYSTEM_H
9#define __ASM_ARCH_SYSTEM_H
10
11static inline void arch_idle(void)
12{
13 /*
14 * This should do all the clock switching
15 * and wait for interrupt tricks
16 */
17 cpu_do_idle();
18}
19
20#endif
diff --git a/arch/arm/mach-versatile/core.c b/arch/arm/mach-versatile/core.c
index 02b7b9303f3..4f352e45be0 100644
--- a/arch/arm/mach-versatile/core.c
+++ b/arch/arm/mach-versatile/core.c
@@ -582,58 +582,58 @@ static struct pl022_ssp_controller ssp0_plat_data = {
582 .num_chipselect = 1, 582 .num_chipselect = 1,
583}; 583};
584 584
585#define AACI_IRQ { IRQ_AACI, NO_IRQ } 585#define AACI_IRQ { IRQ_AACI }
586#define MMCI0_IRQ { IRQ_MMCI0A,IRQ_SIC_MMCI0B } 586#define MMCI0_IRQ { IRQ_MMCI0A,IRQ_SIC_MMCI0B }
587#define KMI0_IRQ { IRQ_SIC_KMI0, NO_IRQ } 587#define KMI0_IRQ { IRQ_SIC_KMI0 }
588#define KMI1_IRQ { IRQ_SIC_KMI1, NO_IRQ } 588#define KMI1_IRQ { IRQ_SIC_KMI1 }
589 589
590/* 590/*
591 * These devices are connected directly to the multi-layer AHB switch 591 * These devices are connected directly to the multi-layer AHB switch
592 */ 592 */
593#define SMC_IRQ { NO_IRQ, NO_IRQ } 593#define SMC_IRQ { }
594#define MPMC_IRQ { NO_IRQ, NO_IRQ } 594#define MPMC_IRQ { }
595#define CLCD_IRQ { IRQ_CLCDINT, NO_IRQ } 595#define CLCD_IRQ { IRQ_CLCDINT }
596#define DMAC_IRQ { IRQ_DMAINT, NO_IRQ } 596#define DMAC_IRQ { IRQ_DMAINT }
597 597
598/* 598/*
599 * These devices are connected via the core APB bridge 599 * These devices are connected via the core APB bridge
600 */ 600 */
601#define SCTL_IRQ { NO_IRQ, NO_IRQ } 601#define SCTL_IRQ { }
602#define WATCHDOG_IRQ { IRQ_WDOGINT, NO_IRQ } 602#define WATCHDOG_IRQ { IRQ_WDOGINT }
603#define GPIO0_IRQ { IRQ_GPIOINT0, NO_IRQ } 603#define GPIO0_IRQ { IRQ_GPIOINT0 }
604#define GPIO1_IRQ { IRQ_GPIOINT1, NO_IRQ } 604#define GPIO1_IRQ { IRQ_GPIOINT1 }
605#define RTC_IRQ { IRQ_RTCINT, NO_IRQ } 605#define RTC_IRQ { IRQ_RTCINT }
606 606
607/* 607/*
608 * These devices are connected via the DMA APB bridge 608 * These devices are connected via the DMA APB bridge
609 */ 609 */
610#define SCI_IRQ { IRQ_SCIINT, NO_IRQ } 610#define SCI_IRQ { IRQ_SCIINT }
611#define UART0_IRQ { IRQ_UARTINT0, NO_IRQ } 611#define UART0_IRQ { IRQ_UARTINT0 }
612#define UART1_IRQ { IRQ_UARTINT1, NO_IRQ } 612#define UART1_IRQ { IRQ_UARTINT1 }
613#define UART2_IRQ { IRQ_UARTINT2, NO_IRQ } 613#define UART2_IRQ { IRQ_UARTINT2 }
614#define SSP_IRQ { IRQ_SSPINT, NO_IRQ } 614#define SSP_IRQ { IRQ_SSPINT }
615 615
616/* FPGA Primecells */ 616/* FPGA Primecells */
617AMBA_DEVICE(aaci, "fpga:04", AACI, NULL); 617APB_DEVICE(aaci, "fpga:04", AACI, NULL);
618AMBA_DEVICE(mmc0, "fpga:05", MMCI0, &mmc0_plat_data); 618APB_DEVICE(mmc0, "fpga:05", MMCI0, &mmc0_plat_data);
619AMBA_DEVICE(kmi0, "fpga:06", KMI0, NULL); 619APB_DEVICE(kmi0, "fpga:06", KMI0, NULL);
620AMBA_DEVICE(kmi1, "fpga:07", KMI1, NULL); 620APB_DEVICE(kmi1, "fpga:07", KMI1, NULL);
621 621
622/* DevChip Primecells */ 622/* DevChip Primecells */
623AMBA_DEVICE(smc, "dev:00", SMC, NULL); 623AHB_DEVICE(smc, "dev:00", SMC, NULL);
624AMBA_DEVICE(mpmc, "dev:10", MPMC, NULL); 624AHB_DEVICE(mpmc, "dev:10", MPMC, NULL);
625AMBA_DEVICE(clcd, "dev:20", CLCD, &clcd_plat_data); 625AHB_DEVICE(clcd, "dev:20", CLCD, &clcd_plat_data);
626AMBA_DEVICE(dmac, "dev:30", DMAC, NULL); 626AHB_DEVICE(dmac, "dev:30", DMAC, NULL);
627AMBA_DEVICE(sctl, "dev:e0", SCTL, NULL); 627APB_DEVICE(sctl, "dev:e0", SCTL, NULL);
628AMBA_DEVICE(wdog, "dev:e1", WATCHDOG, NULL); 628APB_DEVICE(wdog, "dev:e1", WATCHDOG, NULL);
629AMBA_DEVICE(gpio0, "dev:e4", GPIO0, &gpio0_plat_data); 629APB_DEVICE(gpio0, "dev:e4", GPIO0, &gpio0_plat_data);
630AMBA_DEVICE(gpio1, "dev:e5", GPIO1, &gpio1_plat_data); 630APB_DEVICE(gpio1, "dev:e5", GPIO1, &gpio1_plat_data);
631AMBA_DEVICE(rtc, "dev:e8", RTC, NULL); 631APB_DEVICE(rtc, "dev:e8", RTC, NULL);
632AMBA_DEVICE(sci0, "dev:f0", SCI, NULL); 632APB_DEVICE(sci0, "dev:f0", SCI, NULL);
633AMBA_DEVICE(uart0, "dev:f1", UART0, NULL); 633APB_DEVICE(uart0, "dev:f1", UART0, NULL);
634AMBA_DEVICE(uart1, "dev:f2", UART1, NULL); 634APB_DEVICE(uart1, "dev:f2", UART1, NULL);
635AMBA_DEVICE(uart2, "dev:f3", UART2, NULL); 635APB_DEVICE(uart2, "dev:f3", UART2, NULL);
636AMBA_DEVICE(ssp0, "dev:f4", SSP, &ssp0_plat_data); 636APB_DEVICE(ssp0, "dev:f4", SSP, &ssp0_plat_data);
637 637
638static struct amba_device *amba_devs[] __initdata = { 638static struct amba_device *amba_devs[] __initdata = {
639 &dmac_device, 639 &dmac_device,
diff --git a/arch/arm/mach-versatile/core.h b/arch/arm/mach-versatile/core.h
index 2ef2f555f31..683e60776a8 100644
--- a/arch/arm/mach-versatile/core.h
+++ b/arch/arm/mach-versatile/core.h
@@ -36,20 +36,10 @@ extern unsigned int mmc_status(struct device *dev);
36extern struct of_dev_auxdata versatile_auxdata_lookup[]; 36extern struct of_dev_auxdata versatile_auxdata_lookup[];
37#endif 37#endif
38 38
39#define AMBA_DEVICE(name,busid,base,plat) \ 39#define APB_DEVICE(name, busid, base, plat) \
40static struct amba_device name##_device = { \ 40static AMBA_APB_DEVICE(name, busid, 0, VERSATILE_##base##_BASE, base##_IRQ, plat)
41 .dev = { \ 41
42 .coherent_dma_mask = ~0, \ 42#define AHB_DEVICE(name, busid, base, plat) \
43 .init_name = busid, \ 43static AMBA_AHB_DEVICE(name, busid, 0, VERSATILE_##base##_BASE, base##_IRQ, plat)
44 .platform_data = plat, \
45 }, \
46 .res = { \
47 .start = VERSATILE_##base##_BASE, \
48 .end = (VERSATILE_##base##_BASE) + SZ_4K - 1,\
49 .flags = IORESOURCE_MEM, \
50 }, \
51 .dma_mask = ~0, \
52 .irq = base##_IRQ, \
53}
54 44
55#endif 45#endif
diff --git a/arch/arm/mach-versatile/include/mach/entry-macro.S b/arch/arm/mach-versatile/include/mach/entry-macro.S
deleted file mode 100644
index b6f0dbf122e..00000000000
--- a/arch/arm/mach-versatile/include/mach/entry-macro.S
+++ /dev/null
@@ -1,15 +0,0 @@
1/*
2 * arch/arm/mach-versatile/include/mach/entry-macro.S
3 *
4 * Low-level IRQ helper macros for Versatile platforms
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10
11 .macro disable_fiq
12 .endm
13
14 .macro arch_ret_to_user, tmp1, tmp2
15 .endm
diff --git a/arch/arm/mach-versatile/include/mach/system.h b/arch/arm/mach-versatile/include/mach/system.h
deleted file mode 100644
index f3fa347895f..00000000000
--- a/arch/arm/mach-versatile/include/mach/system.h
+++ /dev/null
@@ -1,33 +0,0 @@
1/*
2 * arch/arm/mach-versatile/include/mach/system.h
3 *
4 * Copyright (C) 2003 ARM Limited
5 * Copyright (C) 2000 Deep Blue Solutions Ltd
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21#ifndef __ASM_ARCH_SYSTEM_H
22#define __ASM_ARCH_SYSTEM_H
23
24static inline void arch_idle(void)
25{
26 /*
27 * This should do all the clock switching
28 * and wait for interrupt tricks
29 */
30 cpu_do_idle();
31}
32
33#endif
diff --git a/arch/arm/mach-versatile/versatile_pb.c b/arch/arm/mach-versatile/versatile_pb.c
index 9581c197500..19738331bd3 100644
--- a/arch/arm/mach-versatile/versatile_pb.c
+++ b/arch/arm/mach-versatile/versatile_pb.c
@@ -58,28 +58,28 @@ static struct pl061_platform_data gpio3_plat_data = {
58 .irq_base = IRQ_GPIO3_START, 58 .irq_base = IRQ_GPIO3_START,
59}; 59};
60 60
61#define UART3_IRQ { IRQ_SIC_UART3, NO_IRQ } 61#define UART3_IRQ { IRQ_SIC_UART3 }
62#define SCI1_IRQ { IRQ_SIC_SCI3, NO_IRQ } 62#define SCI1_IRQ { IRQ_SIC_SCI3 }
63#define MMCI1_IRQ { IRQ_MMCI1A, IRQ_SIC_MMCI1B } 63#define MMCI1_IRQ { IRQ_MMCI1A, IRQ_SIC_MMCI1B }
64 64
65/* 65/*
66 * These devices are connected via the core APB bridge 66 * These devices are connected via the core APB bridge
67 */ 67 */
68#define GPIO2_IRQ { IRQ_GPIOINT2, NO_IRQ } 68#define GPIO2_IRQ { IRQ_GPIOINT2 }
69#define GPIO3_IRQ { IRQ_GPIOINT3, NO_IRQ } 69#define GPIO3_IRQ { IRQ_GPIOINT3 }
70 70
71/* 71/*
72 * These devices are connected via the DMA APB bridge 72 * These devices are connected via the DMA APB bridge
73 */ 73 */
74 74
75/* FPGA Primecells */ 75/* FPGA Primecells */
76AMBA_DEVICE(uart3, "fpga:09", UART3, NULL); 76APB_DEVICE(uart3, "fpga:09", UART3, NULL);
77AMBA_DEVICE(sci1, "fpga:0a", SCI1, NULL); 77APB_DEVICE(sci1, "fpga:0a", SCI1, NULL);
78AMBA_DEVICE(mmc1, "fpga:0b", MMCI1, &mmc1_plat_data); 78APB_DEVICE(mmc1, "fpga:0b", MMCI1, &mmc1_plat_data);
79 79
80/* DevChip Primecells */ 80/* DevChip Primecells */
81AMBA_DEVICE(gpio2, "dev:e6", GPIO2, &gpio2_plat_data); 81APB_DEVICE(gpio2, "dev:e6", GPIO2, &gpio2_plat_data);
82AMBA_DEVICE(gpio3, "dev:e7", GPIO3, &gpio3_plat_data); 82APB_DEVICE(gpio3, "dev:e7", GPIO3, &gpio3_plat_data);
83 83
84static struct amba_device *amba_devs[] __initdata = { 84static struct amba_device *amba_devs[] __initdata = {
85 &uart3_device, 85 &uart3_device,
diff --git a/arch/arm/mach-vexpress/core.h b/arch/arm/mach-vexpress/core.h
index f4397159c17..9f0f2827c71 100644
--- a/arch/arm/mach-vexpress/core.h
+++ b/arch/arm/mach-vexpress/core.h
@@ -1,19 +1,2 @@
1#define __MMIO_P2V(x) (((x) & 0xfffff) | (((x) & 0x0f000000) >> 4) | 0xf8000000) 1#define __MMIO_P2V(x) (((x) & 0xfffff) | (((x) & 0x0f000000) >> 4) | 0xf8000000)
2#define MMIO_P2V(x) ((void __iomem *)__MMIO_P2V(x)) 2#define MMIO_P2V(x) ((void __iomem *)__MMIO_P2V(x))
3
4#define AMBA_DEVICE(name,busid,base,plat) \
5struct amba_device name##_device = { \
6 .dev = { \
7 .coherent_dma_mask = ~0UL, \
8 .init_name = busid, \
9 .platform_data = plat, \
10 }, \
11 .res = { \
12 .start = base, \
13 .end = base + SZ_4K - 1, \
14 .flags = IORESOURCE_MEM, \
15 }, \
16 .dma_mask = ~0UL, \
17 .irq = IRQ_##base, \
18 /* .dma = DMA_##base,*/ \
19}
diff --git a/arch/arm/mach-vexpress/ct-ca9x4.c b/arch/arm/mach-vexpress/ct-ca9x4.c
index b1e87c184e5..1b1d2e4892b 100644
--- a/arch/arm/mach-vexpress/ct-ca9x4.c
+++ b/arch/arm/mach-vexpress/ct-ca9x4.c
@@ -109,10 +109,10 @@ static struct clcd_board ct_ca9x4_clcd_data = {
109 .remove = versatile_clcd_remove_dma, 109 .remove = versatile_clcd_remove_dma,
110}; 110};
111 111
112static AMBA_DEVICE(clcd, "ct:clcd", CT_CA9X4_CLCDC, &ct_ca9x4_clcd_data); 112static AMBA_AHB_DEVICE(clcd, "ct:clcd", 0, CT_CA9X4_CLCDC, IRQ_CT_CA9X4_CLCDC, &ct_ca9x4_clcd_data);
113static AMBA_DEVICE(dmc, "ct:dmc", CT_CA9X4_DMC, NULL); 113static AMBA_APB_DEVICE(dmc, "ct:dmc", 0, CT_CA9X4_DMC, IRQ_CT_CA9X4_DMC, NULL);
114static AMBA_DEVICE(smc, "ct:smc", CT_CA9X4_SMC, NULL); 114static AMBA_APB_DEVICE(smc, "ct:smc", 0, CT_CA9X4_SMC, IRQ_CT_CA9X4_SMC, NULL);
115static AMBA_DEVICE(gpio, "ct:gpio", CT_CA9X4_GPIO, NULL); 115static AMBA_APB_DEVICE(gpio, "ct:gpio", 0, CT_CA9X4_GPIO, IRQ_CT_CA9X4_GPIO, NULL);
116 116
117static struct amba_device *ct_ca9x4_amba_devs[] __initdata = { 117static struct amba_device *ct_ca9x4_amba_devs[] __initdata = {
118 &clcd_device, 118 &clcd_device,
diff --git a/arch/arm/mach-vexpress/include/mach/ct-ca9x4.h b/arch/arm/mach-vexpress/include/mach/ct-ca9x4.h
index a34d3d4faae..a40468f3b93 100644
--- a/arch/arm/mach-vexpress/include/mach/ct-ca9x4.h
+++ b/arch/arm/mach-vexpress/include/mach/ct-ca9x4.h
@@ -35,7 +35,7 @@
35 * Interrupts. Those in {} are for AMBA devices 35 * Interrupts. Those in {} are for AMBA devices
36 */ 36 */
37#define IRQ_CT_CA9X4_CLCDC { 76 } 37#define IRQ_CT_CA9X4_CLCDC { 76 }
38#define IRQ_CT_CA9X4_DMC { -1 } 38#define IRQ_CT_CA9X4_DMC { 0 }
39#define IRQ_CT_CA9X4_SMC { 77, 78 } 39#define IRQ_CT_CA9X4_SMC { 77, 78 }
40#define IRQ_CT_CA9X4_TIMER0 80 40#define IRQ_CT_CA9X4_TIMER0 80
41#define IRQ_CT_CA9X4_TIMER1 81 41#define IRQ_CT_CA9X4_TIMER1 81
diff --git a/arch/arm/mach-vexpress/include/mach/entry-macro.S b/arch/arm/mach-vexpress/include/mach/entry-macro.S
deleted file mode 100644
index a14f9e62ca9..00000000000
--- a/arch/arm/mach-vexpress/include/mach/entry-macro.S
+++ /dev/null
@@ -1,5 +0,0 @@
1 .macro disable_fiq
2 .endm
3
4 .macro arch_ret_to_user, tmp1, tmp2
5 .endm
diff --git a/arch/arm/mach-vexpress/include/mach/system.h b/arch/arm/mach-vexpress/include/mach/system.h
deleted file mode 100644
index f653a8e265b..00000000000
--- a/arch/arm/mach-vexpress/include/mach/system.h
+++ /dev/null
@@ -1,33 +0,0 @@
1/*
2 * arch/arm/mach-vexpress/include/mach/system.h
3 *
4 * Copyright (C) 2003 ARM Limited
5 * Copyright (C) 2000 Deep Blue Solutions Ltd
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21#ifndef __ASM_ARCH_SYSTEM_H
22#define __ASM_ARCH_SYSTEM_H
23
24static inline void arch_idle(void)
25{
26 /*
27 * This should do all the clock switching
28 * and wait for interrupt tricks
29 */
30 cpu_do_idle();
31}
32
33#endif
diff --git a/arch/arm/mach-vexpress/v2m.c b/arch/arm/mach-vexpress/v2m.c
index b4a28ca0e50..ad64f97a200 100644
--- a/arch/arm/mach-vexpress/v2m.c
+++ b/arch/arm/mach-vexpress/v2m.c
@@ -266,16 +266,16 @@ static struct mmci_platform_data v2m_mmci_data = {
266 .status = v2m_mmci_status, 266 .status = v2m_mmci_status,
267}; 267};
268 268
269static AMBA_DEVICE(aaci, "mb:aaci", V2M_AACI, NULL); 269static AMBA_APB_DEVICE(aaci, "mb:aaci", 0, V2M_AACI, IRQ_V2M_AACI, NULL);
270static AMBA_DEVICE(mmci, "mb:mmci", V2M_MMCI, &v2m_mmci_data); 270static AMBA_APB_DEVICE(mmci, "mb:mmci", 0, V2M_MMCI, IRQ_V2M_MMCI, &v2m_mmci_data);
271static AMBA_DEVICE(kmi0, "mb:kmi0", V2M_KMI0, NULL); 271static AMBA_APB_DEVICE(kmi0, "mb:kmi0", 0, V2M_KMI0, IRQ_V2M_KMI0, NULL);
272static AMBA_DEVICE(kmi1, "mb:kmi1", V2M_KMI1, NULL); 272static AMBA_APB_DEVICE(kmi1, "mb:kmi1", 0, V2M_KMI1, IRQ_V2M_KMI1, NULL);
273static AMBA_DEVICE(uart0, "mb:uart0", V2M_UART0, NULL); 273static AMBA_APB_DEVICE(uart0, "mb:uart0", 0, V2M_UART0, IRQ_V2M_UART0, NULL);
274static AMBA_DEVICE(uart1, "mb:uart1", V2M_UART1, NULL); 274static AMBA_APB_DEVICE(uart1, "mb:uart1", 0, V2M_UART1, IRQ_V2M_UART1, NULL);
275static AMBA_DEVICE(uart2, "mb:uart2", V2M_UART2, NULL); 275static AMBA_APB_DEVICE(uart2, "mb:uart2", 0, V2M_UART2, IRQ_V2M_UART2, NULL);
276static AMBA_DEVICE(uart3, "mb:uart3", V2M_UART3, NULL); 276static AMBA_APB_DEVICE(uart3, "mb:uart3", 0, V2M_UART3, IRQ_V2M_UART3, NULL);
277static AMBA_DEVICE(wdt, "mb:wdt", V2M_WDT, NULL); 277static AMBA_APB_DEVICE(wdt, "mb:wdt", 0, V2M_WDT, IRQ_V2M_WDT, NULL);
278static AMBA_DEVICE(rtc, "mb:rtc", V2M_RTC, NULL); 278static AMBA_APB_DEVICE(rtc, "mb:rtc", 0, V2M_RTC, IRQ_V2M_RTC, NULL);
279 279
280static struct amba_device *v2m_amba_devs[] __initdata = { 280static struct amba_device *v2m_amba_devs[] __initdata = {
281 &aaci_device, 281 &aaci_device,
diff --git a/arch/arm/mach-vt8500/include/mach/entry-macro.S b/arch/arm/mach-vt8500/include/mach/entry-macro.S
index 92684c7eaed..367d1b55fb9 100644
--- a/arch/arm/mach-vt8500/include/mach/entry-macro.S
+++ b/arch/arm/mach-vt8500/include/mach/entry-macro.S
@@ -8,18 +8,12 @@
8 * warranty of any kind, whether express or implied. 8 * warranty of any kind, whether express or implied.
9 */ 9 */
10 10
11 .macro disable_fiq
12 .endm
13
14 .macro get_irqnr_preamble, base, tmp 11 .macro get_irqnr_preamble, base, tmp
15 @ physical 0xd8140000 is virtual 0xf8140000 12 @ physical 0xd8140000 is virtual 0xf8140000
16 mov \base, #0xf8000000 13 mov \base, #0xf8000000
17 orr \base, \base, #0x00140000 14 orr \base, \base, #0x00140000
18 .endm 15 .endm
19 16
20 .macro arch_ret_to_user, tmp1, tmp2
21 .endm
22
23 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp 17 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
24 ldr \irqnr, [\base] 18 ldr \irqnr, [\base]
25 cmp \irqnr, #63 @ may be false positive, check interrupt status 19 cmp \irqnr, #63 @ may be false positive, check interrupt status
diff --git a/arch/arm/mach-vt8500/include/mach/system.h b/arch/arm/mach-vt8500/include/mach/system.h
index d6c757eaf26..58fa8010ee6 100644
--- a/arch/arm/mach-vt8500/include/mach/system.h
+++ b/arch/arm/mach-vt8500/include/mach/system.h
@@ -7,11 +7,6 @@
7/* PM Software Reset request register */ 7/* PM Software Reset request register */
8#define VT8500_PMSR_VIRT 0xf8130060 8#define VT8500_PMSR_VIRT 0xf8130060
9 9
10static inline void arch_idle(void)
11{
12 cpu_do_idle();
13}
14
15static inline void arch_reset(char mode, const char *cmd) 10static inline void arch_reset(char mode, const char *cmd)
16{ 11{
17 writel(1, VT8500_PMSR_VIRT); 12 writel(1, VT8500_PMSR_VIRT);
diff --git a/arch/arm/mach-w90x900/dev.c b/arch/arm/mach-w90x900/dev.c
index 78110befb7a..db82568a998 100644
--- a/arch/arm/mach-w90x900/dev.c
+++ b/arch/arm/mach-w90x900/dev.c
@@ -530,6 +530,7 @@ static struct platform_device *nuc900_public_dev[] __initdata = {
530 530
531void __init nuc900_board_init(struct platform_device **device, int size) 531void __init nuc900_board_init(struct platform_device **device, int size)
532{ 532{
533 disable_hlt();
533 platform_add_devices(device, size); 534 platform_add_devices(device, size);
534 platform_add_devices(nuc900_public_dev, ARRAY_SIZE(nuc900_public_dev)); 535 platform_add_devices(nuc900_public_dev, ARRAY_SIZE(nuc900_public_dev));
535 spi_register_board_info(nuc900_spi_board_info, 536 spi_register_board_info(nuc900_spi_board_info,
diff --git a/arch/arm/mach-w90x900/include/mach/entry-macro.S b/arch/arm/mach-w90x900/include/mach/entry-macro.S
index d39aca5be9e..e286daca682 100644
--- a/arch/arm/mach-w90x900/include/mach/entry-macro.S
+++ b/arch/arm/mach-w90x900/include/mach/entry-macro.S
@@ -15,9 +15,6 @@
15 .macro get_irqnr_preamble, base, tmp 15 .macro get_irqnr_preamble, base, tmp
16 .endm 16 .endm
17 17
18 .macro arch_ret_to_user, tmp1, tmp2
19 .endm
20
21 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp 18 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
22 19
23 mov \base, #AIC_BA 20 mov \base, #AIC_BA
@@ -27,8 +24,3 @@
27 cmp \irqnr, #0 24 cmp \irqnr, #0
28 25
29 .endm 26 .endm
30
31 /* currently don't need an disable_fiq macro */
32
33 .macro disable_fiq
34 .endm
diff --git a/arch/arm/mach-w90x900/include/mach/system.h b/arch/arm/mach-w90x900/include/mach/system.h
deleted file mode 100644
index 2aaeb931161..00000000000
--- a/arch/arm/mach-w90x900/include/mach/system.h
+++ /dev/null
@@ -1,19 +0,0 @@
1/*
2 * arch/arm/mach-w90x900/include/mach/system.h
3 *
4 * Copyright (c) 2008 Nuvoton technology corporation
5 * All rights reserved.
6 *
7 * Wan ZongShun <mcuos.com@gmail.com>
8 *
9 * Based on arch/arm/mach-s3c2410/include/mach/system.h
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 */
17static void arch_idle(void)
18{
19}
diff --git a/arch/arm/mach-zynq/include/mach/entry-macro.S b/arch/arm/mach-zynq/include/mach/entry-macro.S
deleted file mode 100644
index d621fb73256..00000000000
--- a/arch/arm/mach-zynq/include/mach/entry-macro.S
+++ /dev/null
@@ -1,27 +0,0 @@
1/*
2 * arch/arm/mach-zynq/include/mach/entry-macro.S
3 *
4 * Low-level IRQ helper macros
5 *
6 * Copyright (C) 2011 Xilinx
7 *
8 * based on arch/plat-mxc/include/mach/entry-macro.S
9 *
10 * Copyright (C) 2007 Lennert Buytenhek <buytenh@wantstofly.org>
11 * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
12 *
13 * This software is licensed under the terms of the GNU General Public
14 * License version 2, as published by the Free Software Foundation, and
15 * may be copied, distributed, and modified under those terms.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 */
22
23 .macro disable_fiq
24 .endm
25
26 .macro arch_ret_to_user, tmp1, tmp2
27 .endm
diff --git a/arch/arm/mach-zynq/include/mach/system.h b/arch/arm/mach-zynq/include/mach/system.h
deleted file mode 100644
index 8e88e0b8d2b..00000000000
--- a/arch/arm/mach-zynq/include/mach/system.h
+++ /dev/null
@@ -1,23 +0,0 @@
1/* arch/arm/mach-zynq/include/mach/system.h
2 *
3 * Copyright (C) 2011 Xilinx
4 *
5 * This software is licensed under the terms of the GNU General Public
6 * License version 2, as published by the Free Software Foundation, and
7 * may be copied, distributed, and modified under those terms.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 */
14
15#ifndef __MACH_SYSTEM_H__
16#define __MACH_SYSTEM_H__
17
18static inline void arch_idle(void)
19{
20 cpu_do_idle();
21}
22
23#endif
diff --git a/arch/arm/plat-mxc/include/mach/entry-macro.S b/arch/arm/plat-mxc/include/mach/entry-macro.S
deleted file mode 100644
index def5d30cb67..00000000000
--- a/arch/arm/plat-mxc/include/mach/entry-macro.S
+++ /dev/null
@@ -1,16 +0,0 @@
1/*
2 * Copyright (C) 2007 Lennert Buytenhek <buytenh@wantstofly.org>
3 * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved.
4 */
5
6/*
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12 .macro disable_fiq
13 .endm
14
15 .macro arch_ret_to_user, tmp1, tmp2
16 .endm
diff --git a/arch/arm/plat-mxc/include/mach/system.h b/arch/arm/plat-mxc/include/mach/system.h
deleted file mode 100644
index 13ad0df2e86..00000000000
--- a/arch/arm/plat-mxc/include/mach/system.h
+++ /dev/null
@@ -1,25 +0,0 @@
1/*
2 * Copyright (C) 1999 ARM Limited
3 * Copyright (C) 2000 Deep Blue Solutions Ltd
4 * Copyright 2004-2008 Freescale Semiconductor, Inc. All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 */
16
17#ifndef __ASM_ARCH_MXC_SYSTEM_H__
18#define __ASM_ARCH_MXC_SYSTEM_H__
19
20static inline void arch_idle(void)
21{
22 cpu_do_idle();
23}
24
25#endif /* __ASM_ARCH_MXC_SYSTEM_H__ */
diff --git a/arch/arm/plat-omap/counter_32k.c b/arch/arm/plat-omap/counter_32k.c
index 5f0f2292b7f..5068fe5a691 100644
--- a/arch/arm/plat-omap/counter_32k.c
+++ b/arch/arm/plat-omap/counter_32k.c
@@ -21,6 +21,7 @@
21 21
22#include <asm/sched_clock.h> 22#include <asm/sched_clock.h>
23 23
24#include <plat/hardware.h>
24#include <plat/common.h> 25#include <plat/common.h>
25#include <plat/board.h> 26#include <plat/board.h>
26 27
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index 002fb4d96bb..95c3ed693f6 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -164,6 +164,8 @@ static inline void set_gdma_dev(int req, int dev)
164} 164}
165#else 165#else
166#define set_gdma_dev(req, dev) do {} while (0) 166#define set_gdma_dev(req, dev) do {} while (0)
167#define omap_readl(reg) 0
168#define omap_writel(val, reg) do {} while (0)
167#endif 169#endif
168 170
169void omap_set_dma_priority(int lch, int dst_port, int priority) 171void omap_set_dma_priority(int lch, int dst_port, int priority)
diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c
index af3b92be845..2678260d9fe 100644
--- a/arch/arm/plat-omap/dmtimer.c
+++ b/arch/arm/plat-omap/dmtimer.c
@@ -43,6 +43,8 @@
43 43
44#include <plat/dmtimer.h> 44#include <plat/dmtimer.h>
45 45
46#include <mach/hardware.h>
47
46static LIST_HEAD(omap_timer_list); 48static LIST_HEAD(omap_timer_list);
47static DEFINE_SPINLOCK(dm_timer_lock); 49static DEFINE_SPINLOCK(dm_timer_lock);
48 50
diff --git a/arch/arm/plat-omap/include/plat/hardware.h b/arch/arm/plat-omap/include/plat/hardware.h
index e897978371c..537b05ae1f5 100644
--- a/arch/arm/plat-omap/include/plat/hardware.h
+++ b/arch/arm/plat-omap/include/plat/hardware.h
@@ -43,6 +43,12 @@
43#endif 43#endif
44#include <plat/serial.h> 44#include <plat/serial.h>
45 45
46#ifdef __ASSEMBLER__
47#define IOMEM(x) (x)
48#else
49#define IOMEM(x) ((void __force __iomem *)(x))
50#endif
51
46/* 52/*
47 * --------------------------------------------------------------------------- 53 * ---------------------------------------------------------------------------
48 * Common definitions for all OMAP processors 54 * Common definitions for all OMAP processors
diff --git a/arch/arm/plat-omap/include/plat/keypad.h b/arch/arm/plat-omap/include/plat/keypad.h
index 793ce9d5329..a6b21eddb21 100644
--- a/arch/arm/plat-omap/include/plat/keypad.h
+++ b/arch/arm/plat-omap/include/plat/keypad.h
@@ -12,6 +12,8 @@
12 12
13#ifndef CONFIG_ARCH_OMAP1 13#ifndef CONFIG_ARCH_OMAP1
14#warning Please update the board to use matrix-keypad driver 14#warning Please update the board to use matrix-keypad driver
15#define omap_readw(reg) 0
16#define omap_writew(val, reg) do {} while (0)
15#endif 17#endif
16#include <linux/input/matrix_keypad.h> 18#include <linux/input/matrix_keypad.h>
17 19
diff --git a/arch/arm/plat-omap/include/plat/mcspi.h b/arch/arm/plat-omap/include/plat/mcspi.h
index 3d51b18131c..a357eb26bd2 100644
--- a/arch/arm/plat-omap/include/plat/mcspi.h
+++ b/arch/arm/plat-omap/include/plat/mcspi.h
@@ -18,9 +18,6 @@ struct omap2_mcspi_dev_attr {
18 18
19struct omap2_mcspi_device_config { 19struct omap2_mcspi_device_config {
20 unsigned turbo_mode:1; 20 unsigned turbo_mode:1;
21
22 /* Do we want one channel enabled at the same time? */
23 unsigned single_channel:1;
24}; 21};
25 22
26#endif 23#endif
diff --git a/arch/arm/plat-omap/include/plat/omap_device.h b/arch/arm/plat-omap/include/plat/omap_device.h
index 05f7615b61f..4327b2c90c3 100644
--- a/arch/arm/plat-omap/include/plat/omap_device.h
+++ b/arch/arm/plat-omap/include/plat/omap_device.h
@@ -36,7 +36,7 @@
36 36
37#include <plat/omap_hwmod.h> 37#include <plat/omap_hwmod.h>
38 38
39extern struct device omap_device_parent; 39extern struct dev_pm_domain omap_device_pm_domain;
40 40
41/* omap_device._state values */ 41/* omap_device._state values */
42#define OMAP_DEVICE_STATE_UNKNOWN 0 42#define OMAP_DEVICE_STATE_UNKNOWN 0
diff --git a/arch/arm/plat-omap/include/plat/system.h b/arch/arm/plat-omap/include/plat/system.h
deleted file mode 100644
index 8e5ebd74b12..00000000000
--- a/arch/arm/plat-omap/include/plat/system.h
+++ /dev/null
@@ -1,15 +0,0 @@
1/*
2 * Copied from arch/arm/mach-sa1100/include/mach/system.h
3 * Copyright (c) 1999 Nicolas Pitre <nico@fluxnic.net>
4 */
5#ifndef __ASM_ARCH_SYSTEM_H
6#define __ASM_ARCH_SYSTEM_H
7
8#include <asm/proc-fns.h>
9
10static inline void arch_idle(void)
11{
12 cpu_do_idle();
13}
14
15#endif
diff --git a/arch/arm/plat-omap/include/plat/tc.h b/arch/arm/plat-omap/include/plat/tc.h
index d2fcd789bb9..1b4b2da8620 100644
--- a/arch/arm/plat-omap/include/plat/tc.h
+++ b/arch/arm/plat-omap/include/plat/tc.h
@@ -84,23 +84,6 @@
84#define EMIFS_CCS(n) (EMIFS_CS0_CONFIG + (4 * (n))) 84#define EMIFS_CCS(n) (EMIFS_CS0_CONFIG + (4 * (n)))
85#define EMIFS_ACS(n) (EMIFS_ACS0 + (4 * (n))) 85#define EMIFS_ACS(n) (EMIFS_ACS0 + (4 * (n)))
86 86
87/* Almost all documentation for chip and board memory maps assumes
88 * BM is clear. Most devel boards have a switch to control booting
89 * from NOR flash (using external chipselect 3) rather than mask ROM,
90 * which uses BM to interchange the physical CS0 and CS3 addresses.
91 */
92static inline u32 omap_cs0_phys(void)
93{
94 return (omap_readl(EMIFS_CONFIG) & OMAP_EMIFS_CONFIG_BM)
95 ? OMAP_CS3_PHYS : 0;
96}
97
98static inline u32 omap_cs3_phys(void)
99{
100 return (omap_readl(EMIFS_CONFIG) & OMAP_EMIFS_CONFIG_BM)
101 ? 0 : OMAP_CS3_PHYS;
102}
103
104#endif /* __ASSEMBLER__ */ 87#endif /* __ASSEMBLER__ */
105 88
106#endif /* __ASM_ARCH_TC_H */ 89#endif /* __ASM_ARCH_TC_H */
diff --git a/arch/arm/plat-omap/include/plat/usb.h b/arch/arm/plat-omap/include/plat/usb.h
index dc864b580da..d0fc9f4dc15 100644
--- a/arch/arm/plat-omap/include/plat/usb.h
+++ b/arch/arm/plat-omap/include/plat/usb.h
@@ -3,6 +3,7 @@
3#ifndef __ASM_ARCH_OMAP_USB_H 3#ifndef __ASM_ARCH_OMAP_USB_H
4#define __ASM_ARCH_OMAP_USB_H 4#define __ASM_ARCH_OMAP_USB_H
5 5
6#include <linux/io.h>
6#include <linux/usb/musb.h> 7#include <linux/usb/musb.h>
7#include <plat/board.h> 8#include <plat/board.h>
8 9
@@ -105,6 +106,46 @@ extern int omap4430_phy_set_clk(struct device *dev, int on);
105extern int omap4430_phy_init(struct device *dev); 106extern int omap4430_phy_init(struct device *dev);
106extern int omap4430_phy_exit(struct device *dev); 107extern int omap4430_phy_exit(struct device *dev);
107extern int omap4430_phy_suspend(struct device *dev, int suspend); 108extern int omap4430_phy_suspend(struct device *dev, int suspend);
109
110/*
111 * NOTE: Please update omap USB drivers to use ioremap + read/write
112 */
113
114#define OMAP2_L4_IO_OFFSET 0xb2000000
115#define IOMEM(x) ((void __force __iomem *)(x))
116#define OMAP2_L4_IO_ADDRESS(pa) IOMEM((pa) + OMAP2_L4_IO_OFFSET)
117
118static inline u8 omap_readb(u32 pa)
119{
120 return __raw_readb(OMAP2_L4_IO_ADDRESS(pa));
121}
122
123static inline u16 omap_readw(u32 pa)
124{
125 return __raw_readw(OMAP2_L4_IO_ADDRESS(pa));
126}
127
128static inline u32 omap_readl(u32 pa)
129{
130 return __raw_readl(OMAP2_L4_IO_ADDRESS(pa));
131}
132
133static inline void omap_writeb(u8 v, u32 pa)
134{
135 __raw_writeb(v, OMAP2_L4_IO_ADDRESS(pa));
136}
137
138
139static inline void omap_writew(u16 v, u32 pa)
140{
141 __raw_writew(v, OMAP2_L4_IO_ADDRESS(pa));
142}
143
144static inline void omap_writel(u32 v, u32 pa)
145{
146 __raw_writel(v, OMAP2_L4_IO_ADDRESS(pa));
147}
148
108#endif 149#endif
109 150
110extern void am35x_musb_reset(void); 151extern void am35x_musb_reset(void);
diff --git a/arch/arm/plat-omap/mux.c b/arch/arm/plat-omap/mux.c
index 0d4aa0d5876..cff8712122b 100644
--- a/arch/arm/plat-omap/mux.c
+++ b/arch/arm/plat-omap/mux.c
@@ -26,8 +26,11 @@
26#include <linux/init.h> 26#include <linux/init.h>
27#include <linux/kernel.h> 27#include <linux/kernel.h>
28#include <linux/io.h> 28#include <linux/io.h>
29#include <asm/system.h>
30#include <linux/spinlock.h> 29#include <linux/spinlock.h>
30
31#include <asm/system.h>
32
33#include <plat/cpu.h>
31#include <plat/mux.h> 34#include <plat/mux.h>
32 35
33#ifdef CONFIG_OMAP_MUX 36#ifdef CONFIG_OMAP_MUX
diff --git a/arch/arm/plat-omap/omap-pm-noop.c b/arch/arm/plat-omap/omap-pm-noop.c
index 3dc3801aace..5a97b4d98d4 100644
--- a/arch/arm/plat-omap/omap-pm-noop.c
+++ b/arch/arm/plat-omap/omap-pm-noop.c
@@ -319,7 +319,7 @@ int omap_pm_get_dev_context_loss_count(struct device *dev)
319 if (WARN_ON(!dev)) 319 if (WARN_ON(!dev))
320 return -ENODEV; 320 return -ENODEV;
321 321
322 if (dev->parent == &omap_device_parent) { 322 if (dev->pm_domain == &omap_device_pm_domain) {
323 count = omap_device_get_context_loss_count(pdev); 323 count = omap_device_get_context_loss_count(pdev);
324 } else { 324 } else {
325 WARN_ONCE(off_mode_enabled, "omap_pm: using dummy context loss counter; device %s should be converted to omap_device", 325 WARN_ONCE(off_mode_enabled, "omap_pm: using dummy context loss counter; device %s should be converted to omap_device",
diff --git a/arch/arm/plat-omap/omap_device.c b/arch/arm/plat-omap/omap_device.c
index 2d00ab01d15..6de28ea3cd6 100644
--- a/arch/arm/plat-omap/omap_device.c
+++ b/arch/arm/plat-omap/omap_device.c
@@ -314,8 +314,6 @@ static void _add_hwmod_clocks_clkdev(struct omap_device *od,
314} 314}
315 315
316 316
317static struct dev_pm_domain omap_device_pm_domain;
318
319/** 317/**
320 * omap_device_build_from_dt - build an omap_device with multiple hwmods 318 * omap_device_build_from_dt - build an omap_device with multiple hwmods
321 * @pdev_name: name of the platform_device driver to use 319 * @pdev_name: name of the platform_device driver to use
@@ -756,14 +754,12 @@ static int _od_suspend_noirq(struct device *dev)
756 struct omap_device *od = to_omap_device(pdev); 754 struct omap_device *od = to_omap_device(pdev);
757 int ret; 755 int ret;
758 756
759 if (od->flags & OMAP_DEVICE_NO_IDLE_ON_SUSPEND)
760 return pm_generic_suspend_noirq(dev);
761
762 ret = pm_generic_suspend_noirq(dev); 757 ret = pm_generic_suspend_noirq(dev);
763 758
764 if (!ret && !pm_runtime_status_suspended(dev)) { 759 if (!ret && !pm_runtime_status_suspended(dev)) {
765 if (pm_generic_runtime_suspend(dev) == 0) { 760 if (pm_generic_runtime_suspend(dev) == 0) {
766 omap_device_idle(pdev); 761 if (!(od->flags & OMAP_DEVICE_NO_IDLE_ON_SUSPEND))
762 omap_device_idle(pdev);
767 od->flags |= OMAP_DEVICE_SUSPENDED; 763 od->flags |= OMAP_DEVICE_SUSPENDED;
768 } 764 }
769 } 765 }
@@ -776,13 +772,11 @@ static int _od_resume_noirq(struct device *dev)
776 struct platform_device *pdev = to_platform_device(dev); 772 struct platform_device *pdev = to_platform_device(dev);
777 struct omap_device *od = to_omap_device(pdev); 773 struct omap_device *od = to_omap_device(pdev);
778 774
779 if (od->flags & OMAP_DEVICE_NO_IDLE_ON_SUSPEND)
780 return pm_generic_resume_noirq(dev);
781
782 if ((od->flags & OMAP_DEVICE_SUSPENDED) && 775 if ((od->flags & OMAP_DEVICE_SUSPENDED) &&
783 !pm_runtime_status_suspended(dev)) { 776 !pm_runtime_status_suspended(dev)) {
784 od->flags &= ~OMAP_DEVICE_SUSPENDED; 777 od->flags &= ~OMAP_DEVICE_SUSPENDED;
785 omap_device_enable(pdev); 778 if (!(od->flags & OMAP_DEVICE_NO_IDLE_ON_SUSPEND))
779 omap_device_enable(pdev);
786 pm_generic_runtime_resume(dev); 780 pm_generic_runtime_resume(dev);
787 } 781 }
788 782
@@ -793,7 +787,7 @@ static int _od_resume_noirq(struct device *dev)
793#define _od_resume_noirq NULL 787#define _od_resume_noirq NULL
794#endif 788#endif
795 789
796static struct dev_pm_domain omap_device_pm_domain = { 790struct dev_pm_domain omap_device_pm_domain = {
797 .ops = { 791 .ops = {
798 SET_RUNTIME_PM_OPS(_od_runtime_suspend, _od_runtime_resume, 792 SET_RUNTIME_PM_OPS(_od_runtime_suspend, _od_runtime_resume,
799 _od_runtime_idle) 793 _od_runtime_idle)
@@ -815,7 +809,6 @@ int omap_device_register(struct platform_device *pdev)
815{ 809{
816 pr_debug("omap_device: %s: registering\n", pdev->name); 810 pr_debug("omap_device: %s: registering\n", pdev->name);
817 811
818 pdev->dev.parent = &omap_device_parent;
819 pdev->dev.pm_domain = &omap_device_pm_domain; 812 pdev->dev.pm_domain = &omap_device_pm_domain;
820 return platform_device_add(pdev); 813 return platform_device_add(pdev);
821} 814}
@@ -1124,11 +1117,6 @@ int omap_device_enable_clocks(struct omap_device *od)
1124 return 0; 1117 return 0;
1125} 1118}
1126 1119
1127struct device omap_device_parent = {
1128 .init_name = "omap",
1129 .parent = &platform_bus,
1130};
1131
1132static struct notifier_block platform_nb = { 1120static struct notifier_block platform_nb = {
1133 .notifier_call = _omap_device_notifier_call, 1121 .notifier_call = _omap_device_notifier_call,
1134}; 1122};
@@ -1136,6 +1124,6 @@ static struct notifier_block platform_nb = {
1136static int __init omap_device_init(void) 1124static int __init omap_device_init(void)
1137{ 1125{
1138 bus_register_notifier(&platform_bus_type, &platform_nb); 1126 bus_register_notifier(&platform_bus_type, &platform_nb);
1139 return device_register(&omap_device_parent); 1127 return 0;
1140} 1128}
1141core_initcall(omap_device_init); 1129core_initcall(omap_device_init);
diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c
index 4243bdcc87b..3022fc267d2 100644
--- a/arch/arm/plat-omap/sram.c
+++ b/arch/arm/plat-omap/sram.c
@@ -31,11 +31,10 @@
31 31
32#include "sram.h" 32#include "sram.h"
33 33
34/* XXX These "sideways" includes are a sign that something is wrong */ 34/* XXX These "sideways" includes will disappear when sram.c becomes a driver */
35#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) 35#include "../mach-omap2/iomap.h"
36# include "../mach-omap2/prm2xxx_3xxx.h" 36#include "../mach-omap2/prm2xxx_3xxx.h"
37# include "../mach-omap2/sdrc.h" 37#include "../mach-omap2/sdrc.h"
38#endif
39 38
40#define OMAP1_SRAM_PA 0x20000000 39#define OMAP1_SRAM_PA 0x20000000
41#define OMAP2_SRAM_PUB_PA (OMAP2_SRAM_PA + 0xf800) 40#define OMAP2_SRAM_PUB_PA (OMAP2_SRAM_PA + 0xf800)
diff --git a/arch/arm/plat-omap/usb.c b/arch/arm/plat-omap/usb.c
index f3570884883..d2bbfd1cb0b 100644
--- a/arch/arm/plat-omap/usb.c
+++ b/arch/arm/plat-omap/usb.c
@@ -29,6 +29,10 @@
29#include <plat/usb.h> 29#include <plat/usb.h>
30#include <plat/board.h> 30#include <plat/board.h>
31 31
32#include <mach/hardware.h>
33
34#include "../mach-omap2/common.h"
35
32#ifdef CONFIG_ARCH_OMAP_OTG 36#ifdef CONFIG_ARCH_OMAP_OTG
33 37
34void __init 38void __init
diff --git a/arch/arm/plat-s3c24xx/cpu.c b/arch/arm/plat-s3c24xx/cpu.c
index 21f1fda8b66..32a09931350 100644
--- a/arch/arm/plat-s3c24xx/cpu.c
+++ b/arch/arm/plat-s3c24xx/cpu.c
@@ -32,6 +32,7 @@
32#include <linux/io.h> 32#include <linux/io.h>
33 33
34#include <mach/hardware.h> 34#include <mach/hardware.h>
35#include <mach/regs-clock.h>
35#include <asm/irq.h> 36#include <asm/irq.h>
36#include <asm/cacheflush.h> 37#include <asm/cacheflush.h>
37 38
@@ -190,8 +191,34 @@ static unsigned long s3c24xx_read_idcode_v4(void)
190 return __raw_readl(S3C2410_GSTATUS1); 191 return __raw_readl(S3C2410_GSTATUS1);
191} 192}
192 193
194static void s3c24xx_default_idle(void)
195{
196 unsigned long tmp;
197 int i;
198
199 /* idle the system by using the idle mode which will wait for an
200 * interrupt to happen before restarting the system.
201 */
202
203 /* Warning: going into idle state upsets jtag scanning */
204
205 __raw_writel(__raw_readl(S3C2410_CLKCON) | S3C2410_CLKCON_IDLE,
206 S3C2410_CLKCON);
207
208 /* the samsung port seems to do a loop and then unset idle.. */
209 for (i = 0; i < 50; i++)
210 tmp += __raw_readl(S3C2410_CLKCON); /* ensure loop not optimised out */
211
212 /* this bit is not cleared on re-start... */
213
214 __raw_writel(__raw_readl(S3C2410_CLKCON) & ~S3C2410_CLKCON_IDLE,
215 S3C2410_CLKCON);
216}
217
193void __init s3c24xx_init_io(struct map_desc *mach_desc, int size) 218void __init s3c24xx_init_io(struct map_desc *mach_desc, int size)
194{ 219{
220 arm_pm_idle = s3c24xx_default_idle;
221
195 /* initialise the io descriptors we need for initialisation */ 222 /* initialise the io descriptors we need for initialisation */
196 iotable_init(mach_desc, size); 223 iotable_init(mach_desc, size);
197 iotable_init(s3c_iodesc, ARRAY_SIZE(s3c_iodesc)); 224 iotable_init(s3c_iodesc, ARRAY_SIZE(s3c_iodesc));
diff --git a/arch/arm/plat-spear/include/plat/system.h b/arch/arm/plat-spear/include/plat/system.h
deleted file mode 100644
index 86c6f83b44c..00000000000
--- a/arch/arm/plat-spear/include/plat/system.h
+++ /dev/null
@@ -1,26 +0,0 @@
1/*
2 * arch/arm/plat-spear/include/plat/system.h
3 *
4 * SPEAr platform specific architecture functions
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#ifndef __PLAT_SYSTEM_H
15#define __PLAT_SYSTEM_H
16
17static inline void arch_idle(void)
18{
19 /*
20 * This should do all the clock switching
21 * and wait for interrupt tricks
22 */
23 cpu_do_idle();
24}
25
26#endif /* __PLAT_SYSTEM_H */