diff options
Diffstat (limited to 'arch/arm/plat-samsung/include/plat')
22 files changed, 67 insertions, 372 deletions
diff --git a/arch/arm/plat-samsung/include/plat/cpu-freq-core.h b/arch/arm/plat-samsung/include/plat/cpu-freq-core.h index dac4760c0f0..95509d8eb14 100644 --- a/arch/arm/plat-samsung/include/plat/cpu-freq-core.h +++ b/arch/arm/plat-samsung/include/plat/cpu-freq-core.h | |||
@@ -202,14 +202,6 @@ extern int s3c_plltab_register(struct cpufreq_frequency_table *plls, | |||
202 | extern struct s3c_cpufreq_config *s3c_cpufreq_getconfig(void); | 202 | extern struct s3c_cpufreq_config *s3c_cpufreq_getconfig(void); |
203 | extern struct s3c_iotimings *s3c_cpufreq_getiotimings(void); | 203 | extern struct s3c_iotimings *s3c_cpufreq_getiotimings(void); |
204 | 204 | ||
205 | extern void s3c2410_iotiming_debugfs(struct seq_file *seq, | ||
206 | struct s3c_cpufreq_config *cfg, | ||
207 | union s3c_iobank *iob); | ||
208 | |||
209 | extern void s3c2412_iotiming_debugfs(struct seq_file *seq, | ||
210 | struct s3c_cpufreq_config *cfg, | ||
211 | union s3c_iobank *iob); | ||
212 | |||
213 | #ifdef CONFIG_CPU_FREQ_S3C24XX_DEBUGFS | 205 | #ifdef CONFIG_CPU_FREQ_S3C24XX_DEBUGFS |
214 | #define s3c_cpufreq_debugfs_call(x) x | 206 | #define s3c_cpufreq_debugfs_call(x) x |
215 | #else | 207 | #else |
@@ -226,6 +218,10 @@ extern void s3c2410_cpufreq_setrefresh(struct s3c_cpufreq_config *cfg); | |||
226 | extern void s3c2410_set_fvco(struct s3c_cpufreq_config *cfg); | 218 | extern void s3c2410_set_fvco(struct s3c_cpufreq_config *cfg); |
227 | 219 | ||
228 | #ifdef CONFIG_S3C2410_IOTIMING | 220 | #ifdef CONFIG_S3C2410_IOTIMING |
221 | extern void s3c2410_iotiming_debugfs(struct seq_file *seq, | ||
222 | struct s3c_cpufreq_config *cfg, | ||
223 | union s3c_iobank *iob); | ||
224 | |||
229 | extern int s3c2410_iotiming_calc(struct s3c_cpufreq_config *cfg, | 225 | extern int s3c2410_iotiming_calc(struct s3c_cpufreq_config *cfg, |
230 | struct s3c_iotimings *iot); | 226 | struct s3c_iotimings *iot); |
231 | 227 | ||
@@ -235,6 +231,7 @@ extern int s3c2410_iotiming_get(struct s3c_cpufreq_config *cfg, | |||
235 | extern void s3c2410_iotiming_set(struct s3c_cpufreq_config *cfg, | 231 | extern void s3c2410_iotiming_set(struct s3c_cpufreq_config *cfg, |
236 | struct s3c_iotimings *iot); | 232 | struct s3c_iotimings *iot); |
237 | #else | 233 | #else |
234 | #define s3c2410_iotiming_debugfs NULL | ||
238 | #define s3c2410_iotiming_calc NULL | 235 | #define s3c2410_iotiming_calc NULL |
239 | #define s3c2410_iotiming_get NULL | 236 | #define s3c2410_iotiming_get NULL |
240 | #define s3c2410_iotiming_set NULL | 237 | #define s3c2410_iotiming_set NULL |
@@ -242,8 +239,10 @@ extern void s3c2410_iotiming_set(struct s3c_cpufreq_config *cfg, | |||
242 | 239 | ||
243 | /* S3C2412 compatible routines */ | 240 | /* S3C2412 compatible routines */ |
244 | 241 | ||
245 | extern int s3c2412_iotiming_get(struct s3c_cpufreq_config *cfg, | 242 | #ifdef CONFIG_S3C2412_IOTIMING |
246 | struct s3c_iotimings *timings); | 243 | extern void s3c2412_iotiming_debugfs(struct seq_file *seq, |
244 | struct s3c_cpufreq_config *cfg, | ||
245 | union s3c_iobank *iob); | ||
247 | 246 | ||
248 | extern int s3c2412_iotiming_get(struct s3c_cpufreq_config *cfg, | 247 | extern int s3c2412_iotiming_get(struct s3c_cpufreq_config *cfg, |
249 | struct s3c_iotimings *timings); | 248 | struct s3c_iotimings *timings); |
@@ -253,6 +252,12 @@ extern int s3c2412_iotiming_calc(struct s3c_cpufreq_config *cfg, | |||
253 | 252 | ||
254 | extern void s3c2412_iotiming_set(struct s3c_cpufreq_config *cfg, | 253 | extern void s3c2412_iotiming_set(struct s3c_cpufreq_config *cfg, |
255 | struct s3c_iotimings *iot); | 254 | struct s3c_iotimings *iot); |
255 | #else | ||
256 | #define s3c2412_iotiming_debugfs NULL | ||
257 | #define s3c2412_iotiming_calc NULL | ||
258 | #define s3c2412_iotiming_get NULL | ||
259 | #define s3c2412_iotiming_set NULL | ||
260 | #endif /* CONFIG_S3C2412_IOTIMING */ | ||
256 | 261 | ||
257 | #ifdef CONFIG_CPU_FREQ_S3C24XX_DEBUG | 262 | #ifdef CONFIG_CPU_FREQ_S3C24XX_DEBUG |
258 | #define s3c_freq_dbg(x...) printk(KERN_INFO x) | 263 | #define s3c_freq_dbg(x...) printk(KERN_INFO x) |
diff --git a/arch/arm/plat-samsung/include/plat/cpu.h b/arch/arm/plat-samsung/include/plat/cpu.h index 40fd7b6b5e6..258d9d8a94f 100644 --- a/arch/arm/plat-samsung/include/plat/cpu.h +++ b/arch/arm/plat-samsung/include/plat/cpu.h | |||
@@ -152,13 +152,9 @@ extern void s3c_init_cpu(unsigned long idcode, | |||
152 | /* core initialisation functions */ | 152 | /* core initialisation functions */ |
153 | 153 | ||
154 | extern void s3c24xx_init_irq(void); | 154 | extern void s3c24xx_init_irq(void); |
155 | extern void s3c64xx_init_irq(u32 vic0, u32 vic1); | ||
156 | extern void s5p_init_irq(u32 *vic, u32 num_vic); | 155 | extern void s5p_init_irq(u32 *vic, u32 num_vic); |
157 | 156 | ||
158 | extern void s3c24xx_init_io(struct map_desc *mach_desc, int size); | 157 | extern void s3c24xx_init_io(struct map_desc *mach_desc, int size); |
159 | extern void s3c64xx_init_io(struct map_desc *mach_desc, int size); | ||
160 | extern void s5p_init_io(struct map_desc *mach_desc, | ||
161 | int size, void __iomem *cpuid_addr); | ||
162 | 158 | ||
163 | extern void s3c24xx_init_cpu(void); | 159 | extern void s3c24xx_init_cpu(void); |
164 | extern void s3c64xx_init_cpu(void); | 160 | extern void s3c64xx_init_cpu(void); |
@@ -183,7 +179,6 @@ extern struct syscore_ops s3c2410_pm_syscore_ops; | |||
183 | extern struct syscore_ops s3c2412_pm_syscore_ops; | 179 | extern struct syscore_ops s3c2412_pm_syscore_ops; |
184 | extern struct syscore_ops s3c2416_pm_syscore_ops; | 180 | extern struct syscore_ops s3c2416_pm_syscore_ops; |
185 | extern struct syscore_ops s3c244x_pm_syscore_ops; | 181 | extern struct syscore_ops s3c244x_pm_syscore_ops; |
186 | extern struct syscore_ops s3c64xx_irq_syscore_ops; | ||
187 | 182 | ||
188 | /* system device classes */ | 183 | /* system device classes */ |
189 | 184 | ||
@@ -195,7 +190,6 @@ extern struct sysdev_class s3c2440_sysclass; | |||
195 | extern struct sysdev_class s3c2442_sysclass; | 190 | extern struct sysdev_class s3c2442_sysclass; |
196 | extern struct sysdev_class s3c2443_sysclass; | 191 | extern struct sysdev_class s3c2443_sysclass; |
197 | extern struct sysdev_class s3c6410_sysclass; | 192 | extern struct sysdev_class s3c6410_sysclass; |
198 | extern struct sysdev_class s3c64xx_sysclass; | ||
199 | extern struct sysdev_class s5p64x0_sysclass; | 193 | extern struct sysdev_class s5p64x0_sysclass; |
200 | extern struct sysdev_class s5pv210_sysclass; | 194 | extern struct sysdev_class s5pv210_sysclass; |
201 | extern struct sysdev_class exynos4_sysclass; | 195 | extern struct sysdev_class exynos4_sysclass; |
diff --git a/arch/arm/plat-samsung/include/plat/devs.h b/arch/arm/plat-samsung/include/plat/devs.h index ab633c9c2ae..83b1e31696d 100644 --- a/arch/arm/plat-samsung/include/plat/devs.h +++ b/arch/arm/plat-samsung/include/plat/devs.h | |||
@@ -39,6 +39,7 @@ extern struct platform_device s3c64xx_device_pcm0; | |||
39 | extern struct platform_device s3c64xx_device_pcm1; | 39 | extern struct platform_device s3c64xx_device_pcm1; |
40 | extern struct platform_device s3c64xx_device_spi0; | 40 | extern struct platform_device s3c64xx_device_spi0; |
41 | extern struct platform_device s3c64xx_device_spi1; | 41 | extern struct platform_device s3c64xx_device_spi1; |
42 | extern struct platform_device s3c64xx_device_spi2; | ||
42 | 43 | ||
43 | extern struct platform_device s3c_device_adc; | 44 | extern struct platform_device s3c_device_adc; |
44 | extern struct platform_device s3c_device_cfcon; | 45 | extern struct platform_device s3c_device_cfcon; |
@@ -98,8 +99,6 @@ extern struct platform_device s5p6450_device_iis1; | |||
98 | extern struct platform_device s5p6450_device_iis2; | 99 | extern struct platform_device s5p6450_device_iis2; |
99 | extern struct platform_device s5p6450_device_pcm0; | 100 | extern struct platform_device s5p6450_device_pcm0; |
100 | 101 | ||
101 | extern struct platform_device s5p64x0_device_spi0; | ||
102 | extern struct platform_device s5p64x0_device_spi1; | ||
103 | 102 | ||
104 | extern struct platform_device s5pc100_device_ac97; | 103 | extern struct platform_device s5pc100_device_ac97; |
105 | extern struct platform_device s5pc100_device_iis0; | 104 | extern struct platform_device s5pc100_device_iis0; |
@@ -108,9 +107,6 @@ extern struct platform_device s5pc100_device_iis2; | |||
108 | extern struct platform_device s5pc100_device_pcm0; | 107 | extern struct platform_device s5pc100_device_pcm0; |
109 | extern struct platform_device s5pc100_device_pcm1; | 108 | extern struct platform_device s5pc100_device_pcm1; |
110 | extern struct platform_device s5pc100_device_spdif; | 109 | extern struct platform_device s5pc100_device_spdif; |
111 | extern struct platform_device s5pc100_device_spi0; | ||
112 | extern struct platform_device s5pc100_device_spi1; | ||
113 | extern struct platform_device s5pc100_device_spi2; | ||
114 | 110 | ||
115 | extern struct platform_device s5pv210_device_ac97; | 111 | extern struct platform_device s5pv210_device_ac97; |
116 | extern struct platform_device s5pv210_device_iis0; | 112 | extern struct platform_device s5pv210_device_iis0; |
@@ -120,8 +116,6 @@ extern struct platform_device s5pv210_device_pcm0; | |||
120 | extern struct platform_device s5pv210_device_pcm1; | 116 | extern struct platform_device s5pv210_device_pcm1; |
121 | extern struct platform_device s5pv210_device_pcm2; | 117 | extern struct platform_device s5pv210_device_pcm2; |
122 | extern struct platform_device s5pv210_device_spdif; | 118 | extern struct platform_device s5pv210_device_spdif; |
123 | extern struct platform_device s5pv210_device_spi0; | ||
124 | extern struct platform_device s5pv210_device_spi1; | ||
125 | 119 | ||
126 | extern struct platform_device exynos4_device_ac97; | 120 | extern struct platform_device exynos4_device_ac97; |
127 | extern struct platform_device exynos4_device_ahci; | 121 | extern struct platform_device exynos4_device_ahci; |
diff --git a/arch/arm/plat-samsung/include/plat/dma-ops.h b/arch/arm/plat-samsung/include/plat/dma-ops.h index 4c1a363526c..22eafc310bd 100644 --- a/arch/arm/plat-samsung/include/plat/dma-ops.h +++ b/arch/arm/plat-samsung/include/plat/dma-ops.h | |||
@@ -31,6 +31,7 @@ struct samsung_dma_info { | |||
31 | enum dma_slave_buswidth width; | 31 | enum dma_slave_buswidth width; |
32 | dma_addr_t fifo; | 32 | dma_addr_t fifo; |
33 | struct s3c2410_dma_client *client; | 33 | struct s3c2410_dma_client *client; |
34 | struct property *dt_dmach_prop; | ||
34 | }; | 35 | }; |
35 | 36 | ||
36 | struct samsung_dma_ops { | 37 | struct samsung_dma_ops { |
diff --git a/arch/arm/plat-samsung/include/plat/dma-pl330.h b/arch/arm/plat-samsung/include/plat/dma-pl330.h index 2e55e595867..c5eaad529de 100644 --- a/arch/arm/plat-samsung/include/plat/dma-pl330.h +++ b/arch/arm/plat-samsung/include/plat/dma-pl330.h | |||
@@ -21,7 +21,8 @@ | |||
21 | * use these just as IDs. | 21 | * use these just as IDs. |
22 | */ | 22 | */ |
23 | enum dma_ch { | 23 | enum dma_ch { |
24 | DMACH_UART0_RX, | 24 | DMACH_DT_PROP = -1, |
25 | DMACH_UART0_RX = 0, | ||
25 | DMACH_UART0_TX, | 26 | DMACH_UART0_TX, |
26 | DMACH_UART1_RX, | 27 | DMACH_UART1_RX, |
27 | DMACH_UART1_TX, | 28 | DMACH_UART1_TX, |
diff --git a/arch/arm/plat-samsung/include/plat/exynos4.h b/arch/arm/plat-samsung/include/plat/exynos4.h deleted file mode 100644 index f546e88ebc9..00000000000 --- a/arch/arm/plat-samsung/include/plat/exynos4.h +++ /dev/null | |||
@@ -1,35 +0,0 @@ | |||
1 | /* linux/arch/arm/plat-samsung/include/plat/exynos4.h | ||
2 | * | ||
3 | * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | ||
5 | * | ||
6 | * Header file for exynos4 cpu support | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | /* Common init code for EXYNOS4 related SoCs */ | ||
14 | |||
15 | extern void exynos4_common_init_uarts(struct s3c2410_uartcfg *cfg, int no); | ||
16 | extern void exynos4_register_clocks(void); | ||
17 | extern void exynos4210_register_clocks(void); | ||
18 | extern void exynos4212_register_clocks(void); | ||
19 | extern void exynos4_setup_clocks(void); | ||
20 | |||
21 | #ifdef CONFIG_ARCH_EXYNOS | ||
22 | extern int exynos_init(void); | ||
23 | extern void exynos4_init_irq(void); | ||
24 | extern void exynos4_map_io(void); | ||
25 | extern void exynos4_init_clocks(int xtal); | ||
26 | extern struct sys_timer exynos4_timer; | ||
27 | |||
28 | #define exynos4_init_uarts exynos4_common_init_uarts | ||
29 | |||
30 | #else | ||
31 | #define exynos4_init_clocks NULL | ||
32 | #define exynos4_init_uarts NULL | ||
33 | #define exynos4_map_io NULL | ||
34 | #define exynos_init NULL | ||
35 | #endif | ||
diff --git a/arch/arm/plat-samsung/include/plat/irqs.h b/arch/arm/plat-samsung/include/plat/irqs.h index 08d1a7ef97b..df46b776976 100644 --- a/arch/arm/plat-samsung/include/plat/irqs.h +++ b/arch/arm/plat-samsung/include/plat/irqs.h | |||
@@ -44,13 +44,14 @@ | |||
44 | #define S5P_IRQ_VIC2(x) (S5P_VIC2_BASE + (x)) | 44 | #define S5P_IRQ_VIC2(x) (S5P_VIC2_BASE + (x)) |
45 | #define S5P_IRQ_VIC3(x) (S5P_VIC3_BASE + (x)) | 45 | #define S5P_IRQ_VIC3(x) (S5P_VIC3_BASE + (x)) |
46 | 46 | ||
47 | #define S5P_TIMER_IRQ(x) (11 + (x)) | 47 | #define S5P_TIMER_IRQ(x) (IRQ_TIMER_BASE + (x)) |
48 | 48 | ||
49 | #define IRQ_TIMER0 S5P_TIMER_IRQ(0) | 49 | #define IRQ_TIMER0 S5P_TIMER_IRQ(0) |
50 | #define IRQ_TIMER1 S5P_TIMER_IRQ(1) | 50 | #define IRQ_TIMER1 S5P_TIMER_IRQ(1) |
51 | #define IRQ_TIMER2 S5P_TIMER_IRQ(2) | 51 | #define IRQ_TIMER2 S5P_TIMER_IRQ(2) |
52 | #define IRQ_TIMER3 S5P_TIMER_IRQ(3) | 52 | #define IRQ_TIMER3 S5P_TIMER_IRQ(3) |
53 | #define IRQ_TIMER4 S5P_TIMER_IRQ(4) | 53 | #define IRQ_TIMER4 S5P_TIMER_IRQ(4) |
54 | #define IRQ_TIMER_COUNT (5) | ||
54 | 55 | ||
55 | #define IRQ_EINT(x) ((x) < 16 ? ((x) + S5P_EINT_BASE1) \ | 56 | #define IRQ_EINT(x) ((x) < 16 ? ((x) + S5P_EINT_BASE1) \ |
56 | : ((x) - 16 + S5P_EINT_BASE2)) | 57 | : ((x) - 16 + S5P_EINT_BASE2)) |
diff --git a/arch/arm/plat-samsung/include/plat/regs-serial.h b/arch/arm/plat-samsung/include/plat/regs-serial.h index 72073484702..29c26a81884 100644 --- a/arch/arm/plat-samsung/include/plat/regs-serial.h +++ b/arch/arm/plat-samsung/include/plat/regs-serial.h | |||
@@ -71,6 +71,7 @@ | |||
71 | #define S3C2410_LCON_IRM (1<<6) | 71 | #define S3C2410_LCON_IRM (1<<6) |
72 | 72 | ||
73 | #define S3C2440_UCON_CLKMASK (3<<10) | 73 | #define S3C2440_UCON_CLKMASK (3<<10) |
74 | #define S3C2440_UCON_CLKSHIFT (10) | ||
74 | #define S3C2440_UCON_PCLK (0<<10) | 75 | #define S3C2440_UCON_PCLK (0<<10) |
75 | #define S3C2440_UCON_UCLK (1<<10) | 76 | #define S3C2440_UCON_UCLK (1<<10) |
76 | #define S3C2440_UCON_PCLK2 (2<<10) | 77 | #define S3C2440_UCON_PCLK2 (2<<10) |
@@ -78,6 +79,7 @@ | |||
78 | #define S3C2443_UCON_EPLL (3<<10) | 79 | #define S3C2443_UCON_EPLL (3<<10) |
79 | 80 | ||
80 | #define S3C6400_UCON_CLKMASK (3<<10) | 81 | #define S3C6400_UCON_CLKMASK (3<<10) |
82 | #define S3C6400_UCON_CLKSHIFT (10) | ||
81 | #define S3C6400_UCON_PCLK (0<<10) | 83 | #define S3C6400_UCON_PCLK (0<<10) |
82 | #define S3C6400_UCON_PCLK2 (2<<10) | 84 | #define S3C6400_UCON_PCLK2 (2<<10) |
83 | #define S3C6400_UCON_UCLK0 (1<<10) | 85 | #define S3C6400_UCON_UCLK0 (1<<10) |
@@ -90,11 +92,14 @@ | |||
90 | #define S3C2440_UCON_DIVSHIFT (12) | 92 | #define S3C2440_UCON_DIVSHIFT (12) |
91 | 93 | ||
92 | #define S3C2412_UCON_CLKMASK (3<<10) | 94 | #define S3C2412_UCON_CLKMASK (3<<10) |
95 | #define S3C2412_UCON_CLKSHIFT (10) | ||
93 | #define S3C2412_UCON_UCLK (1<<10) | 96 | #define S3C2412_UCON_UCLK (1<<10) |
94 | #define S3C2412_UCON_USYSCLK (3<<10) | 97 | #define S3C2412_UCON_USYSCLK (3<<10) |
95 | #define S3C2412_UCON_PCLK (0<<10) | 98 | #define S3C2412_UCON_PCLK (0<<10) |
96 | #define S3C2412_UCON_PCLK2 (2<<10) | 99 | #define S3C2412_UCON_PCLK2 (2<<10) |
97 | 100 | ||
101 | #define S3C2410_UCON_CLKMASK (1 << 10) | ||
102 | #define S3C2410_UCON_CLKSHIFT (10) | ||
98 | #define S3C2410_UCON_UCLK (1<<10) | 103 | #define S3C2410_UCON_UCLK (1<<10) |
99 | #define S3C2410_UCON_SBREAK (1<<4) | 104 | #define S3C2410_UCON_SBREAK (1<<4) |
100 | 105 | ||
@@ -193,6 +198,7 @@ | |||
193 | 198 | ||
194 | /* Following are specific to S5PV210 */ | 199 | /* Following are specific to S5PV210 */ |
195 | #define S5PV210_UCON_CLKMASK (1<<10) | 200 | #define S5PV210_UCON_CLKMASK (1<<10) |
201 | #define S5PV210_UCON_CLKSHIFT (10) | ||
196 | #define S5PV210_UCON_PCLK (0<<10) | 202 | #define S5PV210_UCON_PCLK (0<<10) |
197 | #define S5PV210_UCON_UCLK (1<<10) | 203 | #define S5PV210_UCON_UCLK (1<<10) |
198 | 204 | ||
@@ -221,29 +227,24 @@ | |||
221 | #define S5PV210_UFSTAT_RXMASK (255<<0) | 227 | #define S5PV210_UFSTAT_RXMASK (255<<0) |
222 | #define S5PV210_UFSTAT_RXSHIFT (0) | 228 | #define S5PV210_UFSTAT_RXSHIFT (0) |
223 | 229 | ||
224 | #define NO_NEED_CHECK_CLKSRC 1 | 230 | #define S3C2410_UCON_CLKSEL0 (1 << 0) |
231 | #define S3C2410_UCON_CLKSEL1 (1 << 1) | ||
232 | #define S3C2410_UCON_CLKSEL2 (1 << 2) | ||
233 | #define S3C2410_UCON_CLKSEL3 (1 << 3) | ||
225 | 234 | ||
226 | #ifndef __ASSEMBLY__ | 235 | /* Default values for s5pv210 UCON and UFCON uart registers */ |
236 | #define S5PV210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ | ||
237 | S3C2410_UCON_RXILEVEL | \ | ||
238 | S3C2410_UCON_TXIRQMODE | \ | ||
239 | S3C2410_UCON_RXIRQMODE | \ | ||
240 | S3C2410_UCON_RXFIFO_TOI | \ | ||
241 | S3C2443_UCON_RXERR_IRQEN) | ||
227 | 242 | ||
228 | /* struct s3c24xx_uart_clksrc | 243 | #define S5PV210_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \ |
229 | * | 244 | S5PV210_UFCON_TXTRIG4 | \ |
230 | * this structure defines a named clock source that can be used for the | 245 | S5PV210_UFCON_RXTRIG4) |
231 | * uart, so that the best clock can be selected for the requested baud | ||
232 | * rate. | ||
233 | * | ||
234 | * min_baud and max_baud define the range of baud-rates this clock is | ||
235 | * acceptable for, if they are both zero, it is assumed any baud rate that | ||
236 | * can be generated from this clock will be used. | ||
237 | * | ||
238 | * divisor gives the divisor from the clock to the one seen by the uart | ||
239 | */ | ||
240 | 246 | ||
241 | struct s3c24xx_uart_clksrc { | 247 | #ifndef __ASSEMBLY__ |
242 | const char *name; | ||
243 | unsigned int divisor; | ||
244 | unsigned int min_baud; | ||
245 | unsigned int max_baud; | ||
246 | }; | ||
247 | 248 | ||
248 | /* configuration structure for per-machine configurations for the | 249 | /* configuration structure for per-machine configurations for the |
249 | * serial port | 250 | * serial port |
@@ -257,15 +258,13 @@ struct s3c2410_uartcfg { | |||
257 | unsigned char unused; | 258 | unsigned char unused; |
258 | unsigned short flags; | 259 | unsigned short flags; |
259 | upf_t uart_flags; /* default uart flags */ | 260 | upf_t uart_flags; /* default uart flags */ |
261 | unsigned int clk_sel; | ||
260 | 262 | ||
261 | unsigned int has_fracval; | 263 | unsigned int has_fracval; |
262 | 264 | ||
263 | unsigned long ucon; /* value of ucon for port */ | 265 | unsigned long ucon; /* value of ucon for port */ |
264 | unsigned long ulcon; /* value of ulcon for port */ | 266 | unsigned long ulcon; /* value of ulcon for port */ |
265 | unsigned long ufcon; /* value of ufcon for port */ | 267 | unsigned long ufcon; /* value of ufcon for port */ |
266 | |||
267 | struct s3c24xx_uart_clksrc *clocks; | ||
268 | unsigned int clocks_size; | ||
269 | }; | 268 | }; |
270 | 269 | ||
271 | /* s3c24xx_uart_devs | 270 | /* s3c24xx_uart_devs |
diff --git a/arch/arm/plat-samsung/include/plat/reset.h b/arch/arm/plat-samsung/include/plat/reset.h deleted file mode 100644 index 32ca5179c6e..00000000000 --- a/arch/arm/plat-samsung/include/plat/reset.h +++ /dev/null | |||
@@ -1,16 +0,0 @@ | |||
1 | /* linux/arch/arm/plat-samsung/include/plat/reset.h | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | #ifndef __PLAT_SAMSUNG_RESET_H | ||
12 | #define __PLAT_SAMSUNG_RESET_H __FILE__ | ||
13 | |||
14 | extern void (*s5p_reset_hook)(void); | ||
15 | |||
16 | #endif /* __PLAT_SAMSUNG_RESET_H */ | ||
diff --git a/arch/arm/plat-samsung/include/plat/s3c2412.h b/arch/arm/plat-samsung/include/plat/s3c2412.h index 5bcfd143ba1..cbae50ddacc 100644 --- a/arch/arm/plat-samsung/include/plat/s3c2412.h +++ b/arch/arm/plat-samsung/include/plat/s3c2412.h | |||
@@ -21,9 +21,12 @@ extern void s3c2412_init_uarts(struct s3c2410_uartcfg *cfg, int no); | |||
21 | extern void s3c2412_init_clocks(int xtal); | 21 | extern void s3c2412_init_clocks(int xtal); |
22 | 22 | ||
23 | extern int s3c2412_baseclk_add(void); | 23 | extern int s3c2412_baseclk_add(void); |
24 | |||
25 | extern void s3c2412_restart(char mode, const char *cmd); | ||
24 | #else | 26 | #else |
25 | #define s3c2412_init_clocks NULL | 27 | #define s3c2412_init_clocks NULL |
26 | #define s3c2412_init_uarts NULL | 28 | #define s3c2412_init_uarts NULL |
27 | #define s3c2412_map_io NULL | 29 | #define s3c2412_map_io NULL |
28 | #define s3c2412_init NULL | 30 | #define s3c2412_init NULL |
31 | #define s3c2412_restart NULL | ||
29 | #endif | 32 | #endif |
diff --git a/arch/arm/plat-samsung/include/plat/s3c2416.h b/arch/arm/plat-samsung/include/plat/s3c2416.h index a764f8503f5..de2b5bdc5eb 100644 --- a/arch/arm/plat-samsung/include/plat/s3c2416.h +++ b/arch/arm/plat-samsung/include/plat/s3c2416.h | |||
@@ -23,9 +23,11 @@ extern void s3c2416_init_clocks(int xtal); | |||
23 | 23 | ||
24 | extern int s3c2416_baseclk_add(void); | 24 | extern int s3c2416_baseclk_add(void); |
25 | 25 | ||
26 | extern void s3c2416_restart(char mode, const char *cmd); | ||
26 | #else | 27 | #else |
27 | #define s3c2416_init_clocks NULL | 28 | #define s3c2416_init_clocks NULL |
28 | #define s3c2416_init_uarts NULL | 29 | #define s3c2416_init_uarts NULL |
29 | #define s3c2416_map_io NULL | 30 | #define s3c2416_map_io NULL |
30 | #define s3c2416_init NULL | 31 | #define s3c2416_init NULL |
32 | #define s3c2416_restart NULL | ||
31 | #endif | 33 | #endif |
diff --git a/arch/arm/plat-samsung/include/plat/s3c2443.h b/arch/arm/plat-samsung/include/plat/s3c2443.h index 7fae1a05069..dce05b43d51 100644 --- a/arch/arm/plat-samsung/include/plat/s3c2443.h +++ b/arch/arm/plat-samsung/include/plat/s3c2443.h | |||
@@ -24,11 +24,13 @@ extern void s3c2443_init_clocks(int xtal); | |||
24 | 24 | ||
25 | extern int s3c2443_baseclk_add(void); | 25 | extern int s3c2443_baseclk_add(void); |
26 | 26 | ||
27 | extern void s3c2443_restart(char mode, const char *cmd); | ||
27 | #else | 28 | #else |
28 | #define s3c2443_init_clocks NULL | 29 | #define s3c2443_init_clocks NULL |
29 | #define s3c2443_init_uarts NULL | 30 | #define s3c2443_init_uarts NULL |
30 | #define s3c2443_map_io NULL | 31 | #define s3c2443_map_io NULL |
31 | #define s3c2443_init NULL | 32 | #define s3c2443_init NULL |
33 | #define s3c2443_restart NULL | ||
32 | #endif | 34 | #endif |
33 | 35 | ||
34 | /* common code used by s3c2443 and others. | 36 | /* common code used by s3c2443 and others. |
diff --git a/arch/arm/plat-samsung/include/plat/s3c6400.h b/arch/arm/plat-samsung/include/plat/s3c6400.h deleted file mode 100644 index 37d428aaaeb..00000000000 --- a/arch/arm/plat-samsung/include/plat/s3c6400.h +++ /dev/null | |||
@@ -1,36 +0,0 @@ | |||
1 | /* linux/arch/arm/plat-samsung/include/plat/s3c6400.h | ||
2 | * | ||
3 | * Copyright 2008 Openmoko, Inc. | ||
4 | * Copyright 2008 Simtec Electronics | ||
5 | * Ben Dooks <ben@simtec.co.uk> | ||
6 | * http://armlinux.simtec.co.uk/ | ||
7 | * | ||
8 | * Header file for s3c6400 cpu support | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License version 2 as | ||
12 | * published by the Free Software Foundation. | ||
13 | */ | ||
14 | |||
15 | /* Common init code for S3C6400 related SoCs */ | ||
16 | |||
17 | extern void s3c6400_common_init_uarts(struct s3c2410_uartcfg *cfg, int no); | ||
18 | extern void s3c6400_setup_clocks(void); | ||
19 | |||
20 | extern void s3c64xx_register_clocks(unsigned long xtal, unsigned armclk_limit); | ||
21 | |||
22 | #ifdef CONFIG_CPU_S3C6400 | ||
23 | |||
24 | extern int s3c6400_init(void); | ||
25 | extern void s3c6400_init_irq(void); | ||
26 | extern void s3c6400_map_io(void); | ||
27 | extern void s3c6400_init_clocks(int xtal); | ||
28 | |||
29 | #define s3c6400_init_uarts s3c6400_common_init_uarts | ||
30 | |||
31 | #else | ||
32 | #define s3c6400_init_clocks NULL | ||
33 | #define s3c6400_init_uarts NULL | ||
34 | #define s3c6400_map_io NULL | ||
35 | #define s3c6400_init NULL | ||
36 | #endif | ||
diff --git a/arch/arm/plat-samsung/include/plat/s3c6410.h b/arch/arm/plat-samsung/include/plat/s3c6410.h deleted file mode 100644 index 20a6675b9d1..00000000000 --- a/arch/arm/plat-samsung/include/plat/s3c6410.h +++ /dev/null | |||
@@ -1,29 +0,0 @@ | |||
1 | /* linux/arch/arm/plat-samsung/include/plat/s3c6410.h | ||
2 | * | ||
3 | * Copyright 2008 Openmoko, Inc. | ||
4 | * Copyright 2008 Simtec Electronics | ||
5 | * Ben Dooks <ben@simtec.co.uk> | ||
6 | * http://armlinux.simtec.co.uk/ | ||
7 | * | ||
8 | * Header file for s3c6410 cpu support | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License version 2 as | ||
12 | * published by the Free Software Foundation. | ||
13 | */ | ||
14 | |||
15 | #ifdef CONFIG_CPU_S3C6410 | ||
16 | |||
17 | extern int s3c6410_init(void); | ||
18 | extern void s3c6410_init_irq(void); | ||
19 | extern void s3c6410_map_io(void); | ||
20 | extern void s3c6410_init_clocks(int xtal); | ||
21 | |||
22 | #define s3c6410_init_uarts s3c6400_common_init_uarts | ||
23 | |||
24 | #else | ||
25 | #define s3c6410_init_clocks NULL | ||
26 | #define s3c6410_init_uarts NULL | ||
27 | #define s3c6410_map_io NULL | ||
28 | #define s3c6410_init NULL | ||
29 | #endif | ||
diff --git a/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h b/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h index 4c16fa3621b..aea68b60ef9 100644 --- a/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h +++ b/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h | |||
@@ -31,7 +31,6 @@ struct s3c64xx_spi_csinfo { | |||
31 | /** | 31 | /** |
32 | * struct s3c64xx_spi_info - SPI Controller defining structure | 32 | * struct s3c64xx_spi_info - SPI Controller defining structure |
33 | * @src_clk_nr: Clock source index for the CLK_CFG[SPI_CLKSEL] field. | 33 | * @src_clk_nr: Clock source index for the CLK_CFG[SPI_CLKSEL] field. |
34 | * @src_clk_name: Platform name of the corresponding clock. | ||
35 | * @clk_from_cmu: If the SPI clock/prescalar control block is present | 34 | * @clk_from_cmu: If the SPI clock/prescalar control block is present |
36 | * by the platform's clock-management-unit and not in SPI controller. | 35 | * by the platform's clock-management-unit and not in SPI controller. |
37 | * @num_cs: Number of CS this controller emulates. | 36 | * @num_cs: Number of CS this controller emulates. |
@@ -43,7 +42,6 @@ struct s3c64xx_spi_csinfo { | |||
43 | */ | 42 | */ |
44 | struct s3c64xx_spi_info { | 43 | struct s3c64xx_spi_info { |
45 | int src_clk_nr; | 44 | int src_clk_nr; |
46 | char *src_clk_name; | ||
47 | bool clk_from_cmu; | 45 | bool clk_from_cmu; |
48 | 46 | ||
49 | int num_cs; | 47 | int num_cs; |
@@ -58,18 +56,28 @@ struct s3c64xx_spi_info { | |||
58 | }; | 56 | }; |
59 | 57 | ||
60 | /** | 58 | /** |
61 | * s3c64xx_spi_set_info - SPI Controller configure callback by the board | 59 | * s3c64xx_spi_set_platdata - SPI Controller configure callback by the board |
62 | * initialization code. | 60 | * initialization code. |
63 | * @cntrlr: SPI controller number the configuration is for. | 61 | * @pd: SPI platform data to set. |
64 | * @src_clk_nr: Clock the SPI controller is to use to generate SPI clocks. | 62 | * @src_clk_nr: Clock the SPI controller is to use to generate SPI clocks. |
65 | * @num_cs: Number of elements in the 'cs' array. | 63 | * @num_cs: Number of elements in the 'cs' array. |
66 | * | 64 | * |
67 | * Call this from machine init code for each SPI Controller that | 65 | * Call this from machine init code for each SPI Controller that |
68 | * has some chips attached to it. | 66 | * has some chips attached to it. |
69 | */ | 67 | */ |
70 | extern void s3c64xx_spi_set_info(int cntrlr, int src_clk_nr, int num_cs); | 68 | extern void s3c64xx_spi0_set_platdata(struct s3c64xx_spi_info *pd, |
71 | extern void s5pc100_spi_set_info(int cntrlr, int src_clk_nr, int num_cs); | 69 | int src_clk_nr, int num_cs); |
72 | extern void s5pv210_spi_set_info(int cntrlr, int src_clk_nr, int num_cs); | 70 | extern void s3c64xx_spi1_set_platdata(struct s3c64xx_spi_info *pd, |
73 | extern void s5p64x0_spi_set_info(int cntrlr, int src_clk_nr, int num_cs); | 71 | int src_clk_nr, int num_cs); |
72 | extern void s3c64xx_spi2_set_platdata(struct s3c64xx_spi_info *pd, | ||
73 | int src_clk_nr, int num_cs); | ||
74 | 74 | ||
75 | /* defined by architecture to configure gpio */ | ||
76 | extern int s3c64xx_spi0_cfg_gpio(struct platform_device *dev); | ||
77 | extern int s3c64xx_spi1_cfg_gpio(struct platform_device *dev); | ||
78 | extern int s3c64xx_spi2_cfg_gpio(struct platform_device *dev); | ||
79 | |||
80 | extern struct s3c64xx_spi_info s3c64xx_spi0_pdata; | ||
81 | extern struct s3c64xx_spi_info s3c64xx_spi1_pdata; | ||
82 | extern struct s3c64xx_spi_info s3c64xx_spi2_pdata; | ||
75 | #endif /* __S3C64XX_PLAT_SPI_H */ | 83 | #endif /* __S3C64XX_PLAT_SPI_H */ |
diff --git a/arch/arm/plat-samsung/include/plat/s5p6440.h b/arch/arm/plat-samsung/include/plat/s5p6440.h deleted file mode 100644 index bf85ebbb4fb..00000000000 --- a/arch/arm/plat-samsung/include/plat/s5p6440.h +++ /dev/null | |||
@@ -1,36 +0,0 @@ | |||
1 | /* linux/arch/arm/plat-samsung/include/plat/s5p6440.h | ||
2 | * | ||
3 | * Copyright (c) 2009 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * Header file for s5p6440 cpu support | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | /* Common init code for S5P6440 related SoCs */ | ||
14 | |||
15 | extern void s5p6440_register_clocks(void); | ||
16 | extern void s5p6440_setup_clocks(void); | ||
17 | |||
18 | #ifdef CONFIG_CPU_S5P6440 | ||
19 | |||
20 | extern int s5p64x0_init(void); | ||
21 | extern void s5p6440_init_irq(void); | ||
22 | extern void s5p6440_map_io(void); | ||
23 | extern void s5p6440_init_clocks(int xtal); | ||
24 | |||
25 | extern void s5p6440_init_uarts(struct s3c2410_uartcfg *cfg, int no); | ||
26 | |||
27 | #else | ||
28 | #define s5p6440_init_clocks NULL | ||
29 | #define s5p6440_init_uarts NULL | ||
30 | #define s5p6440_map_io NULL | ||
31 | #define s5p64x0_init NULL | ||
32 | #endif | ||
33 | |||
34 | /* S5P6440 timer */ | ||
35 | |||
36 | extern struct sys_timer s5p6440_timer; | ||
diff --git a/arch/arm/plat-samsung/include/plat/s5p6450.h b/arch/arm/plat-samsung/include/plat/s5p6450.h deleted file mode 100644 index da25f9a1c54..00000000000 --- a/arch/arm/plat-samsung/include/plat/s5p6450.h +++ /dev/null | |||
@@ -1,36 +0,0 @@ | |||
1 | /* linux/arch/arm/plat-samsung/include/plat/s5p6450.h | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | ||
5 | * | ||
6 | * Header file for s5p6450 cpu support | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | /* Common init code for S5P6450 related SoCs */ | ||
14 | |||
15 | extern void s5p6450_register_clocks(void); | ||
16 | extern void s5p6450_setup_clocks(void); | ||
17 | |||
18 | #ifdef CONFIG_CPU_S5P6450 | ||
19 | |||
20 | extern int s5p64x0_init(void); | ||
21 | extern void s5p6450_init_irq(void); | ||
22 | extern void s5p6450_map_io(void); | ||
23 | extern void s5p6450_init_clocks(int xtal); | ||
24 | |||
25 | extern void s5p6450_init_uarts(struct s3c2410_uartcfg *cfg, int no); | ||
26 | |||
27 | #else | ||
28 | #define s5p6450_init_clocks NULL | ||
29 | #define s5p6450_init_uarts NULL | ||
30 | #define s5p6450_map_io NULL | ||
31 | #define s5p64x0_init NULL | ||
32 | #endif | ||
33 | |||
34 | /* S5P6450 timer */ | ||
35 | |||
36 | extern struct sys_timer s5p6450_timer; | ||
diff --git a/arch/arm/plat-samsung/include/plat/s5pc100.h b/arch/arm/plat-samsung/include/plat/s5pc100.h deleted file mode 100644 index 9a21aeaaf45..00000000000 --- a/arch/arm/plat-samsung/include/plat/s5pc100.h +++ /dev/null | |||
@@ -1,33 +0,0 @@ | |||
1 | /* linux/arch/arm/plat-samsung/include/plat/s5pc100.h | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * Header file for s5pc100 cpu support | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | /* Common init code for S5PC100 related SoCs */ | ||
14 | |||
15 | extern void s5pc100_common_init_uarts(struct s3c2410_uartcfg *cfg, int no); | ||
16 | extern void s5pc100_register_clocks(void); | ||
17 | extern void s5pc100_setup_clocks(void); | ||
18 | |||
19 | #ifdef CONFIG_CPU_S5PC100 | ||
20 | |||
21 | extern int s5pc100_init(void); | ||
22 | extern void s5pc100_init_irq(void); | ||
23 | extern void s5pc100_map_io(void); | ||
24 | extern void s5pc100_init_clocks(int xtal); | ||
25 | |||
26 | #define s5pc100_init_uarts s5pc100_common_init_uarts | ||
27 | |||
28 | #else | ||
29 | #define s5pc100_init_clocks NULL | ||
30 | #define s5pc100_init_uarts NULL | ||
31 | #define s5pc100_map_io NULL | ||
32 | #define s5pc100_init NULL | ||
33 | #endif | ||
diff --git a/arch/arm/plat-samsung/include/plat/s5pv210.h b/arch/arm/plat-samsung/include/plat/s5pv210.h deleted file mode 100644 index b4bc6be7707..00000000000 --- a/arch/arm/plat-samsung/include/plat/s5pv210.h +++ /dev/null | |||
@@ -1,33 +0,0 @@ | |||
1 | /* linux/arch/arm/plat-samsung/include/plat/s5pv210.h | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * Header file for s5pv210 cpu support | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | /* Common init code for S5PV210 related SoCs */ | ||
14 | |||
15 | extern void s5pv210_common_init_uarts(struct s3c2410_uartcfg *cfg, int no); | ||
16 | extern void s5pv210_register_clocks(void); | ||
17 | extern void s5pv210_setup_clocks(void); | ||
18 | |||
19 | #ifdef CONFIG_CPU_S5PV210 | ||
20 | |||
21 | extern int s5pv210_init(void); | ||
22 | extern void s5pv210_init_irq(void); | ||
23 | extern void s5pv210_map_io(void); | ||
24 | extern void s5pv210_init_clocks(int xtal); | ||
25 | |||
26 | #define s5pv210_init_uarts s5pv210_common_init_uarts | ||
27 | |||
28 | #else | ||
29 | #define s5pv210_init_clocks NULL | ||
30 | #define s5pv210_init_uarts NULL | ||
31 | #define s5pv210_map_io NULL | ||
32 | #define s5pv210_init NULL | ||
33 | #endif | ||
diff --git a/arch/arm/plat-samsung/include/plat/sdhci.h b/arch/arm/plat-samsung/include/plat/sdhci.h index e7b3c752e91..dcff7dd1ae8 100644 --- a/arch/arm/plat-samsung/include/plat/sdhci.h +++ b/arch/arm/plat-samsung/include/plat/sdhci.h | |||
@@ -66,8 +66,6 @@ struct s3c_sdhci_platdata { | |||
66 | enum cd_types cd_type; | 66 | enum cd_types cd_type; |
67 | enum clk_types clk_type; | 67 | enum clk_types clk_type; |
68 | 68 | ||
69 | char **clocks; /* set of clock sources */ | ||
70 | |||
71 | int ext_cd_gpio; | 69 | int ext_cd_gpio; |
72 | bool ext_cd_gpio_invert; | 70 | bool ext_cd_gpio_invert; |
73 | int (*ext_cd_init)(void (*notify_func)(struct platform_device *, | 71 | int (*ext_cd_init)(void (*notify_func)(struct platform_device *, |
@@ -129,12 +127,9 @@ extern void exynos4_setup_sdhci3_cfg_gpio(struct platform_device *, int w); | |||
129 | /* S3C2416 SDHCI setup */ | 127 | /* S3C2416 SDHCI setup */ |
130 | 128 | ||
131 | #ifdef CONFIG_S3C2416_SETUP_SDHCI | 129 | #ifdef CONFIG_S3C2416_SETUP_SDHCI |
132 | extern char *s3c2416_hsmmc_clksrcs[4]; | ||
133 | |||
134 | static inline void s3c2416_default_sdhci0(void) | 130 | static inline void s3c2416_default_sdhci0(void) |
135 | { | 131 | { |
136 | #ifdef CONFIG_S3C_DEV_HSMMC | 132 | #ifdef CONFIG_S3C_DEV_HSMMC |
137 | s3c_hsmmc0_def_platdata.clocks = s3c2416_hsmmc_clksrcs; | ||
138 | s3c_hsmmc0_def_platdata.cfg_gpio = s3c2416_setup_sdhci0_cfg_gpio; | 133 | s3c_hsmmc0_def_platdata.cfg_gpio = s3c2416_setup_sdhci0_cfg_gpio; |
139 | #endif /* CONFIG_S3C_DEV_HSMMC */ | 134 | #endif /* CONFIG_S3C_DEV_HSMMC */ |
140 | } | 135 | } |
@@ -142,7 +137,6 @@ static inline void s3c2416_default_sdhci0(void) | |||
142 | static inline void s3c2416_default_sdhci1(void) | 137 | static inline void s3c2416_default_sdhci1(void) |
143 | { | 138 | { |
144 | #ifdef CONFIG_S3C_DEV_HSMMC1 | 139 | #ifdef CONFIG_S3C_DEV_HSMMC1 |
145 | s3c_hsmmc1_def_platdata.clocks = s3c2416_hsmmc_clksrcs; | ||
146 | s3c_hsmmc1_def_platdata.cfg_gpio = s3c2416_setup_sdhci1_cfg_gpio; | 140 | s3c_hsmmc1_def_platdata.cfg_gpio = s3c2416_setup_sdhci1_cfg_gpio; |
147 | #endif /* CONFIG_S3C_DEV_HSMMC1 */ | 141 | #endif /* CONFIG_S3C_DEV_HSMMC1 */ |
148 | } | 142 | } |
@@ -155,12 +149,9 @@ static inline void s3c2416_default_sdhci1(void) { } | |||
155 | /* S3C64XX SDHCI setup */ | 149 | /* S3C64XX SDHCI setup */ |
156 | 150 | ||
157 | #ifdef CONFIG_S3C64XX_SETUP_SDHCI | 151 | #ifdef CONFIG_S3C64XX_SETUP_SDHCI |
158 | extern char *s3c64xx_hsmmc_clksrcs[4]; | ||
159 | |||
160 | static inline void s3c6400_default_sdhci0(void) | 152 | static inline void s3c6400_default_sdhci0(void) |
161 | { | 153 | { |
162 | #ifdef CONFIG_S3C_DEV_HSMMC | 154 | #ifdef CONFIG_S3C_DEV_HSMMC |
163 | s3c_hsmmc0_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; | ||
164 | s3c_hsmmc0_def_platdata.cfg_gpio = s3c64xx_setup_sdhci0_cfg_gpio; | 155 | s3c_hsmmc0_def_platdata.cfg_gpio = s3c64xx_setup_sdhci0_cfg_gpio; |
165 | #endif | 156 | #endif |
166 | } | 157 | } |
@@ -168,7 +159,6 @@ static inline void s3c6400_default_sdhci0(void) | |||
168 | static inline void s3c6400_default_sdhci1(void) | 159 | static inline void s3c6400_default_sdhci1(void) |
169 | { | 160 | { |
170 | #ifdef CONFIG_S3C_DEV_HSMMC1 | 161 | #ifdef CONFIG_S3C_DEV_HSMMC1 |
171 | s3c_hsmmc1_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; | ||
172 | s3c_hsmmc1_def_platdata.cfg_gpio = s3c64xx_setup_sdhci1_cfg_gpio; | 162 | s3c_hsmmc1_def_platdata.cfg_gpio = s3c64xx_setup_sdhci1_cfg_gpio; |
173 | #endif | 163 | #endif |
174 | } | 164 | } |
@@ -176,7 +166,6 @@ static inline void s3c6400_default_sdhci1(void) | |||
176 | static inline void s3c6400_default_sdhci2(void) | 166 | static inline void s3c6400_default_sdhci2(void) |
177 | { | 167 | { |
178 | #ifdef CONFIG_S3C_DEV_HSMMC2 | 168 | #ifdef CONFIG_S3C_DEV_HSMMC2 |
179 | s3c_hsmmc2_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; | ||
180 | s3c_hsmmc2_def_platdata.cfg_gpio = s3c64xx_setup_sdhci2_cfg_gpio; | 169 | s3c_hsmmc2_def_platdata.cfg_gpio = s3c64xx_setup_sdhci2_cfg_gpio; |
181 | #endif | 170 | #endif |
182 | } | 171 | } |
@@ -184,7 +173,6 @@ static inline void s3c6400_default_sdhci2(void) | |||
184 | static inline void s3c6410_default_sdhci0(void) | 173 | static inline void s3c6410_default_sdhci0(void) |
185 | { | 174 | { |
186 | #ifdef CONFIG_S3C_DEV_HSMMC | 175 | #ifdef CONFIG_S3C_DEV_HSMMC |
187 | s3c_hsmmc0_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; | ||
188 | s3c_hsmmc0_def_platdata.cfg_gpio = s3c64xx_setup_sdhci0_cfg_gpio; | 176 | s3c_hsmmc0_def_platdata.cfg_gpio = s3c64xx_setup_sdhci0_cfg_gpio; |
189 | #endif | 177 | #endif |
190 | } | 178 | } |
@@ -192,7 +180,6 @@ static inline void s3c6410_default_sdhci0(void) | |||
192 | static inline void s3c6410_default_sdhci1(void) | 180 | static inline void s3c6410_default_sdhci1(void) |
193 | { | 181 | { |
194 | #ifdef CONFIG_S3C_DEV_HSMMC1 | 182 | #ifdef CONFIG_S3C_DEV_HSMMC1 |
195 | s3c_hsmmc1_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; | ||
196 | s3c_hsmmc1_def_platdata.cfg_gpio = s3c64xx_setup_sdhci1_cfg_gpio; | 183 | s3c_hsmmc1_def_platdata.cfg_gpio = s3c64xx_setup_sdhci1_cfg_gpio; |
197 | #endif | 184 | #endif |
198 | } | 185 | } |
@@ -200,7 +187,6 @@ static inline void s3c6410_default_sdhci1(void) | |||
200 | static inline void s3c6410_default_sdhci2(void) | 187 | static inline void s3c6410_default_sdhci2(void) |
201 | { | 188 | { |
202 | #ifdef CONFIG_S3C_DEV_HSMMC2 | 189 | #ifdef CONFIG_S3C_DEV_HSMMC2 |
203 | s3c_hsmmc2_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; | ||
204 | s3c_hsmmc2_def_platdata.cfg_gpio = s3c64xx_setup_sdhci2_cfg_gpio; | 190 | s3c_hsmmc2_def_platdata.cfg_gpio = s3c64xx_setup_sdhci2_cfg_gpio; |
205 | #endif | 191 | #endif |
206 | } | 192 | } |
@@ -218,12 +204,9 @@ static inline void s3c6400_default_sdhci2(void) { } | |||
218 | /* S5PC100 SDHCI setup */ | 204 | /* S5PC100 SDHCI setup */ |
219 | 205 | ||
220 | #ifdef CONFIG_S5PC100_SETUP_SDHCI | 206 | #ifdef CONFIG_S5PC100_SETUP_SDHCI |
221 | extern char *s5pc100_hsmmc_clksrcs[4]; | ||
222 | |||
223 | static inline void s5pc100_default_sdhci0(void) | 207 | static inline void s5pc100_default_sdhci0(void) |
224 | { | 208 | { |
225 | #ifdef CONFIG_S3C_DEV_HSMMC | 209 | #ifdef CONFIG_S3C_DEV_HSMMC |
226 | s3c_hsmmc0_def_platdata.clocks = s5pc100_hsmmc_clksrcs; | ||
227 | s3c_hsmmc0_def_platdata.cfg_gpio = s5pc100_setup_sdhci0_cfg_gpio; | 210 | s3c_hsmmc0_def_platdata.cfg_gpio = s5pc100_setup_sdhci0_cfg_gpio; |
228 | #endif | 211 | #endif |
229 | } | 212 | } |
@@ -231,7 +214,6 @@ static inline void s5pc100_default_sdhci0(void) | |||
231 | static inline void s5pc100_default_sdhci1(void) | 214 | static inline void s5pc100_default_sdhci1(void) |
232 | { | 215 | { |
233 | #ifdef CONFIG_S3C_DEV_HSMMC1 | 216 | #ifdef CONFIG_S3C_DEV_HSMMC1 |
234 | s3c_hsmmc1_def_platdata.clocks = s5pc100_hsmmc_clksrcs; | ||
235 | s3c_hsmmc1_def_platdata.cfg_gpio = s5pc100_setup_sdhci1_cfg_gpio; | 217 | s3c_hsmmc1_def_platdata.cfg_gpio = s5pc100_setup_sdhci1_cfg_gpio; |
236 | #endif | 218 | #endif |
237 | } | 219 | } |
@@ -239,7 +221,6 @@ static inline void s5pc100_default_sdhci1(void) | |||
239 | static inline void s5pc100_default_sdhci2(void) | 221 | static inline void s5pc100_default_sdhci2(void) |
240 | { | 222 | { |
241 | #ifdef CONFIG_S3C_DEV_HSMMC2 | 223 | #ifdef CONFIG_S3C_DEV_HSMMC2 |
242 | s3c_hsmmc2_def_platdata.clocks = s5pc100_hsmmc_clksrcs; | ||
243 | s3c_hsmmc2_def_platdata.cfg_gpio = s5pc100_setup_sdhci2_cfg_gpio; | 224 | s3c_hsmmc2_def_platdata.cfg_gpio = s5pc100_setup_sdhci2_cfg_gpio; |
244 | #endif | 225 | #endif |
245 | } | 226 | } |
@@ -254,12 +235,9 @@ static inline void s5pc100_default_sdhci2(void) { } | |||
254 | /* S5PV210 SDHCI setup */ | 235 | /* S5PV210 SDHCI setup */ |
255 | 236 | ||
256 | #ifdef CONFIG_S5PV210_SETUP_SDHCI | 237 | #ifdef CONFIG_S5PV210_SETUP_SDHCI |
257 | extern char *s5pv210_hsmmc_clksrcs[4]; | ||
258 | |||
259 | static inline void s5pv210_default_sdhci0(void) | 238 | static inline void s5pv210_default_sdhci0(void) |
260 | { | 239 | { |
261 | #ifdef CONFIG_S3C_DEV_HSMMC | 240 | #ifdef CONFIG_S3C_DEV_HSMMC |
262 | s3c_hsmmc0_def_platdata.clocks = s5pv210_hsmmc_clksrcs; | ||
263 | s3c_hsmmc0_def_platdata.cfg_gpio = s5pv210_setup_sdhci0_cfg_gpio; | 241 | s3c_hsmmc0_def_platdata.cfg_gpio = s5pv210_setup_sdhci0_cfg_gpio; |
264 | #endif | 242 | #endif |
265 | } | 243 | } |
@@ -267,7 +245,6 @@ static inline void s5pv210_default_sdhci0(void) | |||
267 | static inline void s5pv210_default_sdhci1(void) | 245 | static inline void s5pv210_default_sdhci1(void) |
268 | { | 246 | { |
269 | #ifdef CONFIG_S3C_DEV_HSMMC1 | 247 | #ifdef CONFIG_S3C_DEV_HSMMC1 |
270 | s3c_hsmmc1_def_platdata.clocks = s5pv210_hsmmc_clksrcs; | ||
271 | s3c_hsmmc1_def_platdata.cfg_gpio = s5pv210_setup_sdhci1_cfg_gpio; | 248 | s3c_hsmmc1_def_platdata.cfg_gpio = s5pv210_setup_sdhci1_cfg_gpio; |
272 | #endif | 249 | #endif |
273 | } | 250 | } |
@@ -275,7 +252,6 @@ static inline void s5pv210_default_sdhci1(void) | |||
275 | static inline void s5pv210_default_sdhci2(void) | 252 | static inline void s5pv210_default_sdhci2(void) |
276 | { | 253 | { |
277 | #ifdef CONFIG_S3C_DEV_HSMMC2 | 254 | #ifdef CONFIG_S3C_DEV_HSMMC2 |
278 | s3c_hsmmc2_def_platdata.clocks = s5pv210_hsmmc_clksrcs; | ||
279 | s3c_hsmmc2_def_platdata.cfg_gpio = s5pv210_setup_sdhci2_cfg_gpio; | 255 | s3c_hsmmc2_def_platdata.cfg_gpio = s5pv210_setup_sdhci2_cfg_gpio; |
280 | #endif | 256 | #endif |
281 | } | 257 | } |
@@ -283,7 +259,6 @@ static inline void s5pv210_default_sdhci2(void) | |||
283 | static inline void s5pv210_default_sdhci3(void) | 259 | static inline void s5pv210_default_sdhci3(void) |
284 | { | 260 | { |
285 | #ifdef CONFIG_S3C_DEV_HSMMC3 | 261 | #ifdef CONFIG_S3C_DEV_HSMMC3 |
286 | s3c_hsmmc3_def_platdata.clocks = s5pv210_hsmmc_clksrcs; | ||
287 | s3c_hsmmc3_def_platdata.cfg_gpio = s5pv210_setup_sdhci3_cfg_gpio; | 262 | s3c_hsmmc3_def_platdata.cfg_gpio = s5pv210_setup_sdhci3_cfg_gpio; |
288 | #endif | 263 | #endif |
289 | } | 264 | } |
@@ -298,12 +273,9 @@ static inline void s5pv210_default_sdhci3(void) { } | |||
298 | 273 | ||
299 | /* EXYNOS4 SDHCI setup */ | 274 | /* EXYNOS4 SDHCI setup */ |
300 | #ifdef CONFIG_EXYNOS4_SETUP_SDHCI | 275 | #ifdef CONFIG_EXYNOS4_SETUP_SDHCI |
301 | extern char *exynos4_hsmmc_clksrcs[4]; | ||
302 | |||
303 | static inline void exynos4_default_sdhci0(void) | 276 | static inline void exynos4_default_sdhci0(void) |
304 | { | 277 | { |
305 | #ifdef CONFIG_S3C_DEV_HSMMC | 278 | #ifdef CONFIG_S3C_DEV_HSMMC |
306 | s3c_hsmmc0_def_platdata.clocks = exynos4_hsmmc_clksrcs; | ||
307 | s3c_hsmmc0_def_platdata.cfg_gpio = exynos4_setup_sdhci0_cfg_gpio; | 279 | s3c_hsmmc0_def_platdata.cfg_gpio = exynos4_setup_sdhci0_cfg_gpio; |
308 | #endif | 280 | #endif |
309 | } | 281 | } |
@@ -311,7 +283,6 @@ static inline void exynos4_default_sdhci0(void) | |||
311 | static inline void exynos4_default_sdhci1(void) | 283 | static inline void exynos4_default_sdhci1(void) |
312 | { | 284 | { |
313 | #ifdef CONFIG_S3C_DEV_HSMMC1 | 285 | #ifdef CONFIG_S3C_DEV_HSMMC1 |
314 | s3c_hsmmc1_def_platdata.clocks = exynos4_hsmmc_clksrcs; | ||
315 | s3c_hsmmc1_def_platdata.cfg_gpio = exynos4_setup_sdhci1_cfg_gpio; | 286 | s3c_hsmmc1_def_platdata.cfg_gpio = exynos4_setup_sdhci1_cfg_gpio; |
316 | #endif | 287 | #endif |
317 | } | 288 | } |
@@ -319,7 +290,6 @@ static inline void exynos4_default_sdhci1(void) | |||
319 | static inline void exynos4_default_sdhci2(void) | 290 | static inline void exynos4_default_sdhci2(void) |
320 | { | 291 | { |
321 | #ifdef CONFIG_S3C_DEV_HSMMC2 | 292 | #ifdef CONFIG_S3C_DEV_HSMMC2 |
322 | s3c_hsmmc2_def_platdata.clocks = exynos4_hsmmc_clksrcs; | ||
323 | s3c_hsmmc2_def_platdata.cfg_gpio = exynos4_setup_sdhci2_cfg_gpio; | 293 | s3c_hsmmc2_def_platdata.cfg_gpio = exynos4_setup_sdhci2_cfg_gpio; |
324 | #endif | 294 | #endif |
325 | } | 295 | } |
@@ -327,7 +297,6 @@ static inline void exynos4_default_sdhci2(void) | |||
327 | static inline void exynos4_default_sdhci3(void) | 297 | static inline void exynos4_default_sdhci3(void) |
328 | { | 298 | { |
329 | #ifdef CONFIG_S3C_DEV_HSMMC3 | 299 | #ifdef CONFIG_S3C_DEV_HSMMC3 |
330 | s3c_hsmmc3_def_platdata.clocks = exynos4_hsmmc_clksrcs; | ||
331 | s3c_hsmmc3_def_platdata.cfg_gpio = exynos4_setup_sdhci3_cfg_gpio; | 300 | s3c_hsmmc3_def_platdata.cfg_gpio = exynos4_setup_sdhci3_cfg_gpio; |
332 | #endif | 301 | #endif |
333 | } | 302 | } |
diff --git a/arch/arm/plat-samsung/include/plat/system-reset.h b/arch/arm/plat-samsung/include/plat/system-reset.h deleted file mode 100644 index a448e990964..00000000000 --- a/arch/arm/plat-samsung/include/plat/system-reset.h +++ /dev/null | |||
@@ -1,31 +0,0 @@ | |||
1 | /* linux/arch/arm/plat-samsung/include/plat/system-reset.h | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | ||
5 | * | ||
6 | * Based on arch/arm/mach-s3c2410/include/mach/system-reset.h | ||
7 | * | ||
8 | * S5P - System define for arch_reset() | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License version 2 as | ||
12 | * published by the Free Software Foundation. | ||
13 | */ | ||
14 | |||
15 | #include <plat/watchdog-reset.h> | ||
16 | |||
17 | void (*s5p_reset_hook)(void); | ||
18 | |||
19 | static void arch_reset(char mode, const char *cmd) | ||
20 | { | ||
21 | /* SWRESET support in s5p_reset_hook() */ | ||
22 | |||
23 | if (s5p_reset_hook) | ||
24 | s5p_reset_hook(); | ||
25 | |||
26 | /* Perform reset using Watchdog reset | ||
27 | * if there is no s5p_reset_hook() | ||
28 | */ | ||
29 | |||
30 | arch_wdt_reset(); | ||
31 | } | ||
diff --git a/arch/arm/plat-samsung/include/plat/watchdog-reset.h b/arch/arm/plat-samsung/include/plat/watchdog-reset.h index 40dbb2b0ae2..f19aff19205 100644 --- a/arch/arm/plat-samsung/include/plat/watchdog-reset.h +++ b/arch/arm/plat-samsung/include/plat/watchdog-reset.h | |||
@@ -17,6 +17,7 @@ | |||
17 | #include <linux/clk.h> | 17 | #include <linux/clk.h> |
18 | #include <linux/err.h> | 18 | #include <linux/err.h> |
19 | #include <linux/io.h> | 19 | #include <linux/io.h> |
20 | #include <linux/delay.h> | ||
20 | 21 | ||
21 | static inline void arch_wdt_reset(void) | 22 | static inline void arch_wdt_reset(void) |
22 | { | 23 | { |