diff options
Diffstat (limited to 'arch/arm/plat-samsung/include/plat/sdhci.h')
-rw-r--r-- | arch/arm/plat-samsung/include/plat/sdhci.h | 75 |
1 files changed, 44 insertions, 31 deletions
diff --git a/arch/arm/plat-samsung/include/plat/sdhci.h b/arch/arm/plat-samsung/include/plat/sdhci.h index e7b3c752e91..656dc00d30e 100644 --- a/arch/arm/plat-samsung/include/plat/sdhci.h +++ b/arch/arm/plat-samsung/include/plat/sdhci.h | |||
@@ -66,8 +66,6 @@ struct s3c_sdhci_platdata { | |||
66 | enum cd_types cd_type; | 66 | enum cd_types cd_type; |
67 | enum clk_types clk_type; | 67 | enum clk_types clk_type; |
68 | 68 | ||
69 | char **clocks; /* set of clock sources */ | ||
70 | |||
71 | int ext_cd_gpio; | 69 | int ext_cd_gpio; |
72 | bool ext_cd_gpio_invert; | 70 | bool ext_cd_gpio_invert; |
73 | int (*ext_cd_init)(void (*notify_func)(struct platform_device *, | 71 | int (*ext_cd_init)(void (*notify_func)(struct platform_device *, |
@@ -125,16 +123,17 @@ extern void exynos4_setup_sdhci0_cfg_gpio(struct platform_device *, int w); | |||
125 | extern void exynos4_setup_sdhci1_cfg_gpio(struct platform_device *, int w); | 123 | extern void exynos4_setup_sdhci1_cfg_gpio(struct platform_device *, int w); |
126 | extern void exynos4_setup_sdhci2_cfg_gpio(struct platform_device *, int w); | 124 | extern void exynos4_setup_sdhci2_cfg_gpio(struct platform_device *, int w); |
127 | extern void exynos4_setup_sdhci3_cfg_gpio(struct platform_device *, int w); | 125 | extern void exynos4_setup_sdhci3_cfg_gpio(struct platform_device *, int w); |
126 | extern void s5p64x0_setup_sdhci0_cfg_gpio(struct platform_device *, int w); | ||
127 | extern void s5p64x0_setup_sdhci1_cfg_gpio(struct platform_device *, int w); | ||
128 | extern void s5p6440_setup_sdhci2_cfg_gpio(struct platform_device *, int w); | ||
129 | extern void s5p6450_setup_sdhci2_cfg_gpio(struct platform_device *, int w); | ||
128 | 130 | ||
129 | /* S3C2416 SDHCI setup */ | 131 | /* S3C2416 SDHCI setup */ |
130 | 132 | ||
131 | #ifdef CONFIG_S3C2416_SETUP_SDHCI | 133 | #ifdef CONFIG_S3C2416_SETUP_SDHCI |
132 | extern char *s3c2416_hsmmc_clksrcs[4]; | ||
133 | |||
134 | static inline void s3c2416_default_sdhci0(void) | 134 | static inline void s3c2416_default_sdhci0(void) |
135 | { | 135 | { |
136 | #ifdef CONFIG_S3C_DEV_HSMMC | 136 | #ifdef CONFIG_S3C_DEV_HSMMC |
137 | s3c_hsmmc0_def_platdata.clocks = s3c2416_hsmmc_clksrcs; | ||
138 | s3c_hsmmc0_def_platdata.cfg_gpio = s3c2416_setup_sdhci0_cfg_gpio; | 137 | s3c_hsmmc0_def_platdata.cfg_gpio = s3c2416_setup_sdhci0_cfg_gpio; |
139 | #endif /* CONFIG_S3C_DEV_HSMMC */ | 138 | #endif /* CONFIG_S3C_DEV_HSMMC */ |
140 | } | 139 | } |
@@ -142,7 +141,6 @@ static inline void s3c2416_default_sdhci0(void) | |||
142 | static inline void s3c2416_default_sdhci1(void) | 141 | static inline void s3c2416_default_sdhci1(void) |
143 | { | 142 | { |
144 | #ifdef CONFIG_S3C_DEV_HSMMC1 | 143 | #ifdef CONFIG_S3C_DEV_HSMMC1 |
145 | s3c_hsmmc1_def_platdata.clocks = s3c2416_hsmmc_clksrcs; | ||
146 | s3c_hsmmc1_def_platdata.cfg_gpio = s3c2416_setup_sdhci1_cfg_gpio; | 144 | s3c_hsmmc1_def_platdata.cfg_gpio = s3c2416_setup_sdhci1_cfg_gpio; |
147 | #endif /* CONFIG_S3C_DEV_HSMMC1 */ | 145 | #endif /* CONFIG_S3C_DEV_HSMMC1 */ |
148 | } | 146 | } |
@@ -152,15 +150,13 @@ static inline void s3c2416_default_sdhci0(void) { } | |||
152 | static inline void s3c2416_default_sdhci1(void) { } | 150 | static inline void s3c2416_default_sdhci1(void) { } |
153 | 151 | ||
154 | #endif /* CONFIG_S3C2416_SETUP_SDHCI */ | 152 | #endif /* CONFIG_S3C2416_SETUP_SDHCI */ |
153 | |||
155 | /* S3C64XX SDHCI setup */ | 154 | /* S3C64XX SDHCI setup */ |
156 | 155 | ||
157 | #ifdef CONFIG_S3C64XX_SETUP_SDHCI | 156 | #ifdef CONFIG_S3C64XX_SETUP_SDHCI |
158 | extern char *s3c64xx_hsmmc_clksrcs[4]; | ||
159 | |||
160 | static inline void s3c6400_default_sdhci0(void) | 157 | static inline void s3c6400_default_sdhci0(void) |
161 | { | 158 | { |
162 | #ifdef CONFIG_S3C_DEV_HSMMC | 159 | #ifdef CONFIG_S3C_DEV_HSMMC |
163 | s3c_hsmmc0_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; | ||
164 | s3c_hsmmc0_def_platdata.cfg_gpio = s3c64xx_setup_sdhci0_cfg_gpio; | 160 | s3c_hsmmc0_def_platdata.cfg_gpio = s3c64xx_setup_sdhci0_cfg_gpio; |
165 | #endif | 161 | #endif |
166 | } | 162 | } |
@@ -168,7 +164,6 @@ static inline void s3c6400_default_sdhci0(void) | |||
168 | static inline void s3c6400_default_sdhci1(void) | 164 | static inline void s3c6400_default_sdhci1(void) |
169 | { | 165 | { |
170 | #ifdef CONFIG_S3C_DEV_HSMMC1 | 166 | #ifdef CONFIG_S3C_DEV_HSMMC1 |
171 | s3c_hsmmc1_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; | ||
172 | s3c_hsmmc1_def_platdata.cfg_gpio = s3c64xx_setup_sdhci1_cfg_gpio; | 167 | s3c_hsmmc1_def_platdata.cfg_gpio = s3c64xx_setup_sdhci1_cfg_gpio; |
173 | #endif | 168 | #endif |
174 | } | 169 | } |
@@ -176,7 +171,6 @@ static inline void s3c6400_default_sdhci1(void) | |||
176 | static inline void s3c6400_default_sdhci2(void) | 171 | static inline void s3c6400_default_sdhci2(void) |
177 | { | 172 | { |
178 | #ifdef CONFIG_S3C_DEV_HSMMC2 | 173 | #ifdef CONFIG_S3C_DEV_HSMMC2 |
179 | s3c_hsmmc2_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; | ||
180 | s3c_hsmmc2_def_platdata.cfg_gpio = s3c64xx_setup_sdhci2_cfg_gpio; | 174 | s3c_hsmmc2_def_platdata.cfg_gpio = s3c64xx_setup_sdhci2_cfg_gpio; |
181 | #endif | 175 | #endif |
182 | } | 176 | } |
@@ -184,7 +178,6 @@ static inline void s3c6400_default_sdhci2(void) | |||
184 | static inline void s3c6410_default_sdhci0(void) | 178 | static inline void s3c6410_default_sdhci0(void) |
185 | { | 179 | { |
186 | #ifdef CONFIG_S3C_DEV_HSMMC | 180 | #ifdef CONFIG_S3C_DEV_HSMMC |
187 | s3c_hsmmc0_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; | ||
188 | s3c_hsmmc0_def_platdata.cfg_gpio = s3c64xx_setup_sdhci0_cfg_gpio; | 181 | s3c_hsmmc0_def_platdata.cfg_gpio = s3c64xx_setup_sdhci0_cfg_gpio; |
189 | #endif | 182 | #endif |
190 | } | 183 | } |
@@ -192,7 +185,6 @@ static inline void s3c6410_default_sdhci0(void) | |||
192 | static inline void s3c6410_default_sdhci1(void) | 185 | static inline void s3c6410_default_sdhci1(void) |
193 | { | 186 | { |
194 | #ifdef CONFIG_S3C_DEV_HSMMC1 | 187 | #ifdef CONFIG_S3C_DEV_HSMMC1 |
195 | s3c_hsmmc1_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; | ||
196 | s3c_hsmmc1_def_platdata.cfg_gpio = s3c64xx_setup_sdhci1_cfg_gpio; | 188 | s3c_hsmmc1_def_platdata.cfg_gpio = s3c64xx_setup_sdhci1_cfg_gpio; |
197 | #endif | 189 | #endif |
198 | } | 190 | } |
@@ -200,7 +192,6 @@ static inline void s3c6410_default_sdhci1(void) | |||
200 | static inline void s3c6410_default_sdhci2(void) | 192 | static inline void s3c6410_default_sdhci2(void) |
201 | { | 193 | { |
202 | #ifdef CONFIG_S3C_DEV_HSMMC2 | 194 | #ifdef CONFIG_S3C_DEV_HSMMC2 |
203 | s3c_hsmmc2_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; | ||
204 | s3c_hsmmc2_def_platdata.cfg_gpio = s3c64xx_setup_sdhci2_cfg_gpio; | 195 | s3c_hsmmc2_def_platdata.cfg_gpio = s3c64xx_setup_sdhci2_cfg_gpio; |
205 | #endif | 196 | #endif |
206 | } | 197 | } |
@@ -215,15 +206,51 @@ static inline void s3c6400_default_sdhci2(void) { } | |||
215 | 206 | ||
216 | #endif /* CONFIG_S3C64XX_SETUP_SDHCI */ | 207 | #endif /* CONFIG_S3C64XX_SETUP_SDHCI */ |
217 | 208 | ||
209 | /* S5P64X0 SDHCI setup */ | ||
210 | |||
211 | #ifdef CONFIG_S5P64X0_SETUP_SDHCI | ||
212 | static inline void s5p64x0_default_sdhci0(void) | ||
213 | { | ||
214 | #ifdef CONFIG_S3C_DEV_HSMMC | ||
215 | s3c_hsmmc0_def_platdata.cfg_gpio = s5p64x0_setup_sdhci0_cfg_gpio; | ||
216 | #endif | ||
217 | } | ||
218 | |||
219 | static inline void s5p64x0_default_sdhci1(void) | ||
220 | { | ||
221 | #ifdef CONFIG_S3C_DEV_HSMMC1 | ||
222 | s3c_hsmmc1_def_platdata.cfg_gpio = s5p64x0_setup_sdhci1_cfg_gpio; | ||
223 | #endif | ||
224 | } | ||
225 | |||
226 | static inline void s5p6440_default_sdhci2(void) | ||
227 | { | ||
228 | #ifdef CONFIG_S3C_DEV_HSMMC2 | ||
229 | s3c_hsmmc2_def_platdata.cfg_gpio = s5p6440_setup_sdhci2_cfg_gpio; | ||
230 | #endif | ||
231 | } | ||
232 | |||
233 | static inline void s5p6450_default_sdhci2(void) | ||
234 | { | ||
235 | #ifdef CONFIG_S3C_DEV_HSMMC2 | ||
236 | s3c_hsmmc2_def_platdata.cfg_gpio = s5p6450_setup_sdhci2_cfg_gpio; | ||
237 | #endif | ||
238 | } | ||
239 | |||
240 | #else | ||
241 | static inline void s5p64x0_default_sdhci0(void) { } | ||
242 | static inline void s5p64x0_default_sdhci1(void) { } | ||
243 | static inline void s5p6440_default_sdhci2(void) { } | ||
244 | static inline void s5p6450_default_sdhci2(void) { } | ||
245 | |||
246 | #endif /* CONFIG_S5P64X0_SETUP_SDHCI */ | ||
247 | |||
218 | /* S5PC100 SDHCI setup */ | 248 | /* S5PC100 SDHCI setup */ |
219 | 249 | ||
220 | #ifdef CONFIG_S5PC100_SETUP_SDHCI | 250 | #ifdef CONFIG_S5PC100_SETUP_SDHCI |
221 | extern char *s5pc100_hsmmc_clksrcs[4]; | ||
222 | |||
223 | static inline void s5pc100_default_sdhci0(void) | 251 | static inline void s5pc100_default_sdhci0(void) |
224 | { | 252 | { |
225 | #ifdef CONFIG_S3C_DEV_HSMMC | 253 | #ifdef CONFIG_S3C_DEV_HSMMC |
226 | s3c_hsmmc0_def_platdata.clocks = s5pc100_hsmmc_clksrcs; | ||
227 | s3c_hsmmc0_def_platdata.cfg_gpio = s5pc100_setup_sdhci0_cfg_gpio; | 254 | s3c_hsmmc0_def_platdata.cfg_gpio = s5pc100_setup_sdhci0_cfg_gpio; |
228 | #endif | 255 | #endif |
229 | } | 256 | } |
@@ -231,7 +258,6 @@ static inline void s5pc100_default_sdhci0(void) | |||
231 | static inline void s5pc100_default_sdhci1(void) | 258 | static inline void s5pc100_default_sdhci1(void) |
232 | { | 259 | { |
233 | #ifdef CONFIG_S3C_DEV_HSMMC1 | 260 | #ifdef CONFIG_S3C_DEV_HSMMC1 |
234 | s3c_hsmmc1_def_platdata.clocks = s5pc100_hsmmc_clksrcs; | ||
235 | s3c_hsmmc1_def_platdata.cfg_gpio = s5pc100_setup_sdhci1_cfg_gpio; | 261 | s3c_hsmmc1_def_platdata.cfg_gpio = s5pc100_setup_sdhci1_cfg_gpio; |
236 | #endif | 262 | #endif |
237 | } | 263 | } |
@@ -239,7 +265,6 @@ static inline void s5pc100_default_sdhci1(void) | |||
239 | static inline void s5pc100_default_sdhci2(void) | 265 | static inline void s5pc100_default_sdhci2(void) |
240 | { | 266 | { |
241 | #ifdef CONFIG_S3C_DEV_HSMMC2 | 267 | #ifdef CONFIG_S3C_DEV_HSMMC2 |
242 | s3c_hsmmc2_def_platdata.clocks = s5pc100_hsmmc_clksrcs; | ||
243 | s3c_hsmmc2_def_platdata.cfg_gpio = s5pc100_setup_sdhci2_cfg_gpio; | 268 | s3c_hsmmc2_def_platdata.cfg_gpio = s5pc100_setup_sdhci2_cfg_gpio; |
244 | #endif | 269 | #endif |
245 | } | 270 | } |
@@ -254,12 +279,9 @@ static inline void s5pc100_default_sdhci2(void) { } | |||
254 | /* S5PV210 SDHCI setup */ | 279 | /* S5PV210 SDHCI setup */ |
255 | 280 | ||
256 | #ifdef CONFIG_S5PV210_SETUP_SDHCI | 281 | #ifdef CONFIG_S5PV210_SETUP_SDHCI |
257 | extern char *s5pv210_hsmmc_clksrcs[4]; | ||
258 | |||
259 | static inline void s5pv210_default_sdhci0(void) | 282 | static inline void s5pv210_default_sdhci0(void) |
260 | { | 283 | { |
261 | #ifdef CONFIG_S3C_DEV_HSMMC | 284 | #ifdef CONFIG_S3C_DEV_HSMMC |
262 | s3c_hsmmc0_def_platdata.clocks = s5pv210_hsmmc_clksrcs; | ||
263 | s3c_hsmmc0_def_platdata.cfg_gpio = s5pv210_setup_sdhci0_cfg_gpio; | 285 | s3c_hsmmc0_def_platdata.cfg_gpio = s5pv210_setup_sdhci0_cfg_gpio; |
264 | #endif | 286 | #endif |
265 | } | 287 | } |
@@ -267,7 +289,6 @@ static inline void s5pv210_default_sdhci0(void) | |||
267 | static inline void s5pv210_default_sdhci1(void) | 289 | static inline void s5pv210_default_sdhci1(void) |
268 | { | 290 | { |
269 | #ifdef CONFIG_S3C_DEV_HSMMC1 | 291 | #ifdef CONFIG_S3C_DEV_HSMMC1 |
270 | s3c_hsmmc1_def_platdata.clocks = s5pv210_hsmmc_clksrcs; | ||
271 | s3c_hsmmc1_def_platdata.cfg_gpio = s5pv210_setup_sdhci1_cfg_gpio; | 292 | s3c_hsmmc1_def_platdata.cfg_gpio = s5pv210_setup_sdhci1_cfg_gpio; |
272 | #endif | 293 | #endif |
273 | } | 294 | } |
@@ -275,7 +296,6 @@ static inline void s5pv210_default_sdhci1(void) | |||
275 | static inline void s5pv210_default_sdhci2(void) | 296 | static inline void s5pv210_default_sdhci2(void) |
276 | { | 297 | { |
277 | #ifdef CONFIG_S3C_DEV_HSMMC2 | 298 | #ifdef CONFIG_S3C_DEV_HSMMC2 |
278 | s3c_hsmmc2_def_platdata.clocks = s5pv210_hsmmc_clksrcs; | ||
279 | s3c_hsmmc2_def_platdata.cfg_gpio = s5pv210_setup_sdhci2_cfg_gpio; | 299 | s3c_hsmmc2_def_platdata.cfg_gpio = s5pv210_setup_sdhci2_cfg_gpio; |
280 | #endif | 300 | #endif |
281 | } | 301 | } |
@@ -283,7 +303,6 @@ static inline void s5pv210_default_sdhci2(void) | |||
283 | static inline void s5pv210_default_sdhci3(void) | 303 | static inline void s5pv210_default_sdhci3(void) |
284 | { | 304 | { |
285 | #ifdef CONFIG_S3C_DEV_HSMMC3 | 305 | #ifdef CONFIG_S3C_DEV_HSMMC3 |
286 | s3c_hsmmc3_def_platdata.clocks = s5pv210_hsmmc_clksrcs; | ||
287 | s3c_hsmmc3_def_platdata.cfg_gpio = s5pv210_setup_sdhci3_cfg_gpio; | 306 | s3c_hsmmc3_def_platdata.cfg_gpio = s5pv210_setup_sdhci3_cfg_gpio; |
288 | #endif | 307 | #endif |
289 | } | 308 | } |
@@ -298,12 +317,9 @@ static inline void s5pv210_default_sdhci3(void) { } | |||
298 | 317 | ||
299 | /* EXYNOS4 SDHCI setup */ | 318 | /* EXYNOS4 SDHCI setup */ |
300 | #ifdef CONFIG_EXYNOS4_SETUP_SDHCI | 319 | #ifdef CONFIG_EXYNOS4_SETUP_SDHCI |
301 | extern char *exynos4_hsmmc_clksrcs[4]; | ||
302 | |||
303 | static inline void exynos4_default_sdhci0(void) | 320 | static inline void exynos4_default_sdhci0(void) |
304 | { | 321 | { |
305 | #ifdef CONFIG_S3C_DEV_HSMMC | 322 | #ifdef CONFIG_S3C_DEV_HSMMC |
306 | s3c_hsmmc0_def_platdata.clocks = exynos4_hsmmc_clksrcs; | ||
307 | s3c_hsmmc0_def_platdata.cfg_gpio = exynos4_setup_sdhci0_cfg_gpio; | 323 | s3c_hsmmc0_def_platdata.cfg_gpio = exynos4_setup_sdhci0_cfg_gpio; |
308 | #endif | 324 | #endif |
309 | } | 325 | } |
@@ -311,7 +327,6 @@ static inline void exynos4_default_sdhci0(void) | |||
311 | static inline void exynos4_default_sdhci1(void) | 327 | static inline void exynos4_default_sdhci1(void) |
312 | { | 328 | { |
313 | #ifdef CONFIG_S3C_DEV_HSMMC1 | 329 | #ifdef CONFIG_S3C_DEV_HSMMC1 |
314 | s3c_hsmmc1_def_platdata.clocks = exynos4_hsmmc_clksrcs; | ||
315 | s3c_hsmmc1_def_platdata.cfg_gpio = exynos4_setup_sdhci1_cfg_gpio; | 330 | s3c_hsmmc1_def_platdata.cfg_gpio = exynos4_setup_sdhci1_cfg_gpio; |
316 | #endif | 331 | #endif |
317 | } | 332 | } |
@@ -319,7 +334,6 @@ static inline void exynos4_default_sdhci1(void) | |||
319 | static inline void exynos4_default_sdhci2(void) | 334 | static inline void exynos4_default_sdhci2(void) |
320 | { | 335 | { |
321 | #ifdef CONFIG_S3C_DEV_HSMMC2 | 336 | #ifdef CONFIG_S3C_DEV_HSMMC2 |
322 | s3c_hsmmc2_def_platdata.clocks = exynos4_hsmmc_clksrcs; | ||
323 | s3c_hsmmc2_def_platdata.cfg_gpio = exynos4_setup_sdhci2_cfg_gpio; | 337 | s3c_hsmmc2_def_platdata.cfg_gpio = exynos4_setup_sdhci2_cfg_gpio; |
324 | #endif | 338 | #endif |
325 | } | 339 | } |
@@ -327,7 +341,6 @@ static inline void exynos4_default_sdhci2(void) | |||
327 | static inline void exynos4_default_sdhci3(void) | 341 | static inline void exynos4_default_sdhci3(void) |
328 | { | 342 | { |
329 | #ifdef CONFIG_S3C_DEV_HSMMC3 | 343 | #ifdef CONFIG_S3C_DEV_HSMMC3 |
330 | s3c_hsmmc3_def_platdata.clocks = exynos4_hsmmc_clksrcs; | ||
331 | s3c_hsmmc3_def_platdata.cfg_gpio = exynos4_setup_sdhci3_cfg_gpio; | 344 | s3c_hsmmc3_def_platdata.cfg_gpio = exynos4_setup_sdhci3_cfg_gpio; |
332 | #endif | 345 | #endif |
333 | } | 346 | } |