aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/plat-s5p/clock.c
diff options
context:
space:
mode:
Diffstat (limited to 'arch/arm/plat-s5p/clock.c')
-rw-r--r--arch/arm/plat-s5p/clock.c13
1 files changed, 13 insertions, 0 deletions
diff --git a/arch/arm/plat-s5p/clock.c b/arch/arm/plat-s5p/clock.c
index 3d3c0f1934f..aa96e335073 100644
--- a/arch/arm/plat-s5p/clock.c
+++ b/arch/arm/plat-s5p/clock.c
@@ -33,6 +33,12 @@ struct clk clk_ext_xtal_mux = {
33 .id = -1, 33 .id = -1,
34}; 34};
35 35
36static struct clk s5p_clk_27m = {
37 .name = "clk_27m",
38 .id = -1,
39 .rate = 27000000,
40};
41
36/* 48MHz USB Phy clock output */ 42/* 48MHz USB Phy clock output */
37struct clk clk_48m = { 43struct clk clk_48m = {
38 .name = "clk_48m", 44 .name = "clk_48m",
@@ -104,6 +110,11 @@ struct clksrc_sources clk_src_epll = {
104 .nr_sources = ARRAY_SIZE(clk_src_epll_list), 110 .nr_sources = ARRAY_SIZE(clk_src_epll_list),
105}; 111};
106 112
113struct clk clk_vpll = {
114 .name = "vpll",
115 .id = -1,
116};
117
107int s5p_gatectrl(void __iomem *reg, struct clk *clk, int enable) 118int s5p_gatectrl(void __iomem *reg, struct clk *clk, int enable)
108{ 119{
109 unsigned int ctrlbit = clk->ctrlbit; 120 unsigned int ctrlbit = clk->ctrlbit;
@@ -118,10 +129,12 @@ int s5p_gatectrl(void __iomem *reg, struct clk *clk, int enable)
118static struct clk *s5p_clks[] __initdata = { 129static struct clk *s5p_clks[] __initdata = {
119 &clk_ext_xtal_mux, 130 &clk_ext_xtal_mux,
120 &clk_48m, 131 &clk_48m,
132 &s5p_clk_27m,
121 &clk_fout_apll, 133 &clk_fout_apll,
122 &clk_fout_mpll, 134 &clk_fout_mpll,
123 &clk_fout_epll, 135 &clk_fout_epll,
124 &clk_arm, 136 &clk_arm,
137 &clk_vpll,
125}; 138};
126 139
127void __init s5p_register_clocks(unsigned long xtal_freq) 140void __init s5p_register_clocks(unsigned long xtal_freq)