diff options
Diffstat (limited to 'arch/arm/plat-omap/include/plat/clock.h')
-rw-r--r-- | arch/arm/plat-omap/include/plat/clock.h | 28 |
1 files changed, 21 insertions, 7 deletions
diff --git a/arch/arm/plat-omap/include/plat/clock.h b/arch/arm/plat-omap/include/plat/clock.h index 8eb0adab19e..006e599c661 100644 --- a/arch/arm/plat-omap/include/plat/clock.h +++ b/arch/arm/plat-omap/include/plat/clock.h | |||
@@ -25,6 +25,8 @@ struct clockdomain; | |||
25 | * @disable: fn ptr that enables the current clock in hardware | 25 | * @disable: fn ptr that enables the current clock in hardware |
26 | * @find_idlest: function returning the IDLEST register for the clock's IP blk | 26 | * @find_idlest: function returning the IDLEST register for the clock's IP blk |
27 | * @find_companion: function returning the "companion" clk reg for the clock | 27 | * @find_companion: function returning the "companion" clk reg for the clock |
28 | * @allow_idle: fn ptr that enables autoidle for the current clock in hardware | ||
29 | * @deny_idle: fn ptr that disables autoidle for the current clock in hardware | ||
28 | * | 30 | * |
29 | * A "companion" clk is an accompanying clock to the one being queried | 31 | * A "companion" clk is an accompanying clock to the one being queried |
30 | * that must be enabled for the IP module connected to the clock to | 32 | * that must be enabled for the IP module connected to the clock to |
@@ -42,6 +44,8 @@ struct clkops { | |||
42 | u8 *, u8 *); | 44 | u8 *, u8 *); |
43 | void (*find_companion)(struct clk *, void __iomem **, | 45 | void (*find_companion)(struct clk *, void __iomem **, |
44 | u8 *); | 46 | u8 *); |
47 | void (*allow_idle)(struct clk *); | ||
48 | void (*deny_idle)(struct clk *); | ||
45 | }; | 49 | }; |
46 | 50 | ||
47 | #ifdef CONFIG_ARCH_OMAP2PLUS | 51 | #ifdef CONFIG_ARCH_OMAP2PLUS |
@@ -53,6 +57,7 @@ struct clkops { | |||
53 | #define RATE_IN_3430ES2PLUS (1 << 3) /* 3430 ES >= 2 rates only */ | 57 | #define RATE_IN_3430ES2PLUS (1 << 3) /* 3430 ES >= 2 rates only */ |
54 | #define RATE_IN_36XX (1 << 4) | 58 | #define RATE_IN_36XX (1 << 4) |
55 | #define RATE_IN_4430 (1 << 5) | 59 | #define RATE_IN_4430 (1 << 5) |
60 | #define RATE_IN_TI816X (1 << 6) | ||
56 | 61 | ||
57 | #define RATE_IN_24XX (RATE_IN_242X | RATE_IN_243X) | 62 | #define RATE_IN_24XX (RATE_IN_242X | RATE_IN_243X) |
58 | #define RATE_IN_34XX (RATE_IN_3430ES1 | RATE_IN_3430ES2PLUS) | 63 | #define RATE_IN_34XX (RATE_IN_3430ES1 | RATE_IN_3430ES2PLUS) |
@@ -104,7 +109,6 @@ struct clksel { | |||
104 | * @clk_ref: struct clk pointer to the clock's reference clock input | 109 | * @clk_ref: struct clk pointer to the clock's reference clock input |
105 | * @control_reg: register containing the DPLL mode bitfield | 110 | * @control_reg: register containing the DPLL mode bitfield |
106 | * @enable_mask: mask of the DPLL mode bitfield in @control_reg | 111 | * @enable_mask: mask of the DPLL mode bitfield in @control_reg |
107 | * @rate_tolerance: maximum variance allowed from target rate (in Hz) | ||
108 | * @last_rounded_rate: cache of the last rate result of omap2_dpll_round_rate() | 112 | * @last_rounded_rate: cache of the last rate result of omap2_dpll_round_rate() |
109 | * @last_rounded_m: cache of the last M result of omap2_dpll_round_rate() | 113 | * @last_rounded_m: cache of the last M result of omap2_dpll_round_rate() |
110 | * @max_multiplier: maximum valid non-bypass multiplier value (actual) | 114 | * @max_multiplier: maximum valid non-bypass multiplier value (actual) |
@@ -130,12 +134,9 @@ struct clksel { | |||
130 | * XXX Some DPLLs have multiple bypass inputs, so it's not technically | 134 | * XXX Some DPLLs have multiple bypass inputs, so it's not technically |
131 | * correct to only have one @clk_bypass pointer. | 135 | * correct to only have one @clk_bypass pointer. |
132 | * | 136 | * |
133 | * XXX @rate_tolerance should probably be deprecated - currently there | ||
134 | * don't seem to be any usecases for DPLL rounding that is not exact. | ||
135 | * | ||
136 | * XXX The runtime-variable fields (@last_rounded_rate, @last_rounded_m, | 137 | * XXX The runtime-variable fields (@last_rounded_rate, @last_rounded_m, |
137 | * @last_rounded_n) should be separated from the runtime-fixed fields | 138 | * @last_rounded_n) should be separated from the runtime-fixed fields |
138 | * and placed into a differenct structure, so that the runtime-fixed data | 139 | * and placed into a different structure, so that the runtime-fixed data |
139 | * can be placed into read-only space. | 140 | * can be placed into read-only space. |
140 | */ | 141 | */ |
141 | struct dpll_data { | 142 | struct dpll_data { |
@@ -146,7 +147,6 @@ struct dpll_data { | |||
146 | struct clk *clk_ref; | 147 | struct clk *clk_ref; |
147 | void __iomem *control_reg; | 148 | void __iomem *control_reg; |
148 | u32 enable_mask; | 149 | u32 enable_mask; |
149 | unsigned int rate_tolerance; | ||
150 | unsigned long last_rounded_rate; | 150 | unsigned long last_rounded_rate; |
151 | u16 last_rounded_m; | 151 | u16 last_rounded_m; |
152 | u16 max_multiplier; | 152 | u16 max_multiplier; |
@@ -171,12 +171,24 @@ struct dpll_data { | |||
171 | 171 | ||
172 | #endif | 172 | #endif |
173 | 173 | ||
174 | /* struct clk.flags possibilities */ | 174 | /* |
175 | * struct clk.flags possibilities | ||
176 | * | ||
177 | * XXX document the rest of the clock flags here | ||
178 | * | ||
179 | * CLOCK_CLKOUTX2: (OMAP4 only) DPLL CLKOUT and CLKOUTX2 GATE_CTRL | ||
180 | * bits share the same register. This flag allows the | ||
181 | * omap4_dpllmx*() code to determine which GATE_CTRL bit field | ||
182 | * should be used. This is a temporary solution - a better approach | ||
183 | * would be to associate clock type-specific data with the clock, | ||
184 | * similar to the struct dpll_data approach. | ||
185 | */ | ||
175 | #define ENABLE_REG_32BIT (1 << 0) /* Use 32-bit access */ | 186 | #define ENABLE_REG_32BIT (1 << 0) /* Use 32-bit access */ |
176 | #define CLOCK_IDLE_CONTROL (1 << 1) | 187 | #define CLOCK_IDLE_CONTROL (1 << 1) |
177 | #define CLOCK_NO_IDLE_PARENT (1 << 2) | 188 | #define CLOCK_NO_IDLE_PARENT (1 << 2) |
178 | #define ENABLE_ON_INIT (1 << 3) /* Enable upon framework init */ | 189 | #define ENABLE_ON_INIT (1 << 3) /* Enable upon framework init */ |
179 | #define INVERT_ENABLE (1 << 4) /* 0 enables, 1 disables */ | 190 | #define INVERT_ENABLE (1 << 4) /* 0 enables, 1 disables */ |
191 | #define CLOCK_CLKOUTX2 (1 << 5) | ||
180 | 192 | ||
181 | /** | 193 | /** |
182 | * struct clk - OMAP struct clk | 194 | * struct clk - OMAP struct clk |
@@ -292,6 +304,8 @@ extern void clk_init_cpufreq_table(struct cpufreq_frequency_table **table); | |||
292 | extern void clk_exit_cpufreq_table(struct cpufreq_frequency_table **table); | 304 | extern void clk_exit_cpufreq_table(struct cpufreq_frequency_table **table); |
293 | #endif | 305 | #endif |
294 | extern struct clk *omap_clk_get_by_name(const char *name); | 306 | extern struct clk *omap_clk_get_by_name(const char *name); |
307 | extern int omap_clk_enable_autoidle_all(void); | ||
308 | extern int omap_clk_disable_autoidle_all(void); | ||
295 | 309 | ||
296 | extern const struct clkops clkops_null; | 310 | extern const struct clkops clkops_null; |
297 | 311 | ||