1 files changed, 54 insertions, 53 deletions

diff --git a/arch/arm/plat-mxc/include/mach/mx21.h b/arch/arm/plat-mxc/include/mach/mx21.h
index 6cd049ebbd8..468738aa997 100644
--- a/arch/arm/plat-mxc/include/mach/mx21.h
+++ b/arch/arm/plat-mxc/include/mach/mx21.h
@@ -99,59 +99,60 @@
 #define MX21_IO_ADDRESS(x)              IOMEM(MX21_IO_P2V(x))
 
 /* fixed interrupt numbers */
-#define MX21_INT_CSPI3          6
-#define MX21_INT_GPIO           8
-#define MX21_INT_FIRI           9
-#define MX21_INT_SDHC2          10
-#define MX21_INT_SDHC1          11
-#define MX21_INT_I2C            12
-#define MX21_INT_SSI2           13
-#define MX21_INT_SSI1           14
-#define MX21_INT_CSPI2          15
-#define MX21_INT_CSPI1          16
-#define MX21_INT_UART4          17
-#define MX21_INT_UART3          18
-#define MX21_INT_UART2          19
-#define MX21_INT_UART1          20
-#define MX21_INT_KPP            21
-#define MX21_INT_RTC            22
-#define MX21_INT_PWM            23
-#define MX21_INT_GPT3           24
-#define MX21_INT_GPT2           25
-#define MX21_INT_GPT1           26
-#define MX21_INT_WDOG           27
-#define MX21_INT_PCMCIA         28
-#define MX21_INT_NFC            29
-#define MX21_INT_BMI            30
-#define MX21_INT_CSI            31
-#define MX21_INT_DMACH0         32
-#define MX21_INT_DMACH1         33
-#define MX21_INT_DMACH2         34
-#define MX21_INT_DMACH3         35
-#define MX21_INT_DMACH4         36
-#define MX21_INT_DMACH5         37
-#define MX21_INT_DMACH6         38
-#define MX21_INT_DMACH7         39
-#define MX21_INT_DMACH8         40
-#define MX21_INT_DMACH9         41
-#define MX21_INT_DMACH10        42
-#define MX21_INT_DMACH11        43
-#define MX21_INT_DMACH12        44
-#define MX21_INT_DMACH13        45
-#define MX21_INT_DMACH14        46
-#define MX21_INT_DMACH15        47
-#define MX21_INT_EMMAENC        49
-#define MX21_INT_EMMADEC        50
-#define MX21_INT_EMMAPRP        51
-#define MX21_INT_EMMAPP         52
-#define MX21_INT_USBWKUP        53
-#define MX21_INT_USBDMA         54
-#define MX21_INT_USBHOST        55
-#define MX21_INT_USBFUNC        56
-#define MX21_INT_USBMNP         57
-#define MX21_INT_USBCTRL        58
-#define MX21_INT_SLCDC          60
-#define MX21_INT_LCDC           61
+#include <asm/irq.h>
+#define MX21_INT_CSPI3          (NR_IRQS_LEGACY + 6)
+#define MX21_INT_GPIO           (NR_IRQS_LEGACY + 8)
+#define MX21_INT_FIRI           (NR_IRQS_LEGACY + 9)
+#define MX21_INT_SDHC2          (NR_IRQS_LEGACY + 10)
+#define MX21_INT_SDHC1          (NR_IRQS_LEGACY + 11)
+#define MX21_INT_I2C            (NR_IRQS_LEGACY + 12)
+#define MX21_INT_SSI2           (NR_IRQS_LEGACY + 13)
+#define MX21_INT_SSI1           (NR_IRQS_LEGACY + 14)
+#define MX21_INT_CSPI2          (NR_IRQS_LEGACY + 15)
+#define MX21_INT_CSPI1          (NR_IRQS_LEGACY + 16)
+#define MX21_INT_UART4          (NR_IRQS_LEGACY + 17)
+#define MX21_INT_UART3          (NR_IRQS_LEGACY + 18)
+#define MX21_INT_UART2          (NR_IRQS_LEGACY + 19)
+#define MX21_INT_UART1          (NR_IRQS_LEGACY + 20)
+#define MX21_INT_KPP            (NR_IRQS_LEGACY + 21)
+#define MX21_INT_RTC            (NR_IRQS_LEGACY + 22)
+#define MX21_INT_PWM            (NR_IRQS_LEGACY + 23)
+#define MX21_INT_GPT3           (NR_IRQS_LEGACY + 24)
+#define MX21_INT_GPT2           (NR_IRQS_LEGACY + 25)
+#define MX21_INT_GPT1           (NR_IRQS_LEGACY + 26)
+#define MX21_INT_WDOG           (NR_IRQS_LEGACY + 27)
+#define MX21_INT_PCMCIA         (NR_IRQS_LEGACY + 28)
+#define MX21_INT_NFC            (NR_IRQS_LEGACY + 29)
+#define MX21_INT_BMI            (NR_IRQS_LEGACY + 30)
+#define MX21_INT_CSI            (NR_IRQS_LEGACY + 31)
+#define MX21_INT_DMACH0         (NR_IRQS_LEGACY + 32)
+#define MX21_INT_DMACH1         (NR_IRQS_LEGACY + 33)
+#define MX21_INT_DMACH2         (NR_IRQS_LEGACY + 34)
+#define MX21_INT_DMACH3         (NR_IRQS_LEGACY + 35)
+#define MX21_INT_DMACH4         (NR_IRQS_LEGACY + 36)
+#define MX21_INT_DMACH5         (NR_IRQS_LEGACY + 37)
+#define MX21_INT_DMACH6         (NR_IRQS_LEGACY + 38)
+#define MX21_INT_DMACH7         (NR_IRQS_LEGACY + 39)
+#define MX21_INT_DMACH8         (NR_IRQS_LEGACY + 40)
+#define MX21_INT_DMACH9         (NR_IRQS_LEGACY + 41)
+#define MX21_INT_DMACH10        (NR_IRQS_LEGACY + 42)
+#define MX21_INT_DMACH11        (NR_IRQS_LEGACY + 43)
+#define MX21_INT_DMACH12        (NR_IRQS_LEGACY + 44)
+#define MX21_INT_DMACH13        (NR_IRQS_LEGACY + 45)
+#define MX21_INT_DMACH14        (NR_IRQS_LEGACY + 46)
+#define MX21_INT_DMACH15        (NR_IRQS_LEGACY + 47)
+#define MX21_INT_EMMAENC        (NR_IRQS_LEGACY + 49)
+#define MX21_INT_EMMADEC        (NR_IRQS_LEGACY + 50)
+#define MX21_INT_EMMAPRP        (NR_IRQS_LEGACY + 51)
+#define MX21_INT_EMMAPP         (NR_IRQS_LEGACY + 52)
+#define MX21_INT_USBWKUP        (NR_IRQS_LEGACY + 53)
+#define MX21_INT_USBDMA         (NR_IRQS_LEGACY + 54)
+#define MX21_INT_USBHOST        (NR_IRQS_LEGACY + 55)
+#define MX21_INT_USBFUNC        (NR_IRQS_LEGACY + 56)
+#define MX21_INT_USBMNP         (NR_IRQS_LEGACY + 57)
+#define MX21_INT_USBCTRL        (NR_IRQS_LEGACY + 58)
+#define MX21_INT_SLCDC          (NR_IRQS_LEGACY + 60)
+#define MX21_INT_LCDC           (NR_IRQS_LEGACY + 61)
 
 /* fixed DMA request numbers */
 #define MX21_DMA_REQ_CSPI3_RX   1