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Diffstat (limited to 'arch/arm/plat-mxc/include/mach/irqs.h')
-rw-r--r--arch/arm/plat-mxc/include/mach/irqs.h9
1 files changed, 8 insertions, 1 deletions
diff --git a/arch/arm/plat-mxc/include/mach/irqs.h b/arch/arm/plat-mxc/include/mach/irqs.h
index 0cb347645db..a3ad643de5a 100644
--- a/arch/arm/plat-mxc/include/mach/irqs.h
+++ b/arch/arm/plat-mxc/include/mach/irqs.h
@@ -12,9 +12,13 @@
12#define __ASM_ARCH_MXC_IRQS_H__ 12#define __ASM_ARCH_MXC_IRQS_H__
13 13
14/* 14/*
15 * So far all i.MX SoCs have 64 internal interrupts 15 * SoCs with TZIC interrupt controller have 128 IRQs, those with AVIC have 64
16 */ 16 */
17#ifdef CONFIG_MXC_TZIC
18#define MXC_INTERNAL_IRQS 128
19#else
17#define MXC_INTERNAL_IRQS 64 20#define MXC_INTERNAL_IRQS 64
21#endif
18 22
19#define MXC_GPIO_IRQ_START MXC_INTERNAL_IRQS 23#define MXC_GPIO_IRQ_START MXC_INTERNAL_IRQS
20 24
@@ -26,6 +30,8 @@
26#define MXC_GPIO_IRQS (32 * 3) 30#define MXC_GPIO_IRQS (32 * 3)
27#elif defined CONFIG_ARCH_MX25 31#elif defined CONFIG_ARCH_MX25
28#define MXC_GPIO_IRQS (32 * 4) 32#define MXC_GPIO_IRQS (32 * 4)
33#elif defined CONFIG_ARCH_MX5
34#define MXC_GPIO_IRQS (32 * 4)
29#elif defined CONFIG_ARCH_MXC91231 35#elif defined CONFIG_ARCH_MXC91231
30#define MXC_GPIO_IRQS (32 * 4) 36#define MXC_GPIO_IRQS (32 * 4)
31#endif 37#endif
@@ -51,6 +57,7 @@
51#else 57#else
52#define MX3_IPU_IRQS 0 58#define MX3_IPU_IRQS 0
53#endif 59#endif
60/* REVISIT: Add IPU irqs on IMX51 */
54 61
55#define NR_IRQS (MXC_IPU_IRQ_START + MX3_IPU_IRQS) 62#define NR_IRQS (MXC_IPU_IRQ_START + MX3_IPU_IRQS)
56 63