diff options
Diffstat (limited to 'arch/arm/mach-ux500/include/mach/irqs.h')
| -rw-r--r-- | arch/arm/mach-ux500/include/mach/irqs.h | 44 |
1 files changed, 0 insertions, 44 deletions
diff --git a/arch/arm/mach-ux500/include/mach/irqs.h b/arch/arm/mach-ux500/include/mach/irqs.h index 693aa57de88..880ae45bc23 100644 --- a/arch/arm/mach-ux500/include/mach/irqs.h +++ b/arch/arm/mach-ux500/include/mach/irqs.h | |||
| @@ -21,50 +21,6 @@ | |||
| 21 | 21 | ||
| 22 | /* Interrupt numbers generic for shared peripheral */ | 22 | /* Interrupt numbers generic for shared peripheral */ |
| 23 | #define IRQ_MTU0 (IRQ_SHPI_START + 4) | 23 | #define IRQ_MTU0 (IRQ_SHPI_START + 4) |
| 24 | #define IRQ_SPI2 (IRQ_SHPI_START + 6) | ||
| 25 | #define IRQ_SPI0 (IRQ_SHPI_START + 8) | ||
| 26 | #define IRQ_UART0 (IRQ_SHPI_START + 11) | ||
| 27 | #define IRQ_I2C3 (IRQ_SHPI_START + 12) | ||
| 28 | #define IRQ_SSP0 (IRQ_SHPI_START + 14) | ||
| 29 | #define IRQ_MTU1 (IRQ_SHPI_START + 17) | ||
| 30 | #define IRQ_RTC_RTT (IRQ_SHPI_START + 18) | ||
| 31 | #define IRQ_UART1 (IRQ_SHPI_START + 19) | ||
| 32 | #define IRQ_I2C0 (IRQ_SHPI_START + 21) | ||
| 33 | #define IRQ_I2C1 (IRQ_SHPI_START + 22) | ||
| 34 | #define IRQ_USBOTG (IRQ_SHPI_START + 23) | ||
| 35 | #define IRQ_DMA (IRQ_SHPI_START + 25) | ||
| 36 | #define IRQ_UART2 (IRQ_SHPI_START + 26) | ||
| 37 | #define IRQ_HSIR_EXCEP (IRQ_SHPI_START + 29) | ||
| 38 | #define IRQ_MSP0 (IRQ_SHPI_START + 31) | ||
| 39 | #define IRQ_HSIR_CH0_OVRRUN (IRQ_SHPI_START + 32) | ||
| 40 | #define IRQ_HSIR_CH1_OVRRUN (IRQ_SHPI_START + 33) | ||
| 41 | #define IRQ_HSIR_CH2_OVRRUN (IRQ_SHPI_START + 34) | ||
| 42 | #define IRQ_HSIR_CH3_OVRRUN (IRQ_SHPI_START + 35) | ||
| 43 | #define IRQ_AB8500 (IRQ_SHPI_START + 40) | ||
| 44 | #define IRQ_PRCMU (IRQ_SHPI_START + 47) | ||
| 45 | #define IRQ_DISP (IRQ_SHPI_START + 48) | ||
| 46 | #define IRQ_SiPI3 (IRQ_SHPI_START + 49) | ||
| 47 | #define IRQ_I2C4 (IRQ_SHPI_START + 51) | ||
| 48 | #define IRQ_SSP1 (IRQ_SHPI_START + 52) | ||
| 49 | #define IRQ_I2C2 (IRQ_SHPI_START + 55) | ||
| 50 | #define IRQ_SDMMC0 (IRQ_SHPI_START + 60) | ||
| 51 | #define IRQ_MSP1 (IRQ_SHPI_START + 62) | ||
| 52 | #define IRQ_SPI1 (IRQ_SHPI_START + 96) | ||
| 53 | #define IRQ_MSP2 (IRQ_SHPI_START + 98) | ||
| 54 | #define IRQ_SDMMC4 (IRQ_SHPI_START + 99) | ||
| 55 | #define IRQ_HSIRD0 (IRQ_SHPI_START + 104) | ||
| 56 | #define IRQ_HSIRD1 (IRQ_SHPI_START + 105) | ||
| 57 | #define IRQ_HSITD0 (IRQ_SHPI_START + 106) | ||
| 58 | #define IRQ_HSITD1 (IRQ_SHPI_START + 107) | ||
| 59 | #define IRQ_GPIO0 (IRQ_SHPI_START + 119) | ||
| 60 | #define IRQ_GPIO1 (IRQ_SHPI_START + 120) | ||
| 61 | #define IRQ_GPIO2 (IRQ_SHPI_START + 121) | ||
| 62 | #define IRQ_GPIO3 (IRQ_SHPI_START + 122) | ||
| 63 | #define IRQ_GPIO4 (IRQ_SHPI_START + 123) | ||
| 64 | #define IRQ_GPIO5 (IRQ_SHPI_START + 124) | ||
| 65 | #define IRQ_GPIO6 (IRQ_SHPI_START + 125) | ||
| 66 | #define IRQ_GPIO7 (IRQ_SHPI_START + 126) | ||
| 67 | #define IRQ_GPIO8 (IRQ_SHPI_START + 127) | ||
| 68 | 24 | ||
| 69 | /* There are 128 shared peripheral interrupts assigned to | 25 | /* There are 128 shared peripheral interrupts assigned to |
| 70 | * INTID[160:32]. The first 32 interrupts are reserved. | 26 | * INTID[160:32]. The first 32 interrupts are reserved. |