1 files changed, 151 insertions, 0 deletions
diff --git a/arch/arm/mach-ux500/clock.h b/arch/arm/mach-ux500/clock.h
new file mode 100644
index 00000000000..07449070522
--- /dev/null
+++ b/arch/arm/mach-ux500/clock.h
@@ -0,0 +1,151 @@
+/*
+ *  Copyright (C) 2010 ST-Ericsson
+ *  Copyright (C) 2009 STMicroelectronics
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+/**
+ * struct clkops - ux500 clock operations
+ * @enable:     function to enable the clock
+ * @disable:    function to disable the clock
+ * @get_rate:   function to get the current clock rate
+ *
+ * This structure contains function pointers to functions that will be used to
+ * control the clock.  All of these functions are optional.  If get_rate is
+ * NULL, the rate in the struct clk will be used.
+ */
+struct clkops {
+        void (*enable) (struct clk *);
+        void (*disable) (struct clk *);
+        unsigned long (*get_rate) (struct clk *);
+};
+/**
+ * struct clk - ux500 clock structure
+ * @ops:                pointer to clkops struct used to control this clock
+ * @name:               name, for debugging
+ * @enabled:            refcount. positive if enabled, zero if disabled
+ * @get_rate:           custom callback for getting the clock rate
+ * @data:               custom per-clock data for example for the get_rate
+ *                      callback
+ * @rate:               fixed rate for clocks which don't implement
+ *                      ops->getrate
+ * @prcmu_cg_off:       address offset of the combined enable/disable register
+ *                      (used on u8500v1)
+ * @prcmu_cg_bit:       bit in the combined enable/disable register (used on
+ *                      u8500v1)
+ * @prcmu_cg_mgt:       address of the enable/disable register (used on
+ *                      u8500ed)
+ * @cluster:            peripheral cluster number
+ * @prcc_bus:           bit for the bus clock in the peripheral's CLKRST
+ * @prcc_kernel:        bit for the kernel clock in the peripheral's CLKRST.
+ *                      -1 if no kernel clock exists.
+ * @parent_cluster:     pointer to parent's cluster clk struct
+ * @parent_periph:      pointer to parent's peripheral clk struct
+ *
+ * Peripherals are organised into clusters, and each cluster has an associated
+ * bus clock.  Some peripherals also have a parent peripheral clock.
+ *
+ * In order to enable a clock for a peripheral, we need to enable:
+ *      (1) the parent cluster (bus) clock at the PRCMU level
+ *      (2) the parent peripheral clock (if any) at the PRCMU level
+ *      (3) the peripheral's bus & kernel clock at the PRCC level
+ *
+ * (1) and (2) are handled by defining clk structs (DEFINE_PRCMU_CLK) for each
+ * of the cluster and peripheral clocks, and hooking these as the parents of
+ * the individual peripheral clocks.
+ *
+ * (3) is handled by specifying the bits in the PRCC control registers required
+ * to enable these clocks and modifying them in the ->enable and
+ * ->disable callbacks of the peripheral clocks (DEFINE_PRCC_CLK).
+ *
+ * This structure describes both the PRCMU-level clocks and PRCC-level clocks.
+ * The prcmu_* fields are only used for the PRCMU clocks, and the cluster,
+ * prcc, and parent pointers are only used for the PRCC-level clocks.
+ */
+struct clk {
+        const struct clkops     *ops;
+        const char              *name;
+        unsigned int            enabled;
+        unsigned long           (*get_rate)(struct clk *);
+        void                    *data;
+        unsigned long           rate;
+        struct list_head        list;
+        /* These three are only for PRCMU clks */
+        unsigned int            prcmu_cg_off;
+        unsigned int            prcmu_cg_bit;
+        unsigned int            prcmu_cg_mgt;
+        /* The rest are only for PRCC clks */
+        int                     cluster;
+        unsigned int            prcc_bus;
+        unsigned int            prcc_kernel;
+        struct clk              *parent_cluster;
+        struct clk              *parent_periph;
+#if defined(CONFIG_DEBUG_FS)
+        struct dentry           *dent;          /* For visible tree hierarchy */
+        struct dentry           *dent_bus;      /* For visible tree hierarchy */
+#endif
+};
+#define DEFINE_PRCMU_CLK(_name, _cg_off, _cg_bit, _reg)         \
+struct clk clk_##_name = {                                      \
+                .name           = #_name,                       \
+                .ops            = &clk_prcmu_ops,               \
+                .prcmu_cg_off   = _cg_off,                      \
+                .prcmu_cg_bit   = _cg_bit,                      \
+                .prcmu_cg_mgt   = PRCM_##_reg##_MGT             \
+        }
+#define DEFINE_PRCMU_CLK_RATE(_name, _cg_off, _cg_bit, _reg, _rate)     \
+struct clk clk_##_name = {                                              \
+                .name           = #_name,                               \
+                .ops            = &clk_prcmu_ops,                       \
+                .prcmu_cg_off   = _cg_off,                              \
+                .prcmu_cg_bit   = _cg_bit,                              \
+                .rate           = _rate,                                \
+                .prcmu_cg_mgt   = PRCM_##_reg##_MGT                     \
+        }
+#define DEFINE_PRCC_CLK(_pclust, _name, _bus_en, _kernel_en, _kernclk)  \
+struct clk clk_##_name = {                                              \
+                .name           = #_name,                               \
+                .ops            = &clk_prcc_ops,                        \
+                .cluster        = _pclust,                              \
+                .prcc_bus       = _bus_en,                              \
+                .prcc_kernel    = _kernel_en,                           \
+                .parent_cluster = &clk_per##_pclust##clk,               \
+                .parent_periph  = _kernclk                              \
+        }
+#define DEFINE_PRCC_CLK_CUSTOM(_pclust, _name, _bus_en, _kernel_en, _kernclk, _callback, _data) \
+struct clk clk_##_name = {                                              \
+                .name           = #_name,                               \
+                .ops            = &clk_prcc_ops,                        \
+                .cluster        = _pclust,                              \
+                .prcc_bus       = _bus_en,                              \
+                .prcc_kernel    = _kernel_en,                           \
+                .parent_cluster = &clk_per##_pclust##clk,               \
+                .parent_periph  = _kernclk,                             \
+                .get_rate       = _callback,                            \
+                .data           = (void *) _data                        \
+        }
+#define CLK(_clk, _devname, _conname)                   \
+        {                                               \
+                .clk    = &clk_##_clk,                  \
+                .dev_id = _devname,                     \
+                .con_id = _conname,                     \
+        }
+int __init clk_db8500_ed_fixup(void);
+int __init clk_init(void);

diff --git a/arch/arm/mach-ux500/clock.h b/arch/arm/mach-ux500/clock.h new file mode 100644 index 00000000000..07449070522 --- /dev/null +++ b/arch/arm/mach-ux500/clock.h
@@ -0,0 +1,151 @@
	1	/*
	2	* Copyright (C) 2010 ST-Ericsson
	3	* Copyright (C) 2009 STMicroelectronics
	4	*
	5	* This program is free software; you can redistribute it and/or modify
	6	* it under the terms of the GNU General Public License version 2 as
	7	* published by the Free Software Foundation.
	8	*/
	9
	10	/**
	11	* struct clkops - ux500 clock operations
	12	* @enable: function to enable the clock
	13	* @disable: function to disable the clock
	14	* @get_rate: function to get the current clock rate
	15	*
	16	* This structure contains function pointers to functions that will be used to
	17	* control the clock. All of these functions are optional. If get_rate is
	18	* NULL, the rate in the struct clk will be used.
	19	*/
	20	struct clkops {
	21	void (enable) (struct clk );
	22	void (disable) (struct clk );
	23	unsigned long (get_rate) (struct clk );
	24	};
	25
	26	/**
	27	* struct clk - ux500 clock structure
	28	* @ops: pointer to clkops struct used to control this clock
	29	* @name: name, for debugging
	30	* @enabled: refcount. positive if enabled, zero if disabled
	31	* @get_rate: custom callback for getting the clock rate
	32	* @data: custom per-clock data for example for the get_rate
	33	* callback
	34	* @rate: fixed rate for clocks which don't implement
	35	* ops->getrate
	36	* @prcmu_cg_off: address offset of the combined enable/disable register
	37	* (used on u8500v1)
	38	* @prcmu_cg_bit: bit in the combined enable/disable register (used on
	39	* u8500v1)
	40	* @prcmu_cg_mgt: address of the enable/disable register (used on
	41	* u8500ed)
	42	* @cluster: peripheral cluster number
	43	* @prcc_bus: bit for the bus clock in the peripheral's CLKRST
	44	* @prcc_kernel: bit for the kernel clock in the peripheral's CLKRST.
	45	* -1 if no kernel clock exists.
	46	* @parent_cluster: pointer to parent's cluster clk struct
	47	* @parent_periph: pointer to parent's peripheral clk struct
	48	*
	49	* Peripherals are organised into clusters, and each cluster has an associated
	50	* bus clock. Some peripherals also have a parent peripheral clock.
	51	*
	52	* In order to enable a clock for a peripheral, we need to enable:
	53	* (1) the parent cluster (bus) clock at the PRCMU level
	54	* (2) the parent peripheral clock (if any) at the PRCMU level
	55	* (3) the peripheral's bus & kernel clock at the PRCC level
	56	*
	57	* (1) and (2) are handled by defining clk structs (DEFINE_PRCMU_CLK) for each
	58	* of the cluster and peripheral clocks, and hooking these as the parents of
	59	* the individual peripheral clocks.
	60	*
	61	* (3) is handled by specifying the bits in the PRCC control registers required
	62	* to enable these clocks and modifying them in the ->enable and
	63	* ->disable callbacks of the peripheral clocks (DEFINE_PRCC_CLK).
	64	*
	65	* This structure describes both the PRCMU-level clocks and PRCC-level clocks.
	66	* The prcmu_* fields are only used for the PRCMU clocks, and the cluster,
	67	* prcc, and parent pointers are only used for the PRCC-level clocks.
	68	*/
	69	struct clk {
	70	const struct clkops *ops;
	71	const char *name;
	72	unsigned int enabled;
	73	unsigned long (get_rate)(struct clk );
	74	void *data;
	75
	76	unsigned long rate;
	77	struct list_head list;
	78
	79	/* These three are only for PRCMU clks */
	80
	81	unsigned int prcmu_cg_off;
	82	unsigned int prcmu_cg_bit;
	83	unsigned int prcmu_cg_mgt;
	84
	85	/* The rest are only for PRCC clks */
	86
	87	int cluster;
	88	unsigned int prcc_bus;
	89	unsigned int prcc_kernel;
	90
	91	struct clk *parent_cluster;
	92	struct clk *parent_periph;
	93	#if defined(CONFIG_DEBUG_FS)
	94	struct dentry dent; / For visible tree hierarchy */
	95	struct dentry dent_bus; / For visible tree hierarchy */
	96	#endif
	97	};
	98
	99	#define DEFINE_PRCMU_CLK(_name, _cg_off, _cg_bit, _reg) \
	100	struct clk clk_##_name = { \
	101	.name = #_name, \
	102	.ops = &clk_prcmu_ops, \
	103	.prcmu_cg_off = _cg_off, \
	104	.prcmu_cg_bit = _cg_bit, \
	105	.prcmu_cg_mgt = PRCM_##_reg##_MGT \
	106	}
	107
	108	#define DEFINE_PRCMU_CLK_RATE(_name, _cg_off, _cg_bit, _reg, _rate) \
	109	struct clk clk_##_name = { \
	110	.name = #_name, \
	111	.ops = &clk_prcmu_ops, \
	112	.prcmu_cg_off = _cg_off, \
	113	.prcmu_cg_bit = _cg_bit, \
	114	.rate = _rate, \
	115	.prcmu_cg_mgt = PRCM_##_reg##_MGT \
	116	}
	117
	118	#define DEFINE_PRCC_CLK(_pclust, _name, _bus_en, _kernel_en, _kernclk) \
	119	struct clk clk_##_name = { \
	120	.name = #_name, \
	121	.ops = &clk_prcc_ops, \
	122	.cluster = _pclust, \
	123	.prcc_bus = _bus_en, \
	124	.prcc_kernel = _kernel_en, \
	125	.parent_cluster = &clk_per##_pclust##clk, \
	126	.parent_periph = _kernclk \
	127	}
	128
	129	#define DEFINE_PRCC_CLK_CUSTOM(_pclust, _name, _bus_en, _kernel_en, _kernclk, _callback, _data) \
	130	struct clk clk_##_name = { \
	131	.name = #_name, \
	132	.ops = &clk_prcc_ops, \
	133	.cluster = _pclust, \
	134	.prcc_bus = _bus_en, \
	135	.prcc_kernel = _kernel_en, \
	136	.parent_cluster = &clk_per##_pclust##clk, \
	137	.parent_periph = _kernclk, \
	138	.get_rate = _callback, \
	139	.data = (void *) _data \
	140	}
	141
	142
	143	#define CLK(_clk, _devname, _conname) \
	144	{ \
	145	.clk = &clk_##_clk, \
	146	.dev_id = _devname, \
	147	.con_id = _conname, \
	148	}
	149
	150	int __init clk_db8500_ed_fixup(void);
	151	int __init clk_init(void);