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Diffstat (limited to 'arch/arm/mach-tegra/timer.c')
-rw-r--r--arch/arm/mach-tegra/timer.c24
1 files changed, 3 insertions, 21 deletions
diff --git a/arch/arm/mach-tegra/timer.c b/arch/arm/mach-tegra/timer.c
index e2272d263a8..732c724008b 100644
--- a/arch/arm/mach-tegra/timer.c
+++ b/arch/arm/mach-tegra/timer.c
@@ -19,7 +19,6 @@
19 19
20#include <linux/init.h> 20#include <linux/init.h>
21#include <linux/err.h> 21#include <linux/err.h>
22#include <linux/sched.h>
23#include <linux/time.h> 22#include <linux/time.h>
24#include <linux/interrupt.h> 23#include <linux/interrupt.h>
25#include <linux/irq.h> 24#include <linux/irq.h>
@@ -106,25 +105,9 @@ static struct clock_event_device tegra_clockevent = {
106 .set_mode = tegra_timer_set_mode, 105 .set_mode = tegra_timer_set_mode,
107}; 106};
108 107
109static DEFINE_CLOCK_DATA(cd); 108static u32 notrace tegra_read_sched_clock(void)
110
111/*
112 * Constants generated by clocks_calc_mult_shift(m, s, 1MHz, NSEC_PER_SEC, 60).
113 * This gives a resolution of about 1us and a wrap period of about 1h11min.
114 */
115#define SC_MULT 4194304000u
116#define SC_SHIFT 22
117
118unsigned long long notrace sched_clock(void)
119{
120 u32 cyc = timer_readl(TIMERUS_CNTR_1US);
121 return cyc_to_fixed_sched_clock(&cd, cyc, (u32)~0, SC_MULT, SC_SHIFT);
122}
123
124static void notrace tegra_update_sched_clock(void)
125{ 109{
126 u32 cyc = timer_readl(TIMERUS_CNTR_1US); 110 return timer_readl(TIMERUS_CNTR_1US);
127 update_sched_clock(&cd, cyc, (u32)~0);
128} 111}
129 112
130/* 113/*
@@ -218,8 +201,7 @@ static void __init tegra_init_timer(void)
218 WARN(1, "Unknown clock rate"); 201 WARN(1, "Unknown clock rate");
219 } 202 }
220 203
221 init_fixed_sched_clock(&cd, tegra_update_sched_clock, 32, 204 setup_sched_clock(tegra_read_sched_clock, 32, 1000000);
222 1000000, SC_MULT, SC_SHIFT);
223 205
224 if (clocksource_mmio_init(timer_reg_base + TIMERUS_CNTR_1US, 206 if (clocksource_mmio_init(timer_reg_base + TIMERUS_CNTR_1US,
225 "timer_us", 1000000, 300, 32, clocksource_mmio_readl_up)) { 207 "timer_us", 1000000, 300, 32, clocksource_mmio_readl_up)) {