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-rw-r--r--arch/arm/mach-tegra/mc.c73
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diff --git a/arch/arm/mach-tegra/mc.c b/arch/arm/mach-tegra/mc.c
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1/*
2 * arch/arm/mach-tegra/mc.c
3 *
4 * Copyright (C) 2010 Google, Inc.
5 * Copyright (C) 2011 NVIDIA Corporation
6 *
7 * Author:
8 * Erik Gilling <konkers@google.com>
9 *
10 * This software is licensed under the terms of the GNU General Public
11 * License version 2, as published by the Free Software Foundation, and
12 * may be copied, distributed, and modified under those terms.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 */
20
21#include <linux/io.h>
22#include <linux/spinlock.h>
23
24#include <mach/iomap.h>
25#include <mach/mc.h>
26
27#if defined(CONFIG_ARCH_TEGRA_2x_SOC)
28static DEFINE_SPINLOCK(tegra_mc_lock);
29
30void tegra_mc_set_priority(unsigned long client, unsigned long prio)
31{
32 unsigned long mc_base = IO_TO_VIRT(TEGRA_MC_BASE);
33 unsigned long reg = client >> 8;
34 int field = client & 0xff;
35 unsigned long val;
36 unsigned long flags;
37
38 spin_lock_irqsave(&tegra_mc_lock, flags);
39 val = readl(mc_base + reg);
40 val &= ~(TEGRA_MC_PRIO_MASK << field);
41 val |= prio << field;
42 writel(val, mc_base + reg);
43 spin_unlock_irqrestore(&tegra_mc_lock, flags);
44
45}
46
47int tegra_mc_get_tiled_memory_bandwidth_multiplier(void)
48{
49 return 1;
50}
51
52#else
53 /* !!!FIXME!!! IMPLEMENT tegra_mc_set_priority() */
54
55#include "tegra3_emc.h"
56
57/*
58 * If using T30/DDR3, the 2nd 16 bytes part of DDR3 atom is 2nd line and is
59 * discarded in tiling mode.
60 */
61int tegra_mc_get_tiled_memory_bandwidth_multiplier(void)
62{
63 int type;
64
65 type = tegra_emc_get_dram_type();
66 WARN_ONCE(type == -1, "unknown type DRAM because DVFS is disabled\n");
67
68 if (type == DRAM_TYPE_DDR3)
69 return 2;
70 else
71 return 1;
72}
73#endif