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-rw-r--r--arch/arm/mach-tegra/csi.c84
1 files changed, 84 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/csi.c b/arch/arm/mach-tegra/csi.c
new file mode 100644
index 00000000000..3b26c7ae223
--- /dev/null
+++ b/arch/arm/mach-tegra/csi.c
@@ -0,0 +1,84 @@
1/*
2 * arch/arm/mach-tegra/csi.c
3 *
4 * Copyright (C) 2010-2011 NVIDIA Corporation.
5 *
6 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and
8 * may be copied, distributed, and modified under those terms.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 */
16
17#include <linux/kernel.h>
18#include <linux/string.h>
19#include <linux/err.h>
20#include <linux/clk.h>
21#include <linux/io.h>
22
23#include <mach/iomap.h>
24#include <mach/csi.h>
25
26#include "clock.h"
27
28static struct clk *vi_clk;
29static struct clk *csi_clk;
30
31int tegra_vi_csi_writel(u32 val, u32 offset)
32{
33 if (vi_clk == NULL) {
34 vi_clk = tegra_get_clock_by_name("vi");
35 if (IS_ERR_OR_NULL(vi_clk)) {
36 pr_err("vi: can't get vi clock\n");
37 return -EINVAL;
38 }
39 }
40 clk_enable(vi_clk);
41
42 if (csi_clk == NULL) {
43 csi_clk = tegra_get_clock_by_name("csi");
44 if (IS_ERR_OR_NULL(csi_clk)) {
45 pr_err("csi: can't get csi clock\n");
46 return -EINVAL;
47 }
48 }
49 clk_enable(csi_clk);
50
51 writel(val, IO_TO_VIRT(TEGRA_VI_BASE) + offset * 4);
52
53 clk_disable(csi_clk);
54 clk_disable(vi_clk);
55 return 0;
56}
57
58int tegra_vi_csi_readl(u32 offset, u32 *val)
59{
60 if (vi_clk == NULL) {
61 vi_clk = tegra_get_clock_by_name("vi");
62 if (IS_ERR_OR_NULL(vi_clk)) {
63 pr_err("vi: can't get vi clock\n");
64 return -EINVAL;
65 }
66 }
67 clk_enable(vi_clk);
68
69 if (csi_clk == NULL) {
70 csi_clk = tegra_get_clock_by_name("csi");
71 if (IS_ERR_OR_NULL(csi_clk)) {
72 pr_err("csi: can't get csi clock\n");
73 return -EINVAL;
74 }
75 }
76 clk_enable(csi_clk);
77
78 *val = readl(IO_TO_VIRT(TEGRA_VI_BASE) + offset * 4);
79
80 clk_disable(csi_clk);
81 clk_disable(vi_clk);
82
83 return 0;
84}