diff options
Diffstat (limited to 'arch/arm/mach-tegra/clock.h')
-rw-r--r-- | arch/arm/mach-tegra/clock.h | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/clock.h b/arch/arm/mach-tegra/clock.h index 5c44106616c..bc300657deb 100644 --- a/arch/arm/mach-tegra/clock.h +++ b/arch/arm/mach-tegra/clock.h | |||
@@ -24,6 +24,8 @@ | |||
24 | #include <linux/list.h> | 24 | #include <linux/list.h> |
25 | #include <linux/spinlock.h> | 25 | #include <linux/spinlock.h> |
26 | 26 | ||
27 | #include <mach/clk.h> | ||
28 | |||
27 | #define DIV_BUS (1 << 0) | 29 | #define DIV_BUS (1 << 0) |
28 | #define DIV_U71 (1 << 1) | 30 | #define DIV_U71 (1 << 1) |
29 | #define DIV_U71_FIXED (1 << 2) | 31 | #define DIV_U71_FIXED (1 << 2) |
@@ -39,7 +41,16 @@ | |||
39 | #define PERIPH_MANUAL_RESET (1 << 12) | 41 | #define PERIPH_MANUAL_RESET (1 << 12) |
40 | #define PLL_ALT_MISC_REG (1 << 13) | 42 | #define PLL_ALT_MISC_REG (1 << 13) |
41 | #define PLLU (1 << 14) | 43 | #define PLLU (1 << 14) |
44 | #define PLLX (1 << 15) | ||
45 | #define MUX_PWM (1 << 16) | ||
46 | #define MUX8 (1 << 17) | ||
47 | #define DIV_U71_UART (1 << 18) | ||
48 | #define MUX_CLK_OUT (1 << 19) | ||
49 | #define PLLM (1 << 20) | ||
50 | #define DIV_U71_INT (1 << 21) | ||
51 | #define DIV_U71_IDLE (1 << 22) | ||
42 | #define ENABLE_ON_INIT (1 << 28) | 52 | #define ENABLE_ON_INIT (1 << 28) |
53 | #define PERIPH_ON_APB (1 << 29) | ||
43 | 54 | ||
44 | struct clk; | 55 | struct clk; |
45 | 56 | ||
@@ -65,6 +76,8 @@ struct clk_ops { | |||
65 | int (*set_rate)(struct clk *, unsigned long); | 76 | int (*set_rate)(struct clk *, unsigned long); |
66 | long (*round_rate)(struct clk *, unsigned long); | 77 | long (*round_rate)(struct clk *, unsigned long); |
67 | void (*reset)(struct clk *, bool); | 78 | void (*reset)(struct clk *, bool); |
79 | int (*clk_cfg_ex)(struct clk *, | ||
80 | enum tegra_clk_ex_param, u32); | ||
68 | }; | 81 | }; |
69 | 82 | ||
70 | enum clk_state { | 83 | enum clk_state { |
@@ -114,6 +127,7 @@ struct clk { | |||
114 | unsigned long vco_max; | 127 | unsigned long vco_max; |
115 | const struct clk_pll_freq_table *freq_table; | 128 | const struct clk_pll_freq_table *freq_table; |
116 | int lock_delay; | 129 | int lock_delay; |
130 | unsigned long fixed_rate; | ||
117 | } pll; | 131 | } pll; |
118 | struct { | 132 | struct { |
119 | u32 sel; | 133 | u32 sel; |
@@ -146,6 +160,7 @@ struct tegra_clk_init_table { | |||
146 | }; | 160 | }; |
147 | 161 | ||
148 | void tegra2_init_clocks(void); | 162 | void tegra2_init_clocks(void); |
163 | void tegra30_init_clocks(void); | ||
149 | void clk_init(struct clk *clk); | 164 | void clk_init(struct clk *clk); |
150 | struct clk *tegra_get_clock_by_name(const char *name); | 165 | struct clk *tegra_get_clock_by_name(const char *name); |
151 | int clk_reparent(struct clk *c, struct clk *parent); | 166 | int clk_reparent(struct clk *c, struct clk *parent); |