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1/*
2 * arch/arm/mach-tegra/board-whistler-baseband.h
3 *
4 * Copyright (C) 2011 NVIDIA Corporation
5 *
6 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and
8 * may be copied, distributed, and modified under those terms.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 */
16
17#ifndef BOARD_WHISTLER_BASEBAND_H
18#define BOARD_WHISTLER_BASEBAND_H
19
20#include <linux/delay.h>
21#include <linux/gpio.h>
22#include <linux/spi/spi.h>
23#include <linux/platform_data/tegra_usb.h>
24#include <mach/usb_phy.h>
25#include <linux/resource.h>
26#include <linux/platform_device.h>
27#include <linux/err.h>
28#include <linux/interrupt.h>
29#include <linux/irq.h>
30#include <linux/wakelock.h>
31#include <asm/mach-types.h>
32#include <mach/pinmux.h>
33#include <mach/spi.h>
34#include "clock.h"
35#include "devices.h"
36#include "gpio-names.h"
37
38#define BOARD_WHISTLER_BASEBAND_U3XX 0
39#define BOARD_WHISTLER_BASEBAND_N731 1
40#define BOARD_WHISTLER_BASEBAND_SPI_LOOPBACK 2
41#define BOARD_WHISTLER_BASEBAND_HSIC 3
42
43#define TEGRA_CAIF_SSPI_GPIO_RESET TEGRA_GPIO_PV0
44#define TEGRA_CAIF_SSPI_GPIO_POWER TEGRA_GPIO_PV1
45#define TEGRA_CAIF_SSPI_GPIO_AWR TEGRA_GPIO_PZ0
46#define TEGRA_CAIF_SSPI_GPIO_CWR TEGRA_GPIO_PY6
47#define TEGRA_CAIF_SSPI_GPIO_SPI_INT TEGRA_GPIO_PO6
48#define TEGRA_CAIF_SSPI_GPIO_SS TEGRA_GPIO_PV2
49
50#define MODEM_PWR_ON TEGRA_GPIO_PV1
51#define MODEM_RESET TEGRA_GPIO_PV0
52
53/* Rainbow1 and 570 */
54#define AWR TEGRA_GPIO_PZ0
55#define CWR TEGRA_GPIO_PY6
56#define SPI_INT TEGRA_GPIO_PO6
57#define SPI_SLAVE_SEL TEGRA_GPIO_PV2
58
59/* Icera 450 GPIO */
60#define AP2MDM_ACK TEGRA_GPIO_PZ0
61#define MDM2AP_ACK TEGRA_GPIO_PY6
62#define AP2MDM_ACK2 TEGRA_GPIO_PU2
63#define MDM2AP_ACK2 TEGRA_GPIO_PV2
64#define BB_RST_OUT TEGRA_GPIO_PV3
65
66/* ULPI GPIO */
67#define ULPI_STP TEGRA_GPIO_PY3
68#define ULPI_DIR TEGRA_GPIO_PY1
69#define ULPI_D0 TEGRA_GPIO_PO1
70#define ULPI_D1 TEGRA_GPIO_PO2
71
72struct whistler_baseband {
73 struct tegra_clk_init_table *clk_init;
74 struct platform_device **platform_device;
75 int platform_device_size;
76 struct spi_board_info *spi_board_info;
77 int spi_board_info_size;
78};
79
80int whistler_baseband_init(void);
81#endif /* BOARD_WHISTLER_BASEBAND_H */