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-rw-r--r--arch/arm/mach-tegra/board-kai-pinmux.c565
1 files changed, 565 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/board-kai-pinmux.c b/arch/arm/mach-tegra/board-kai-pinmux.c
new file mode 100644
index 00000000000..1bc64bdb155
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+++ b/arch/arm/mach-tegra/board-kai-pinmux.c
@@ -0,0 +1,565 @@
1/*
2 * arch/arm/mach-tegra/board-kai-pinmux.c
3 *
4 * Copyright (C) 2012 NVIDIA Corporation
5 *
6 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and
8 * may be copied, distributed, and modified under those terms.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 */
16
17#include <linux/kernel.h>
18#include <linux/init.h>
19#include <mach/pinmux.h>
20#include "board.h"
21#include "board-kai.h"
22#include "gpio-names.h"
23
24#define DEFAULT_DRIVE(_name) \
25 { \
26 .pingroup = TEGRA_DRIVE_PINGROUP_##_name, \
27 .hsm = TEGRA_HSM_DISABLE, \
28 .schmitt = TEGRA_SCHMITT_ENABLE, \
29 .drive = TEGRA_DRIVE_DIV_1, \
30 .pull_down = TEGRA_PULL_31, \
31 .pull_up = TEGRA_PULL_31, \
32 .slew_rising = TEGRA_SLEW_SLOWEST, \
33 .slew_falling = TEGRA_SLEW_SLOWEST, \
34 }
35/* Setting the drive strength of pins
36 * hsm: Enable High speed mode (ENABLE/DISABLE)
37 * Schimit: Enable/disable schimit (ENABLE/DISABLE)
38 * drive: low power mode (DIV_1, DIV_2, DIV_4, DIV_8)
39 * pulldn_drive - drive down (falling edge) - Driver Output Pull-Down drive
40 * strength code. Value from 0 to 31.
41 * pullup_drive - drive up (rising edge) - Driver Output Pull-Up drive
42 * strength code. Value from 0 to 31.
43 * pulldn_slew - Driver Output Pull-Up slew control code - 2bit code
44 * code 11 is least slewing of signal. code 00 is highest
45 * slewing of the signal.
46 * Value - FASTEST, FAST, SLOW, SLOWEST
47 * pullup_slew - Driver Output Pull-Down slew control code -
48 * code 11 is least slewing of signal. code 00 is highest
49 * slewing of the signal.
50 * Value - FASTEST, FAST, SLOW, SLOWEST
51 */
52#define SET_DRIVE(_name, _hsm, _schmitt, _drive, _pulldn_drive, _pullup_drive, _pulldn_slew, _pullup_slew) \
53 { \
54 .pingroup = TEGRA_DRIVE_PINGROUP_##_name, \
55 .hsm = TEGRA_HSM_##_hsm, \
56 .schmitt = TEGRA_SCHMITT_##_schmitt, \
57 .drive = TEGRA_DRIVE_##_drive, \
58 .pull_down = TEGRA_PULL_##_pulldn_drive, \
59 .pull_up = TEGRA_PULL_##_pullup_drive, \
60 .slew_rising = TEGRA_SLEW_##_pulldn_slew, \
61 .slew_falling = TEGRA_SLEW_##_pullup_slew, \
62 }
63
64/* !!!FIXME!!!! POPULATE THIS TABLE */
65static __initdata struct tegra_drive_pingroup_config kai_drive_pinmux[] = {
66 /* DEFAULT_DRIVE(<pin_group>), */
67 /* SET_DRIVE(ATA, DISABLE, DISABLE, DIV_1, 31, 31, FAST, FAST) */
68 SET_DRIVE(DAP2, DISABLE, ENABLE, DIV_1, 31, 31, FASTEST, FASTEST),
69
70 /* All I2C pins are driven to maximum drive strength */
71 /* GEN1 I2C */
72 SET_DRIVE(DBG, DISABLE, ENABLE, DIV_1, 31, 31, FASTEST, FASTEST),
73
74 /* GEN2 I2C */
75 SET_DRIVE(AT5, DISABLE, ENABLE, DIV_1, 31, 31, FASTEST, FASTEST),
76
77 /* CAM I2C */
78 SET_DRIVE(GME, DISABLE, ENABLE, DIV_1, 31, 31, FASTEST, FASTEST),
79
80 /* DDC I2C */
81 SET_DRIVE(DDC, DISABLE, ENABLE, DIV_1, 31, 31, FASTEST, FASTEST),
82
83 /* PWR_I2C */
84 SET_DRIVE(AO1, DISABLE, ENABLE, DIV_1, 31, 31, FASTEST, FASTEST),
85
86 /* UART3 */
87 SET_DRIVE(UART3, DISABLE, ENABLE, DIV_1, 31, 31, FASTEST, FASTEST),
88
89 /* SDMMC1 */
90 SET_DRIVE(SDIO1, DISABLE, DISABLE, DIV_1, 46, 42, FAST, FAST),
91
92 /* SDMMC3 */
93 SET_DRIVE(SDIO3, DISABLE, DISABLE, DIV_1, 46, 42, FAST, FAST),
94
95 /* SDMMC4 */
96 SET_DRIVE(GMA, DISABLE, DISABLE, DIV_1, 9, 9, SLOWEST, SLOWEST),
97 SET_DRIVE(GMB, DISABLE, DISABLE, DIV_1, 9, 9, SLOWEST, SLOWEST),
98 SET_DRIVE(GMC, DISABLE, DISABLE, DIV_1, 9, 9, SLOWEST, SLOWEST),
99 SET_DRIVE(GMD, DISABLE, DISABLE, DIV_1, 9, 9, SLOWEST, SLOWEST),
100
101};
102
103#define DEFAULT_PINMUX(_pingroup, _mux, _pupd, _tri, _io) \
104 { \
105 .pingroup = TEGRA_PINGROUP_##_pingroup, \
106 .func = TEGRA_MUX_##_mux, \
107 .pupd = TEGRA_PUPD_##_pupd, \
108 .tristate = TEGRA_TRI_##_tri, \
109 .io = TEGRA_PIN_##_io, \
110 .lock = TEGRA_PIN_LOCK_DEFAULT, \
111 .od = TEGRA_PIN_OD_DEFAULT, \
112 .ioreset = TEGRA_PIN_IO_RESET_DEFAULT, \
113 }
114
115#define I2C_PINMUX(_pingroup, _mux, _pupd, _tri, _io, _lock, _od) \
116 { \
117 .pingroup = TEGRA_PINGROUP_##_pingroup, \
118 .func = TEGRA_MUX_##_mux, \
119 .pupd = TEGRA_PUPD_##_pupd, \
120 .tristate = TEGRA_TRI_##_tri, \
121 .io = TEGRA_PIN_##_io, \
122 .lock = TEGRA_PIN_LOCK_##_lock, \
123 .od = TEGRA_PIN_OD_##_od, \
124 .ioreset = TEGRA_PIN_IO_RESET_DEFAULT, \
125 }
126
127#define VI_PINMUX(_pingroup, _mux, _pupd, _tri, _io, _lock, _ioreset) \
128 { \
129 .pingroup = TEGRA_PINGROUP_##_pingroup, \
130 .func = TEGRA_MUX_##_mux, \
131 .pupd = TEGRA_PUPD_##_pupd, \
132 .tristate = TEGRA_TRI_##_tri, \
133 .io = TEGRA_PIN_##_io, \
134 .lock = TEGRA_PIN_LOCK_##_lock, \
135 .od = TEGRA_PIN_OD_DEFAULT, \
136 .ioreset = TEGRA_PIN_IO_RESET_##_ioreset \
137 }
138
139static __initdata struct tegra_pingroup_config kai_pinmux_common[] = {
140 /* SDMMC1 pinmux */
141 DEFAULT_PINMUX(SDMMC1_CLK, SDMMC1, NORMAL, NORMAL, INPUT),
142 DEFAULT_PINMUX(SDMMC1_CMD, SDMMC1, PULL_UP, NORMAL, INPUT),
143 DEFAULT_PINMUX(SDMMC1_DAT3, SDMMC1, PULL_UP, NORMAL, INPUT),
144 DEFAULT_PINMUX(SDMMC1_DAT2, SDMMC1, PULL_UP, NORMAL, INPUT),
145 DEFAULT_PINMUX(SDMMC1_DAT1, SDMMC1, PULL_UP, NORMAL, INPUT),
146 DEFAULT_PINMUX(SDMMC1_DAT0, SDMMC1, PULL_UP, NORMAL, INPUT),
147
148 /* SDMMC3 pinmux */
149 DEFAULT_PINMUX(SDMMC3_CLK, SDMMC3, NORMAL, NORMAL, INPUT),
150 DEFAULT_PINMUX(SDMMC3_CMD, SDMMC3, PULL_UP, NORMAL, INPUT),
151 DEFAULT_PINMUX(SDMMC3_DAT0, SDMMC3, PULL_UP, NORMAL, INPUT),
152 DEFAULT_PINMUX(SDMMC3_DAT1, SDMMC3, PULL_UP, NORMAL, INPUT),
153 DEFAULT_PINMUX(SDMMC3_DAT2, SDMMC3, PULL_UP, NORMAL, INPUT),
154 DEFAULT_PINMUX(SDMMC3_DAT3, SDMMC3, PULL_UP, NORMAL, INPUT),
155 DEFAULT_PINMUX(SDMMC3_DAT6, SDMMC3, PULL_UP, NORMAL, INPUT),
156 DEFAULT_PINMUX(SDMMC3_DAT7, SDMMC3, PULL_UP, NORMAL, INPUT),
157
158 /* SDMMC4 pinmux */
159 DEFAULT_PINMUX(SDMMC4_CLK, SDMMC4, NORMAL, NORMAL, INPUT),
160 DEFAULT_PINMUX(SDMMC4_CMD, SDMMC4, PULL_UP, NORMAL, INPUT),
161 DEFAULT_PINMUX(SDMMC4_DAT0, SDMMC4, PULL_UP, NORMAL, INPUT),
162 DEFAULT_PINMUX(SDMMC4_DAT1, SDMMC4, PULL_UP, NORMAL, INPUT),
163 DEFAULT_PINMUX(SDMMC4_DAT2, SDMMC4, PULL_UP, NORMAL, INPUT),
164 DEFAULT_PINMUX(SDMMC4_DAT3, SDMMC4, PULL_UP, NORMAL, INPUT),
165 DEFAULT_PINMUX(SDMMC4_DAT4, SDMMC4, PULL_UP, NORMAL, INPUT),
166 DEFAULT_PINMUX(SDMMC4_DAT5, SDMMC4, PULL_UP, NORMAL, INPUT),
167 DEFAULT_PINMUX(SDMMC4_DAT6, SDMMC4, PULL_UP, NORMAL, INPUT),
168 DEFAULT_PINMUX(SDMMC4_DAT7, SDMMC4, PULL_UP, NORMAL, INPUT),
169 DEFAULT_PINMUX(SDMMC4_RST_N, RSVD1, PULL_DOWN, NORMAL, INPUT),
170
171 /* I2C1 pinmux */
172 I2C_PINMUX(GEN1_I2C_SCL, I2C1, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
173 I2C_PINMUX(GEN1_I2C_SDA, I2C1, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
174
175 /* I2C2 pinmux */
176 I2C_PINMUX(GEN2_I2C_SCL, I2C2, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
177 I2C_PINMUX(GEN2_I2C_SDA, I2C2, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
178
179 /* I2C3 pinmux */
180 I2C_PINMUX(CAM_I2C_SCL, I2C3, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
181 I2C_PINMUX(CAM_I2C_SDA, I2C3, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
182
183 /* I2C4 pinmux */
184 I2C_PINMUX(DDC_SCL, I2C4, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
185 I2C_PINMUX(DDC_SDA, I2C4, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
186
187 /* Power I2C pinmux */
188 I2C_PINMUX(PWR_I2C_SCL, I2CPWR, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
189 I2C_PINMUX(PWR_I2C_SDA, I2CPWR, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
190
191 /* LCD */
192 DEFAULT_PINMUX(LCD_PCLK, DISPLAYA, NORMAL, NORMAL, INPUT),
193 DEFAULT_PINMUX(LCD_DE, DISPLAYA, NORMAL, NORMAL, INPUT),
194 DEFAULT_PINMUX(LCD_HSYNC, DISPLAYA, NORMAL, NORMAL, INPUT),
195 DEFAULT_PINMUX(LCD_VSYNC, DISPLAYA, NORMAL, NORMAL, INPUT),
196 DEFAULT_PINMUX(LCD_D0, DISPLAYA, NORMAL, NORMAL, INPUT),
197 DEFAULT_PINMUX(LCD_D1, DISPLAYA, NORMAL, NORMAL, INPUT),
198 DEFAULT_PINMUX(LCD_D2, DISPLAYA, NORMAL, NORMAL, INPUT),
199 DEFAULT_PINMUX(LCD_D3, DISPLAYA, NORMAL, NORMAL, INPUT),
200 DEFAULT_PINMUX(LCD_D4, DISPLAYA, NORMAL, NORMAL, INPUT),
201 DEFAULT_PINMUX(LCD_D5, DISPLAYA, NORMAL, NORMAL, INPUT),
202 DEFAULT_PINMUX(LCD_D6, DISPLAYA, NORMAL, NORMAL, INPUT),
203 DEFAULT_PINMUX(LCD_D7, DISPLAYA, NORMAL, NORMAL, INPUT),
204 DEFAULT_PINMUX(LCD_D8, DISPLAYA, NORMAL, NORMAL, INPUT),
205 DEFAULT_PINMUX(LCD_D9, DISPLAYA, NORMAL, NORMAL, INPUT),
206 DEFAULT_PINMUX(LCD_D10, DISPLAYA, NORMAL, NORMAL, INPUT),
207 DEFAULT_PINMUX(LCD_D11, DISPLAYA, NORMAL, NORMAL, INPUT),
208 DEFAULT_PINMUX(LCD_D12, DISPLAYA, NORMAL, NORMAL, INPUT),
209 DEFAULT_PINMUX(LCD_D13, DISPLAYA, NORMAL, NORMAL, INPUT),
210 DEFAULT_PINMUX(LCD_D14, DISPLAYA, NORMAL, NORMAL, INPUT),
211 DEFAULT_PINMUX(LCD_D15, DISPLAYA, NORMAL, NORMAL, INPUT),
212 DEFAULT_PINMUX(LCD_D16, DISPLAYA, NORMAL, NORMAL, INPUT),
213 DEFAULT_PINMUX(LCD_D17, DISPLAYA, NORMAL, NORMAL, INPUT),
214 DEFAULT_PINMUX(LCD_D18, DISPLAYA, NORMAL, NORMAL, INPUT),
215 DEFAULT_PINMUX(LCD_D19, DISPLAYA, NORMAL, NORMAL, INPUT),
216 DEFAULT_PINMUX(LCD_D20, DISPLAYA, NORMAL, NORMAL, INPUT),
217 DEFAULT_PINMUX(LCD_D21, DISPLAYA, NORMAL, NORMAL, INPUT),
218 DEFAULT_PINMUX(LCD_D22, DISPLAYA, NORMAL, NORMAL, INPUT),
219 DEFAULT_PINMUX(LCD_D23, DISPLAYA, NORMAL, NORMAL, INPUT),
220
221 /* UART B : GPS */
222 DEFAULT_PINMUX(UART2_RXD, IRDA, NORMAL, NORMAL, INPUT),
223 DEFAULT_PINMUX(UART2_TXD, IRDA, NORMAL, NORMAL, OUTPUT),
224 DEFAULT_PINMUX(UART2_RTS_N, UARTB, NORMAL, NORMAL, OUTPUT),
225 DEFAULT_PINMUX(UART2_CTS_N, UARTB, NORMAL, NORMAL, INPUT),
226
227 /*UART C : BT */
228 DEFAULT_PINMUX(UART3_TXD, UARTC, NORMAL, NORMAL, OUTPUT),
229 DEFAULT_PINMUX(UART3_RXD, UARTC, NORMAL, NORMAL, INPUT),
230 DEFAULT_PINMUX(UART3_CTS_N, UARTC, NORMAL, NORMAL, INPUT),
231 DEFAULT_PINMUX(UART3_RTS_N, UARTC, NORMAL, NORMAL, OUTPUT),
232
233 /* UART D : DEBUG */
234 DEFAULT_PINMUX(GMI_A16, UARTD, NORMAL, NORMAL, OUTPUT),
235 DEFAULT_PINMUX(GMI_A17, UARTD, NORMAL, NORMAL, INPUT),
236 DEFAULT_PINMUX(GMI_A18, UARTD, NORMAL, NORMAL, INPUT),
237 DEFAULT_PINMUX(GMI_A19, UARTD, NORMAL, NORMAL, OUTPUT),
238
239 /* KBC keys */
240 DEFAULT_PINMUX(KB_COL0, KBC, PULL_UP, NORMAL, INPUT),
241 DEFAULT_PINMUX(KB_COL1, KBC, PULL_UP, NORMAL, INPUT),
242 DEFAULT_PINMUX(KB_COL2, KBC, PULL_UP, NORMAL, INPUT),
243 DEFAULT_PINMUX(KB_COL3, KBC, PULL_UP, NORMAL, INPUT),
244 DEFAULT_PINMUX(KB_ROW0, KBC, PULL_UP, NORMAL, INPUT),
245 DEFAULT_PINMUX(KB_ROW1, KBC, PULL_UP, NORMAL, INPUT),
246 DEFAULT_PINMUX(KB_ROW2, KBC, PULL_UP, NORMAL, INPUT),
247
248 /* I2S0 : for MODEM */
249 DEFAULT_PINMUX(DAP1_FS, I2S0, NORMAL, NORMAL, INPUT),
250 DEFAULT_PINMUX(DAP1_DIN, I2S0, NORMAL, NORMAL, INPUT),
251 DEFAULT_PINMUX(DAP1_DOUT, I2S0, NORMAL, NORMAL, INPUT),
252 DEFAULT_PINMUX(DAP1_SCLK, I2S0, NORMAL, NORMAL, INPUT),
253
254 /* I2S1 : for CODEC */
255 DEFAULT_PINMUX(DAP2_FS, I2S1, NORMAL, NORMAL, INPUT),
256 DEFAULT_PINMUX(DAP2_DIN, I2S1, NORMAL, NORMAL, INPUT),
257 DEFAULT_PINMUX(DAP2_DOUT, I2S1, NORMAL, NORMAL, INPUT),
258 DEFAULT_PINMUX(DAP2_SCLK, I2S1, NORMAL, NORMAL, INPUT),
259
260 /* I2S3 : for BT */
261 DEFAULT_PINMUX(DAP4_FS, I2S3, NORMAL, NORMAL, INPUT),
262 DEFAULT_PINMUX(DAP4_DIN, I2S3, NORMAL, NORMAL, INPUT),
263 DEFAULT_PINMUX(DAP4_DOUT, I2S3, NORMAL, NORMAL, INPUT),
264 DEFAULT_PINMUX(DAP4_SCLK, I2S3, NORMAL, NORMAL, INPUT),
265
266 /* SPI1 : touch */
267 DEFAULT_PINMUX(SPI1_MOSI, SPI1, NORMAL, NORMAL, INPUT),
268 DEFAULT_PINMUX(SPI1_SCK, SPI1, NORMAL, NORMAL, INPUT),
269 DEFAULT_PINMUX(SPI1_CS0_N, SPI1, NORMAL, NORMAL, INPUT),
270 DEFAULT_PINMUX(SPI1_MISO, SPI1, NORMAL, NORMAL, INPUT),
271
272 /* SPIDIF */
273 DEFAULT_PINMUX(SPDIF_IN, SPDIF, NORMAL, NORMAL, INPUT),
274 DEFAULT_PINMUX(SPDIF_OUT, SPDIF, NORMAL, NORMAL, OUTPUT),
275
276 /* FIXED FUNCTION AND CONFIGURATION */
277 DEFAULT_PINMUX(CLK_32K_OUT, BLINK, NORMAL, NORMAL, OUTPUT),
278 DEFAULT_PINMUX(SYS_CLK_REQ, SYSCLK, NORMAL, NORMAL, OUTPUT),
279 DEFAULT_PINMUX(OWR, OWR, NORMAL, NORMAL, INPUT),
280 DEFAULT_PINMUX(GMI_AD4, RSVD1, NORMAL, NORMAL, INPUT),
281 DEFAULT_PINMUX(CLK1_OUT, EXTPERIPH1, NORMAL, NORMAL, INPUT),
282 DEFAULT_PINMUX(CLK2_OUT, EXTPERIPH2, NORMAL, NORMAL, INPUT),
283 DEFAULT_PINMUX(CLK3_OUT, EXTPERIPH3, NORMAL, NORMAL, OUTPUT),
284 DEFAULT_PINMUX(CLK2_REQ, DAP, NORMAL, NORMAL, INPUT),
285 DEFAULT_PINMUX(HDMI_INT, RSVD0, NORMAL, TRISTATE, INPUT),
286
287 /* GPIO */
288 /* POWER RAIL GPIO */
289 DEFAULT_PINMUX(DAP3_FS, I2S2, NORMAL, NORMAL, OUTPUT),
290 DEFAULT_PINMUX(GMI_AD14, RSVD1, PULL_DOWN, NORMAL, OUTPUT),
291 DEFAULT_PINMUX(SDMMC3_DAT5, SDMMC3, NORMAL, NORMAL, OUTPUT),
292 DEFAULT_PINMUX(KB_ROW6, KBC, NORMAL, NORMAL, OUTPUT),
293 DEFAULT_PINMUX(KB_ROW7, KBC, NORMAL, NORMAL, OUTPUT),
294 DEFAULT_PINMUX(LCD_M1, DISPLAYA, NORMAL, NORMAL, OUTPUT),
295 DEFAULT_PINMUX(LCD_PWR0, DISPLAYA, NORMAL, NORMAL, OUTPUT),
296 DEFAULT_PINMUX(LCD_PWR1, DISPLAYA, NORMAL, NORMAL, OUTPUT),
297 DEFAULT_PINMUX(LCD_PWR2, DISPLAYA, NORMAL, NORMAL, OUTPUT),
298 DEFAULT_PINMUX(KB_ROW8, KBC, NORMAL, NORMAL, OUTPUT),
299
300 /* CAMERA */
301 DEFAULT_PINMUX(CAM_MCLK, VI_ALT2, PULL_UP, NORMAL, INPUT),
302 DEFAULT_PINMUX(GPIO_PCC1, RSVD1, NORMAL, NORMAL, INPUT),
303 DEFAULT_PINMUX(GPIO_PBB0, RSVD1, NORMAL, NORMAL, INPUT),
304 DEFAULT_PINMUX(GPIO_PBB3, VGP3, NORMAL, NORMAL, INPUT),
305 DEFAULT_PINMUX(GPIO_PBB5, VGP5, NORMAL, NORMAL, INPUT),
306 DEFAULT_PINMUX(GPIO_PBB6, VGP6, NORMAL, NORMAL, INPUT),
307 DEFAULT_PINMUX(GPIO_PBB7, I2S4, NORMAL, NORMAL, INPUT),
308 DEFAULT_PINMUX(GPIO_PCC2, I2S4, NORMAL, NORMAL, INPUT),
309 DEFAULT_PINMUX(KB_ROW4, KBC, NORMAL, NORMAL, OUTPUT),
310 DEFAULT_PINMUX(KB_ROW5, KBC, NORMAL, NORMAL, OUTPUT),
311 DEFAULT_PINMUX(KB_ROW9, KBC, NORMAL, NORMAL, OUTPUT),
312 DEFAULT_PINMUX(KB_ROW10, KBC, NORMAL, NORMAL, OUTPUT),
313
314 /* MODEM */
315 DEFAULT_PINMUX(GPIO_PV0, RSVD, NORMAL, NORMAL, INPUT),
316 DEFAULT_PINMUX(GPIO_PV1, RSVD, NORMAL, NORMAL, INPUT),
317
318 /* GPS and BT */
319 DEFAULT_PINMUX(GPIO_PU0, RSVD1, NORMAL, NORMAL, INPUT),
320 DEFAULT_PINMUX(GPIO_PU1, RSVD1, NORMAL, NORMAL, OUTPUT),
321 DEFAULT_PINMUX(GPIO_PU2, RSVD1, NORMAL, NORMAL, INPUT),
322 DEFAULT_PINMUX(GPIO_PU3, RSVD1, NORMAL, NORMAL, INPUT),
323 DEFAULT_PINMUX(GPIO_PU4, PWM1, NORMAL, NORMAL, OUTPUT),
324 DEFAULT_PINMUX(GPIO_PU5, PWM2, NORMAL, NORMAL, INPUT),
325 DEFAULT_PINMUX(GPIO_PU6, RSVD1, NORMAL, NORMAL, INPUT),
326 DEFAULT_PINMUX(KB_ROW14, KBC, NORMAL, TRISTATE, OUTPUT),
327
328 /* LCD GPIO */
329 DEFAULT_PINMUX(GMI_AD0, RSVD1, NORMAL, NORMAL, OUTPUT),
330 DEFAULT_PINMUX(GMI_AD1, RSVD1, NORMAL, NORMAL, OUTPUT),
331 DEFAULT_PINMUX(GMI_AD2, RSVD1, PULL_DOWN, NORMAL, OUTPUT),
332 DEFAULT_PINMUX(GMI_AD3, RSVD1, PULL_DOWN, NORMAL, OUTPUT),
333 DEFAULT_PINMUX(GMI_AD5, RSVD1, PULL_DOWN, NORMAL, OUTPUT),
334 DEFAULT_PINMUX(GMI_AD6, RSVD1, PULL_DOWN, NORMAL, OUTPUT),
335 DEFAULT_PINMUX(GMI_AD7, RSVD1, PULL_DOWN, NORMAL, OUTPUT),
336 DEFAULT_PINMUX(GMI_AD8, PWM0, NORMAL, NORMAL, OUTPUT),
337 DEFAULT_PINMUX(GMI_AD9, RSVD2, PULL_DOWN, NORMAL, OUTPUT),
338 DEFAULT_PINMUX(GMI_AD11, PWM3, NORMAL, NORMAL, OUTPUT),
339
340 /* TOUCH */
341 DEFAULT_PINMUX(GMI_WAIT, RSVD1, PULL_UP, NORMAL, INPUT),
342 DEFAULT_PINMUX(GMI_WP_N, RSVD1, PULL_UP, NORMAL, INPUT),
343 DEFAULT_PINMUX(LCD_SDOUT, DISPLAYA, NORMAL, NORMAL, INPUT),
344 DEFAULT_PINMUX(LCD_DC1, DISPLAYA, NORMAL, NORMAL, INPUT),
345 DEFAULT_PINMUX(LCD_WR_N, DISPLAYA, PULL_UP, NORMAL, INPUT),
346
347 /* SDMMC */
348 DEFAULT_PINMUX(GMI_IORDY, RSVD1, PULL_UP, NORMAL, INPUT),
349
350 /* CODEC */
351 DEFAULT_PINMUX(SPI2_SCK, SPI2, NORMAL, NORMAL, OUTPUT),
352 DEFAULT_PINMUX(SPI2_CS1_N, SPI2, NORMAL, NORMAL, INPUT),
353 DEFAULT_PINMUX(GMI_CS2_N, RSVD1, NORMAL, NORMAL, INPUT),
354 DEFAULT_PINMUX(GMI_CS3_N, RSVD1, NORMAL, NORMAL, INPUT),
355
356 /* OTHERS */
357 DEFAULT_PINMUX(KB_ROW3, KBC, NORMAL, NORMAL, OUTPUT),
358 DEFAULT_PINMUX(GMI_DQS, RSVD1, NORMAL, NORMAL, INPUT),
359
360 DEFAULT_PINMUX(GMI_AD15, RSVD1, PULL_UP, NORMAL, OUTPUT),
361 DEFAULT_PINMUX(GMI_CLK, RSVD1, PULL_UP, NORMAL, INPUT),
362
363 DEFAULT_PINMUX(GMI_RST_N, NAND, PULL_UP, NORMAL, OUTPUT),
364 DEFAULT_PINMUX(LCD_DC0, DISPLAYA, NORMAL, NORMAL, INPUT),
365 DEFAULT_PINMUX(LCD_CS0_N, DISPLAYA, NORMAL, NORMAL, INPUT),
366 DEFAULT_PINMUX(LCD_CS1_N, DISPLAYA, NORMAL, NORMAL, INPUT),
367 DEFAULT_PINMUX(LCD_SCK, DISPLAYA, NORMAL, NORMAL, INPUT),
368 DEFAULT_PINMUX(LCD_SDIN, DISPLAYA, NORMAL, NORMAL, INPUT),
369 DEFAULT_PINMUX(CRT_HSYNC, CRT, NORMAL, NORMAL, OUTPUT),
370 DEFAULT_PINMUX(CRT_VSYNC, CRT, NORMAL, NORMAL, OUTPUT),
371 DEFAULT_PINMUX(PEX_WAKE_N, PCIE, NORMAL, NORMAL, INPUT),
372 DEFAULT_PINMUX(PEX_L2_PRSNT_N, PCIE, NORMAL, NORMAL, INPUT),
373 DEFAULT_PINMUX(PEX_L2_RST_N, PCIE, NORMAL, NORMAL, OUTPUT),
374 DEFAULT_PINMUX(PEX_L2_CLKREQ_N, PCIE, NORMAL, NORMAL, OUTPUT),
375 DEFAULT_PINMUX(HDMI_CEC, CEC, NORMAL, NORMAL, INPUT),
376
377 DEFAULT_PINMUX(KB_ROW15, KBC, NORMAL, NORMAL, OUTPUT),
378 DEFAULT_PINMUX(SPI2_CS2_N, SPI2, NORMAL, NORMAL, INPUT),
379 DEFAULT_PINMUX(SPI2_MISO, SPI2, NORMAL, NORMAL, INPUT),
380 DEFAULT_PINMUX(SPI2_MOSI, SPI2, NORMAL, NORMAL, INPUT),
381
382 DEFAULT_PINMUX(KB_ROW11, KBC, NORMAL, NORMAL, OUTPUT),
383 DEFAULT_PINMUX(KB_ROW12, KBC, NORMAL, TRISTATE, OUTPUT),
384 DEFAULT_PINMUX(KB_ROW13, KBC, NORMAL, TRISTATE, OUTPUT),
385};
386
387/*Do not use for now*/
388static __initdata struct tegra_pingroup_config unused_pins_lowpower[] = {
389 DEFAULT_PINMUX(ULPI_CLK, ULPI, NORMAL, TRISTATE, OUTPUT),
390 DEFAULT_PINMUX(ULPI_DATA0, ULPI, NORMAL, TRISTATE, OUTPUT),
391 DEFAULT_PINMUX(ULPI_DATA1, ULPI, NORMAL, TRISTATE, OUTPUT),
392 DEFAULT_PINMUX(ULPI_DATA2, ULPI, NORMAL, TRISTATE, OUTPUT),
393 DEFAULT_PINMUX(ULPI_DATA3, ULPI, NORMAL, TRISTATE, OUTPUT),
394 DEFAULT_PINMUX(ULPI_DATA4, ULPI, NORMAL, TRISTATE, OUTPUT),
395 DEFAULT_PINMUX(ULPI_DATA5, ULPI, NORMAL, TRISTATE, OUTPUT),
396 DEFAULT_PINMUX(ULPI_DATA6, ULPI, NORMAL, TRISTATE, OUTPUT),
397 DEFAULT_PINMUX(ULPI_DATA7, ULPI, NORMAL, TRISTATE, OUTPUT),
398 DEFAULT_PINMUX(ULPI_DIR, ULPI, NORMAL, TRISTATE, OUTPUT),
399 DEFAULT_PINMUX(ULPI_NXT, ULPI, NORMAL, TRISTATE, OUTPUT),
400 DEFAULT_PINMUX(ULPI_STP, ULPI, NORMAL, TRISTATE, OUTPUT),
401
402 DEFAULT_PINMUX(GMI_AD10, PWM2, NORMAL, TRISTATE, OUTPUT),
403 DEFAULT_PINMUX(GMI_AD12, RSVD1, NORMAL, TRISTATE, INPUT),
404 DEFAULT_PINMUX(GMI_AD13, RSVD1, NORMAL, TRISTATE, OUTPUT),
405 DEFAULT_PINMUX(CLK1_REQ, DAP, NORMAL, TRISTATE, OUTPUT),
406 DEFAULT_PINMUX(GMI_ADV_N, RSVD1, NORMAL, TRISTATE, OUTPUT),
407 DEFAULT_PINMUX(GMI_CS0_N, RSVD1, NORMAL, TRISTATE, OUTPUT),
408 DEFAULT_PINMUX(GMI_CS1_N, RSVD1, NORMAL, TRISTATE, OUTPUT),
409 DEFAULT_PINMUX(GMI_CS4_N, RSVD1, NORMAL, TRISTATE, OUTPUT),
410 DEFAULT_PINMUX(GMI_CS6_N, NAND, NORMAL, TRISTATE, OUTPUT),
411 DEFAULT_PINMUX(GMI_CS7_N, NAND, NORMAL, TRISTATE, OUTPUT),
412 DEFAULT_PINMUX(GMI_OE_N, RSVD1, NORMAL, TRISTATE, OUTPUT),
413 DEFAULT_PINMUX(GMI_WR_N, RSVD1, NORMAL, TRISTATE, OUTPUT),
414 DEFAULT_PINMUX(PEX_L0_CLKREQ_N, PCIE, NORMAL, TRISTATE, OUTPUT),
415 DEFAULT_PINMUX(PEX_L0_PRSNT_N, PCIE, NORMAL, TRISTATE, OUTPUT),
416 DEFAULT_PINMUX(PEX_L0_RST_N, PCIE, NORMAL, TRISTATE, OUTPUT),
417 DEFAULT_PINMUX(PEX_L1_CLKREQ_N, PCIE, NORMAL, TRISTATE, OUTPUT),
418 DEFAULT_PINMUX(PEX_L1_PRSNT_N, PCIE, NORMAL, TRISTATE, OUTPUT),
419 DEFAULT_PINMUX(PEX_L1_RST_N, PCIE, NORMAL, TRISTATE, OUTPUT),
420 DEFAULT_PINMUX(GPIO_PV2, OWR, NORMAL, TRISTATE, OUTPUT),
421 DEFAULT_PINMUX(GPIO_PV3, RSVD1, NORMAL, TRISTATE, OUTPUT),
422 DEFAULT_PINMUX(HDMI_CEC, CEC, NORMAL, TRISTATE, OUTPUT),
423 DEFAULT_PINMUX(KB_COL4, KBC, NORMAL, TRISTATE, OUTPUT),
424 DEFAULT_PINMUX(KB_COL5, KBC, NORMAL, TRISTATE, OUTPUT),
425 DEFAULT_PINMUX(KB_COL6, KBC, NORMAL, TRISTATE, OUTPUT),
426 DEFAULT_PINMUX(KB_COL7, KBC, NORMAL, TRISTATE, OUTPUT),
427 DEFAULT_PINMUX(CLK3_REQ, DEV3, NORMAL, TRISTATE, OUTPUT),
428 DEFAULT_PINMUX(VI_D0, VI, NORMAL, TRISTATE, OUTPUT),
429 DEFAULT_PINMUX(VI_D1, VI, NORMAL, TRISTATE, OUTPUT),
430 DEFAULT_PINMUX(VI_D10, VI, NORMAL, TRISTATE, OUTPUT),
431 DEFAULT_PINMUX(VI_D11, VI, NORMAL, TRISTATE, OUTPUT),
432 DEFAULT_PINMUX(VI_D2, VI, NORMAL, TRISTATE, OUTPUT),
433 DEFAULT_PINMUX(VI_D3, VI, NORMAL, TRISTATE, OUTPUT),
434 DEFAULT_PINMUX(VI_D4, VI, NORMAL, TRISTATE, OUTPUT),
435 DEFAULT_PINMUX(VI_D5, VI, NORMAL, TRISTATE, OUTPUT),
436 DEFAULT_PINMUX(VI_D6, VI, NORMAL, TRISTATE, OUTPUT),
437 DEFAULT_PINMUX(VI_D7, VI, NORMAL, TRISTATE, OUTPUT),
438 DEFAULT_PINMUX(VI_D8, VI, NORMAL, TRISTATE, OUTPUT),
439 DEFAULT_PINMUX(VI_D9, VI, NORMAL, TRISTATE, OUTPUT),
440 DEFAULT_PINMUX(VI_HSYNC, VI, NORMAL, TRISTATE, OUTPUT),
441 DEFAULT_PINMUX(VI_MCLK, VI, NORMAL, TRISTATE, OUTPUT),
442 DEFAULT_PINMUX(VI_PCLK, VI, NORMAL, TRISTATE, OUTPUT),
443 DEFAULT_PINMUX(VI_VSYNC, VI, NORMAL, TRISTATE, OUTPUT),
444 DEFAULT_PINMUX(DAP3_DIN, I2S2, NORMAL, TRISTATE, OUTPUT),
445 DEFAULT_PINMUX(DAP3_DOUT, I2S2, NORMAL, TRISTATE, OUTPUT),
446 DEFAULT_PINMUX(DAP3_SCLK, I2S2, NORMAL, TRISTATE, OUTPUT),
447
448};
449
450static void __init kai_pinmux_audio_init(void)
451{
452 tegra_gpio_enable(TEGRA_GPIO_CDC_IRQ);
453 gpio_request(TEGRA_GPIO_CDC_IRQ, "rt5640");
454 gpio_direction_input(TEGRA_GPIO_CDC_IRQ);
455
456 tegra_gpio_enable(TEGRA_GPIO_HP_DET);
457 tegra_gpio_enable(TEGRA_GPIO_INT_MIC_EN);
458 tegra_gpio_enable(TEGRA_GPIO_EXT_MIC_EN);
459}
460
461/* We are disabling this code for now. */
462#define GPIO_INIT_PIN_MODE(_gpio, _is_input, _value) \
463 { \
464 .gpio_nr = _gpio, \
465 .is_input = _is_input, \
466 .value = _value, \
467 }
468
469static struct gpio_init_pin_info init_gpio_mode_kai_common[] = {
470 GPIO_INIT_PIN_MODE(TEGRA_GPIO_PDD7, false, 0),
471 GPIO_INIT_PIN_MODE(TEGRA_GPIO_PCC6, false, 0),
472};
473
474static void __init kai_gpio_init_configure(void)
475{
476 int len;
477 int i;
478 struct gpio_init_pin_info *pins_info;
479
480 len = ARRAY_SIZE(init_gpio_mode_kai_common);
481 pins_info = init_gpio_mode_kai_common;
482
483 for (i = 0; i < len; ++i) {
484 tegra_gpio_init_configure(pins_info->gpio_nr,
485 pins_info->is_input, pins_info->value);
486 pins_info++;
487 }
488}
489
490int __init kai_pinmux_init(void)
491{
492 struct board_info board_info;
493 tegra_get_board_info(&board_info);
494 BUG_ON(board_info.board_id != BOARD_E1565);
495 kai_gpio_init_configure();
496
497 tegra_pinmux_config_table(kai_pinmux_common, ARRAY_SIZE(kai_pinmux_common));
498 tegra_drive_pinmux_config_table(kai_drive_pinmux,
499 ARRAY_SIZE(kai_drive_pinmux));
500
501 tegra_pinmux_config_table(unused_pins_lowpower,
502 ARRAY_SIZE(unused_pins_lowpower));
503 kai_pinmux_audio_init();
504
505 return 0;
506}
507
508#define PIN_GPIO_LPM(_name, _gpio, _is_input, _value) \
509 { \
510 .name = _name, \
511 .gpio_nr = _gpio, \
512 .is_gpio = true, \
513 .is_input = _is_input, \
514 .value = _value, \
515 }
516
517struct gpio_init_pin_info pin_lpm_kai_common[] = {
518 PIN_GPIO_LPM("GMI_CS4_N", TEGRA_GPIO_PK2, 1, 0),
519 PIN_GPIO_LPM("GMI_CS7", TEGRA_GPIO_PI6, 1, 0),
520 PIN_GPIO_LPM("GMI_CS0", TEGRA_GPIO_PJ0, 1, 0),
521 PIN_GPIO_LPM("GMI_CS1", TEGRA_GPIO_PJ2, 1, 0),
522};
523
524static void set_unused_pin_gpio(struct gpio_init_pin_info *lpm_pin_info,
525 int list_count)
526{
527 int i;
528 struct gpio_init_pin_info *pin_info;
529 int ret;
530
531 for (i = 0; i < list_count; ++i) {
532 pin_info = (struct gpio_init_pin_info *)(lpm_pin_info + i);
533 if (!pin_info->is_gpio)
534 continue;
535
536 ret = gpio_request(pin_info->gpio_nr, pin_info->name);
537 if (ret < 0) {
538 pr_err("%s() Error in gpio_request() for gpio %d\n",
539 __func__, pin_info->gpio_nr);
540 continue;
541 }
542 if (pin_info->is_input)
543 ret = gpio_direction_input(pin_info->gpio_nr);
544 else
545 ret = gpio_direction_output(pin_info->gpio_nr,
546 pin_info->value);
547 if (ret < 0) {
548 pr_err("%s() Error in setting gpio %d to in/out\n",
549 __func__, pin_info->gpio_nr);
550 gpio_free(pin_info->gpio_nr);
551 continue;
552 }
553 tegra_gpio_enable(pin_info->gpio_nr);
554 }
555}
556
557/* Initialize the pins to desired state as per power/asic/system-eng
558 * recomendation */
559int __init kai_pins_state_init(void)
560{
561 set_unused_pin_gpio(&pin_lpm_kai_common[0],
562 ARRAY_SIZE(pin_lpm_kai_common));
563
564 return 0;
565}
generated by cgit v1.2.2 (git 2.25.0) at 2025-03-20 14:55:44 -0400