aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-tegra/board-enterprise.c
diff options
context:
space:
mode:
Diffstat (limited to 'arch/arm/mach-tegra/board-enterprise.c')
-rw-r--r--arch/arm/mach-tegra/board-enterprise.c1005
1 files changed, 1005 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/board-enterprise.c b/arch/arm/mach-tegra/board-enterprise.c
new file mode 100644
index 00000000000..62d58a3bcbd
--- /dev/null
+++ b/arch/arm/mach-tegra/board-enterprise.c
@@ -0,0 +1,1005 @@
1/*
2 * arch/arm/mach-tegra/board-enterprise.c
3 *
4 * Copyright (c) 2011-2012, NVIDIA Corporation.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
19 */
20
21#include <linux/kernel.h>
22#include <linux/init.h>
23#include <linux/slab.h>
24#include <linux/ctype.h>
25#include <linux/platform_device.h>
26#include <linux/clk.h>
27#include <linux/serial_8250.h>
28#include <linux/i2c.h>
29#include <linux/dma-mapping.h>
30#include <linux/delay.h>
31#include <linux/i2c-tegra.h>
32#include <linux/gpio.h>
33#include <linux/input.h>
34#include <linux/platform_data/tegra_usb.h>
35#include <linux/spi/spi.h>
36#include <linux/tegra_uart.h>
37#include <linux/fsl_devices.h>
38#include <linux/i2c/atmel_mxt_ts.h>
39#include <linux/memblock.h>
40
41#include <linux/nfc/pn544.h>
42#include <sound/max98088.h>
43
44#include <mach/clk.h>
45#include <mach/iomap.h>
46#include <mach/irqs.h>
47#include <mach/pinmux.h>
48#include <mach/iomap.h>
49#include <mach/io.h>
50#include <asm/mach-types.h>
51#include <asm/mach/arch.h>
52#include <mach/usb_phy.h>
53#include <mach/i2s.h>
54#include <mach/tegra_asoc_pdata.h>
55#include <mach/thermal.h>
56#include <mach/tegra-bb-power.h>
57#include "board.h"
58#include "clock.h"
59#include "board-enterprise.h"
60#include "baseband-xmm-power.h"
61#include "devices.h"
62#include "gpio-names.h"
63#include "fuse.h"
64#include "pm.h"
65
66/* All units are in millicelsius */
67static struct tegra_thermal_data thermal_data = {
68 .temp_throttle = 85000,
69 .temp_shutdown = 90000,
70 .temp_offset = TDIODE_OFFSET, /* temps based on tdiode */
71#ifdef CONFIG_TEGRA_EDP_LIMITS
72 .edp_offset = TDIODE_OFFSET, /* edp based on tdiode */
73 .hysteresis_edp = 3000,
74#endif
75#ifdef CONFIG_TEGRA_THERMAL_SYSFS
76 .tc1 = 0,
77 .tc2 = 1,
78 .passive_delay = 2000,
79#else
80 .hysteresis_throttle = 1000,
81#endif
82};
83
84/* !!!TODO: Change for enterprise (Taken from Cardhu) */
85static struct tegra_utmip_config utmi_phy_config[] = {
86 [0] = {
87 .hssync_start_delay = 0,
88 .idle_wait_delay = 17,
89 .elastic_limit = 16,
90 .term_range_adj = 6,
91 .xcvr_setup = 15,
92 .xcvr_setup_offset = 0,
93 .xcvr_use_fuses = 1,
94 .xcvr_lsfslew = 2,
95 .xcvr_lsrslew = 2,
96 },
97 [1] = {
98 .hssync_start_delay = 0,
99 .idle_wait_delay = 17,
100 .elastic_limit = 16,
101 .term_range_adj = 6,
102 .xcvr_setup = 15,
103 .xcvr_setup_offset = 0,
104 .xcvr_use_fuses = 1,
105 .xcvr_lsfslew = 2,
106 .xcvr_lsrslew = 2,
107 },
108 [2] = {
109 .hssync_start_delay = 0,
110 .idle_wait_delay = 17,
111 .elastic_limit = 16,
112 .term_range_adj = 6,
113 .xcvr_setup = 8,
114 .xcvr_setup_offset = 0,
115 .xcvr_use_fuses = 1,
116 .xcvr_lsfslew = 2,
117 .xcvr_lsrslew = 2,
118 },
119};
120
121static struct resource enterprise_bcm4329_rfkill_resources[] = {
122 {
123 .name = "bcm4329_nshutdown_gpio",
124 .start = TEGRA_GPIO_PE6,
125 .end = TEGRA_GPIO_PE6,
126 .flags = IORESOURCE_IO,
127 },
128};
129
130static struct platform_device enterprise_bcm4329_rfkill_device = {
131 .name = "bcm4329_rfkill",
132 .id = -1,
133 .num_resources = ARRAY_SIZE(enterprise_bcm4329_rfkill_resources),
134 .resource = enterprise_bcm4329_rfkill_resources,
135};
136
137static struct resource enterprise_bluesleep_resources[] = {
138 [0] = {
139 .name = "gpio_host_wake",
140 .start = TEGRA_GPIO_PS2,
141 .end = TEGRA_GPIO_PS2,
142 .flags = IORESOURCE_IO,
143 },
144 [1] = {
145 .name = "gpio_ext_wake",
146 .start = TEGRA_GPIO_PE7,
147 .end = TEGRA_GPIO_PE7,
148 .flags = IORESOURCE_IO,
149 },
150 [2] = {
151 .name = "host_wake",
152 .start = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_PS2),
153 .end = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_PS2),
154 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
155 },
156};
157
158static struct platform_device enterprise_bluesleep_device = {
159 .name = "bluesleep",
160 .id = -1,
161 .num_resources = ARRAY_SIZE(enterprise_bluesleep_resources),
162 .resource = enterprise_bluesleep_resources,
163};
164
165static void __init enterprise_setup_bluesleep(void)
166{
167 platform_device_register(&enterprise_bluesleep_device);
168 tegra_gpio_enable(TEGRA_GPIO_PS2);
169 tegra_gpio_enable(TEGRA_GPIO_PE7);
170 return;
171}
172
173static __initdata struct tegra_clk_init_table enterprise_clk_init_table[] = {
174 /* name parent rate enabled */
175 { "pll_m", NULL, 0, false},
176 { "hda", "pll_p", 108000000, false},
177 { "hda2codec_2x","pll_p", 48000000, false},
178 { "pwm", "clk_32k", 32768, false},
179 { "blink", "clk_32k", 32768, true},
180 { "i2s0", "pll_a_out0", 0, false},
181 { "i2s1", "pll_a_out0", 0, false},
182 { "i2s2", "pll_a_out0", 0, false},
183 { "i2s3", "pll_a_out0", 0, false},
184 { "spdif_out", "pll_a_out0", 0, false},
185 { "d_audio", "clk_m", 12000000, false},
186 { "dam0", "clk_m", 12000000, false},
187 { "dam1", "clk_m", 12000000, false},
188 { "dam2", "clk_m", 12000000, false},
189 { "audio0", "i2s0_sync", 0, false},
190 { "audio1", "i2s1_sync", 0, false},
191 { "audio2", "i2s2_sync", 0, false},
192 { "audio3", "i2s3_sync", 0, false},
193 { "vi", "pll_p", 0, false},
194 { "vi_sensor", "pll_p", 0, false},
195 { NULL, NULL, 0, 0},
196};
197
198static struct tegra_i2c_platform_data enterprise_i2c1_platform_data = {
199 .adapter_nr = 0,
200 .bus_count = 1,
201 .bus_clk_rate = { 100000, 0 },
202 .scl_gpio = {TEGRA_GPIO_PC4, 0},
203 .sda_gpio = {TEGRA_GPIO_PC5, 0},
204 .arb_recovery = arb_lost_recovery,
205};
206
207static struct tegra_i2c_platform_data enterprise_i2c2_platform_data = {
208 .adapter_nr = 1,
209 .bus_count = 1,
210 .bus_clk_rate = { 100000, 0 },
211 .is_clkon_always = true,
212 .scl_gpio = {TEGRA_GPIO_PT5, 0},
213 .sda_gpio = {TEGRA_GPIO_PT6, 0},
214 .arb_recovery = arb_lost_recovery,
215};
216
217static struct tegra_i2c_platform_data enterprise_i2c3_platform_data = {
218 .adapter_nr = 2,
219 .bus_count = 1,
220 .bus_clk_rate = { 271000, 0 },
221 .scl_gpio = {TEGRA_GPIO_PBB1, 0},
222 .sda_gpio = {TEGRA_GPIO_PBB2, 0},
223 .arb_recovery = arb_lost_recovery,
224};
225
226static struct tegra_i2c_platform_data enterprise_i2c4_platform_data = {
227 .adapter_nr = 3,
228 .bus_count = 1,
229 .bus_clk_rate = { 100000, 0 },
230 .scl_gpio = {TEGRA_GPIO_PV4, 0},
231 .sda_gpio = {TEGRA_GPIO_PV5, 0},
232 .arb_recovery = arb_lost_recovery,
233};
234
235static struct tegra_i2c_platform_data enterprise_i2c5_platform_data = {
236 .adapter_nr = 4,
237 .bus_count = 1,
238 .bus_clk_rate = { 100000, 0 },
239 .scl_gpio = {TEGRA_GPIO_PZ6, 0},
240 .sda_gpio = {TEGRA_GPIO_PZ7, 0},
241 .arb_recovery = arb_lost_recovery,
242};
243
244/* Equalizer filter coefs generated from the MAXIM MAX98088
245 * evkit software tool */
246static struct max98088_eq_cfg max98088_eq_cfg[] = {
247 {
248 .name = "FLAT",
249 .rate = 44100,
250 .band1 = {0x2000, 0xC002, 0x4000, 0x00E9, 0x0000},
251 .band2 = {0x2000, 0xC00F, 0x4000, 0x02BC, 0x0000},
252 .band3 = {0x2000, 0xC0A7, 0x4000, 0x0916, 0x0000},
253 .band4 = {0x2000, 0xC5C2, 0x4000, 0x1A87, 0x0000},
254 .band5 = {0x2000, 0xF6B0, 0x4000, 0x3F51, 0x0000},
255 },
256 {
257 .name = "LOWPASS1K",
258 .rate = 44100,
259 .band1 = {0x205D, 0xC001, 0x3FEF, 0x002E, 0x02E0},
260 .band2 = {0x5B9A, 0xC093, 0x3AB2, 0x088B, 0x1981},
261 .band3 = {0x0D22, 0xC170, 0x26EA, 0x0D79, 0x32CF},
262 .band4 = {0x0894, 0xC612, 0x01B3, 0x1B34, 0x3FFA},
263 .band5 = {0x0815, 0x3FFF, 0xCF78, 0x0000, 0x29B7},
264 },
265 { /* BASS=-12dB, TREBLE=+9dB, Fc=5KHz */
266 .name = "HIBOOST",
267 .rate = 44100,
268 .band1 = {0x0815, 0xC001, 0x3AA4, 0x0003, 0x19A2},
269 .band2 = {0x0815, 0xC103, 0x092F, 0x0B55, 0x3F56},
270 .band3 = {0x0E0A, 0xC306, 0x1E5C, 0x136E, 0x3856},
271 .band4 = {0x2459, 0xF665, 0x0CAA, 0x3F46, 0x3EBB},
272 .band5 = {0x5BBB, 0x3FFF, 0xCEB0, 0x0000, 0x28CA},
273 },
274 { /* BASS=12dB, TREBLE=+12dB */
275 .name = "LOUD12DB",
276 .rate = 44100,
277 .band1 = {0x7FC1, 0xC001, 0x3EE8, 0x0020, 0x0BC7},
278 .band2 = {0x51E9, 0xC016, 0x3C7C, 0x033F, 0x14E9},
279 .band3 = {0x1745, 0xC12C, 0x1680, 0x0C2F, 0x3BE9},
280 .band4 = {0x4536, 0xD7E2, 0x0ED4, 0x31DD, 0x3E42},
281 .band5 = {0x7FEF, 0x3FFF, 0x0BAB, 0x0000, 0x3EED},
282 },
283 {
284 .name = "FLAT",
285 .rate = 16000,
286 .band1 = {0x2000, 0xC004, 0x4000, 0x0141, 0x0000},
287 .band2 = {0x2000, 0xC033, 0x4000, 0x0505, 0x0000},
288 .band3 = {0x2000, 0xC268, 0x4000, 0x115F, 0x0000},
289 .band4 = {0x2000, 0xDA62, 0x4000, 0x33C6, 0x0000},
290 .band5 = {0x2000, 0x4000, 0x4000, 0x0000, 0x0000},
291 },
292 {
293 .name = "LOWPASS1K",
294 .rate = 16000,
295 .band1 = {0x2000, 0xC004, 0x4000, 0x0141, 0x0000},
296 .band2 = {0x5BE8, 0xC3E0, 0x3307, 0x15ED, 0x26A0},
297 .band3 = {0x0F71, 0xD15A, 0x08B3, 0x2BD0, 0x3F67},
298 .band4 = {0x0815, 0x3FFF, 0xCF78, 0x0000, 0x29B7},
299 .band5 = {0x0815, 0x3FFF, 0xCF78, 0x0000, 0x29B7},
300 },
301 { /* BASS=-12dB, TREBLE=+9dB, Fc=2KHz */
302 .name = "HIBOOST",
303 .rate = 16000,
304 .band1 = {0x0815, 0xC001, 0x3BD2, 0x0009, 0x16BF},
305 .band2 = {0x080E, 0xC17E, 0xF653, 0x0DBD, 0x3F43},
306 .band3 = {0x0F80, 0xDF45, 0xEE33, 0x36FE, 0x3D79},
307 .band4 = {0x590B, 0x3FF0, 0xE882, 0x02BD, 0x3B87},
308 .band5 = {0x4C87, 0xF3D0, 0x063F, 0x3ED4, 0x3FB1},
309 },
310 { /* BASS=12dB, TREBLE=+12dB */
311 .name = "LOUD12DB",
312 .rate = 16000,
313 .band1 = {0x7FC1, 0xC001, 0x3D07, 0x0058, 0x1344},
314 .band2 = {0x2DA6, 0xC013, 0x3CF1, 0x02FF, 0x138B},
315 .band3 = {0x18F1, 0xC08E, 0x244D, 0x0863, 0x34B5},
316 .band4 = {0x2BE0, 0xF385, 0x04FD, 0x3EC5, 0x3FCE},
317 .band5 = {0x7FEF, 0x4000, 0x0BAB, 0x0000, 0x3EED},
318 },
319};
320
321
322static struct max98088_pdata enterprise_max98088_pdata = {
323 /* equalizer configuration */
324 .eq_cfg = max98088_eq_cfg,
325 .eq_cfgcnt = ARRAY_SIZE(max98088_eq_cfg),
326
327 /* debounce time */
328 .debounce_time_ms = 200,
329
330 /* microphone configuration */
331 .digmic_left_mode = 1,
332 .digmic_right_mode = 1,
333
334 /* receiver output configuration */
335 .receiver_mode = 0, /* 0 = amplifier, 1 = line output */
336};
337
338static struct pn544_i2c_platform_data nfc_pdata = {
339 .irq_gpio = TEGRA_GPIO_PS4,
340 .ven_gpio = TEGRA_GPIO_PM6,
341 .firm_gpio = 0,
342};
343
344
345static struct i2c_board_info __initdata max98088_board_info = {
346 I2C_BOARD_INFO("max98088", 0x10),
347 .platform_data = &enterprise_max98088_pdata,
348 .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_HP_DET),
349};
350
351static struct i2c_board_info __initdata enterprise_codec_aic326x_info = {
352 I2C_BOARD_INFO("aic3262-codec", 0x18),
353 .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_HP_DET),
354};
355
356static struct i2c_board_info __initdata nfc_board_info = {
357 I2C_BOARD_INFO("pn544", 0x28),
358 .platform_data = &nfc_pdata,
359 .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_PS4),
360};
361
362static void enterprise_i2c_init(void)
363{
364 tegra_i2c_device1.dev.platform_data = &enterprise_i2c1_platform_data;
365 tegra_i2c_device2.dev.platform_data = &enterprise_i2c2_platform_data;
366 tegra_i2c_device3.dev.platform_data = &enterprise_i2c3_platform_data;
367 tegra_i2c_device4.dev.platform_data = &enterprise_i2c4_platform_data;
368 tegra_i2c_device5.dev.platform_data = &enterprise_i2c5_platform_data;
369
370 platform_device_register(&tegra_i2c_device5);
371 platform_device_register(&tegra_i2c_device4);
372 platform_device_register(&tegra_i2c_device3);
373 platform_device_register(&tegra_i2c_device2);
374 platform_device_register(&tegra_i2c_device1);
375
376 i2c_register_board_info(0, &max98088_board_info, 1);
377 i2c_register_board_info(0, &enterprise_codec_aic326x_info, 1);
378 i2c_register_board_info(0, &nfc_board_info, 1);
379}
380
381static struct platform_device *enterprise_uart_devices[] __initdata = {
382 &tegra_uarta_device,
383 &tegra_uartb_device,
384 &tegra_uartc_device,
385 &tegra_uartd_device,
386 &tegra_uarte_device,
387};
388
389static struct uart_clk_parent uart_parent_clk[] = {
390 [0] = {.name = "clk_m"},
391 [1] = {.name = "pll_p"},
392#ifndef CONFIG_TEGRA_PLLM_RESTRICTED
393 [2] = {.name = "pll_m"},
394#endif
395};
396static struct tegra_uart_platform_data enterprise_uart_pdata;
397static struct tegra_uart_platform_data enterprise_loopback_uart_pdata;
398
399static void __init uart_debug_init(void)
400{
401 unsigned long rate;
402 struct clk *c;
403
404 /* UARTD is the debug port. */
405 pr_info("Selecting UARTD as the debug console\n");
406 enterprise_uart_devices[3] = &debug_uartd_device;
407 debug_uart_port_base = ((struct plat_serial8250_port *)(
408 debug_uartd_device.dev.platform_data))->mapbase;
409 debug_uart_clk = clk_get_sys("serial8250.0", "uartd");
410
411 /* Clock enable for the debug channel */
412 if (!IS_ERR_OR_NULL(debug_uart_clk)) {
413 rate = ((struct plat_serial8250_port *)(
414 debug_uartd_device.dev.platform_data))->uartclk;
415 pr_info("The debug console clock name is %s\n",
416 debug_uart_clk->name);
417 c = tegra_get_clock_by_name("pll_p");
418 if (IS_ERR_OR_NULL(c))
419 pr_err("Not getting the parent clock pll_p\n");
420 else
421 clk_set_parent(debug_uart_clk, c);
422
423 clk_enable(debug_uart_clk);
424 clk_set_rate(debug_uart_clk, rate);
425 } else {
426 pr_err("Not getting the clock %s for debug console\n",
427 debug_uart_clk->name);
428 }
429}
430
431static void __init enterprise_uart_init(void)
432{
433 int i;
434 struct clk *c;
435
436 for (i = 0; i < ARRAY_SIZE(uart_parent_clk); ++i) {
437 c = tegra_get_clock_by_name(uart_parent_clk[i].name);
438 if (IS_ERR_OR_NULL(c)) {
439 pr_err("Not able to get the clock for %s\n",
440 uart_parent_clk[i].name);
441 continue;
442 }
443 uart_parent_clk[i].parent_clk = c;
444 uart_parent_clk[i].fixed_clk_rate = clk_get_rate(c);
445 }
446 enterprise_uart_pdata.parent_clk_list = uart_parent_clk;
447 enterprise_uart_pdata.parent_clk_count = ARRAY_SIZE(uart_parent_clk);
448 enterprise_loopback_uart_pdata.parent_clk_list = uart_parent_clk;
449 enterprise_loopback_uart_pdata.parent_clk_count =
450 ARRAY_SIZE(uart_parent_clk);
451 enterprise_loopback_uart_pdata.is_loopback = true;
452 tegra_uarta_device.dev.platform_data = &enterprise_uart_pdata;
453 tegra_uartb_device.dev.platform_data = &enterprise_uart_pdata;
454 tegra_uartc_device.dev.platform_data = &enterprise_uart_pdata;
455 tegra_uartd_device.dev.platform_data = &enterprise_uart_pdata;
456 /* UARTE is used for loopback test purpose */
457 tegra_uarte_device.dev.platform_data = &enterprise_loopback_uart_pdata;
458
459 /* Register low speed only if it is selected */
460 if (!is_tegra_debug_uartport_hs())
461 uart_debug_init();
462
463 platform_add_devices(enterprise_uart_devices,
464 ARRAY_SIZE(enterprise_uart_devices));
465}
466
467
468
469static struct resource tegra_rtc_resources[] = {
470 [0] = {
471 .start = TEGRA_RTC_BASE,
472 .end = TEGRA_RTC_BASE + TEGRA_RTC_SIZE - 1,
473 .flags = IORESOURCE_MEM,
474 },
475 [1] = {
476 .start = INT_RTC,
477 .end = INT_RTC,
478 .flags = IORESOURCE_IRQ,
479 },
480};
481
482static struct platform_device tegra_rtc_device = {
483 .name = "tegra_rtc",
484 .id = -1,
485 .resource = tegra_rtc_resources,
486 .num_resources = ARRAY_SIZE(tegra_rtc_resources),
487};
488
489static struct platform_device tegra_camera = {
490 .name = "tegra_camera",
491 .id = -1,
492};
493
494static struct tegra_asoc_platform_data enterprise_audio_pdata = {
495 .gpio_spkr_en = -1,
496 .gpio_hp_det = TEGRA_GPIO_HP_DET,
497 .gpio_hp_mute = -1,
498 .gpio_int_mic_en = -1,
499 .gpio_ext_mic_en = -1,
500 .debounce_time_hp = -1,
501 /*defaults for Enterprise board*/
502 .audio_port_id = {
503 [HIFI_CODEC] = 0,
504 [BASEBAND] = 2,
505 [BT_SCO] = 3,
506 },
507 .baseband_param = {
508 .rate = 8000,
509 .channels = 1,
510 },
511};
512
513static struct platform_device enterprise_audio_device = {
514 .name = "tegra-snd-max98088",
515 .id = 0,
516 .dev = {
517 .platform_data = &enterprise_audio_pdata,
518 },
519};
520
521static struct tegra_asoc_platform_data enterprise_audio_aic326x_pdata = {
522 .gpio_spkr_en = -1,
523 .gpio_hp_det = TEGRA_GPIO_HP_DET,
524 .gpio_hp_mute = -1,
525 .gpio_int_mic_en = -1,
526 .gpio_ext_mic_en = -1,
527 /*defaults for Verbier-Enterprise (E1197) board with TI AIC326X codec*/
528 .audio_port_id = {
529 [HIFI_CODEC] = 0,
530 [BASEBAND] = 2,
531 [BT_SCO] = 3,
532 },
533 .baseband_param = {
534 .rate = 8000,
535 .channels = 1,
536 },
537};
538
539static struct platform_device enterprise_audio_aic326x_device = {
540 .name = "tegra-snd-aic326x",
541 .id = 0,
542 .dev = {
543 .platform_data = &enterprise_audio_aic326x_pdata,
544 },
545};
546
547static struct platform_device *enterprise_devices[] __initdata = {
548 &tegra_pmu_device,
549 &tegra_rtc_device,
550 &tegra_udc_device,
551#if defined(CONFIG_TEGRA_IOVMM_SMMU) || defined(CONFIG_TEGRA_IOMMU_SMMU)
552 &tegra_smmu_device,
553#endif
554 &tegra_wdt_device,
555#if defined(CONFIG_TEGRA_AVP)
556 &tegra_avp_device,
557#endif
558 &tegra_camera,
559 &enterprise_bcm4329_rfkill_device,
560 &tegra_spi_device4,
561 &tegra_hda_device,
562#if defined(CONFIG_CRYPTO_DEV_TEGRA_SE)
563 &tegra_se_device,
564#endif
565#if defined(CONFIG_CRYPTO_DEV_TEGRA_AES)
566 &tegra_aes_device,
567#endif
568};
569
570#define MXT_CONFIG_CRC 0x62F903
571/*
572 * Config converted from memory-mapped cfg-file with
573 * following version information:
574 *
575 *
576 *
577 * FAMILY_ID=128
578 * VARIANT=1
579 * VERSION=32
580 * BUILD=170
581 * VENDOR_ID=255
582 * PRODUCT_ID=TBD
583 * CHECKSUM=0xC189B6
584 *
585 *
586 */
587
588static const u8 config[] = {
589 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
590 0xFF, 0xFF, 0x32, 0x0A, 0x00, 0x05, 0x01, 0x00,
591 0x00, 0x1E, 0x0A, 0x8B, 0x00, 0x00, 0x13, 0x0B,
592 0x00, 0x10, 0x32, 0x03, 0x03, 0x00, 0x03, 0x01,
593 0x00, 0x0A, 0x0A, 0x0A, 0x0A, 0xBF, 0x03, 0x1B,
594 0x02, 0x00, 0x00, 0x37, 0x37, 0x00, 0x00, 0x00,
595 0x00, 0x28, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
596 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00,
597 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
598 0x00, 0x00, 0x00, 0xA9, 0x7F, 0x9A, 0x0E, 0x00,
599 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
600 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x00,
601 0x00, 0x00, 0x03, 0x23, 0x00, 0x00, 0x00, 0x0A,
602 0x0F, 0x14, 0x19, 0x03, 0x00, 0x00, 0x00, 0x00,
603 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
604 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
605 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
606 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
607 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
608 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
609 0x00, 0x00, 0x00, 0x01, 0x00, 0x03, 0x08, 0x10,
610 0x00
611};
612
613static struct mxt_platform_data atmel_mxt_info = {
614 .x_line = 19,
615 .y_line = 11,
616 .x_size = 960,
617 .y_size = 540,
618 .blen = 0x10,
619 .threshold = 0x32,
620 .voltage = 3300000, /* 3.3V */
621 .orient = 3,
622 .config = config,
623 .config_length = 168,
624 .config_crc = MXT_CONFIG_CRC,
625 .irqflags = IRQF_TRIGGER_FALLING,
626/* .read_chg = &read_chg, */
627 .read_chg = NULL,
628};
629
630static struct i2c_board_info __initdata atmel_i2c_info[] = {
631 {
632 I2C_BOARD_INFO("atmel_mxt_ts", MXT224_I2C_ADDR1),
633 .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_PH6),
634 .platform_data = &atmel_mxt_info,
635 }
636};
637
638static int __init enterprise_touch_init(void)
639{
640 tegra_gpio_enable(TEGRA_GPIO_PH6);
641 tegra_gpio_enable(TEGRA_GPIO_PF5);
642
643 gpio_request(TEGRA_GPIO_PH6, "atmel-irq");
644 gpio_direction_input(TEGRA_GPIO_PH6);
645
646 gpio_request(TEGRA_GPIO_PF5, "atmel-reset");
647 gpio_direction_output(TEGRA_GPIO_PF5, 0);
648 msleep(1);
649 gpio_set_value(TEGRA_GPIO_PF5, 1);
650 msleep(100);
651
652 i2c_register_board_info(1, atmel_i2c_info, 1);
653
654 return 0;
655}
656
657static struct usb_phy_plat_data tegra_usb_phy_pdata[] = {
658 [0] = {
659 .instance = 0,
660 .vbus_gpio = -1,
661 .vbus_reg_supply = "usb_vbus",
662 .vbus_irq = ENT_TPS80031_IRQ_BASE +
663 TPS80031_INT_VBUS_DET,
664 },
665 [1] = {
666 .instance = 1,
667 .vbus_gpio = -1,
668 },
669 [2] = {
670 .instance = 2,
671 .vbus_gpio = -1,
672 },
673};
674
675static struct tegra_uhsic_config uhsic_phy_config = {
676 .enable_gpio = -1,
677 .reset_gpio = -1,
678 .sync_start_delay = 9,
679 .idle_wait_delay = 17,
680 .term_range_adj = 0,
681 .elastic_underrun_limit = 16,
682 .elastic_overrun_limit = 16,
683};
684
685static struct tegra_ehci_platform_data tegra_ehci_uhsic_pdata = {
686 .phy_type = TEGRA_USB_PHY_TYPE_HSIC,
687 .phy_config = &uhsic_phy_config,
688 .operating_mode = TEGRA_USB_HOST,
689 .power_down_on_bus_suspend = 1,
690 .default_enable = true,
691};
692
693static struct tegra_ehci_platform_data tegra_ehci_pdata[] = {
694 [0] = {
695 .phy_config = &utmi_phy_config[0],
696 .operating_mode = TEGRA_USB_HOST,
697 .power_down_on_bus_suspend = 1,
698 .default_enable = false,
699 },
700 [1] = {
701 .phy_config = &utmi_phy_config[1],
702 .operating_mode = TEGRA_USB_HOST,
703 .power_down_on_bus_suspend = 1,
704 .default_enable = false,
705 },
706 [2] = {
707 .phy_config = &utmi_phy_config[2],
708 .operating_mode = TEGRA_USB_HOST,
709 .power_down_on_bus_suspend = 1,
710 .default_enable = false,
711 },
712};
713
714static struct tegra_otg_platform_data tegra_otg_pdata = {
715 .ehci_device = &tegra_ehci1_device,
716 .ehci_pdata = &tegra_ehci_pdata[0],
717};
718
719struct platform_device *tegra_usb_hsic_host_register(void)
720{
721 struct platform_device *pdev;
722 int val;
723
724 pdev = platform_device_alloc(tegra_ehci2_device.name,
725 tegra_ehci2_device.id);
726 if (!pdev)
727 return NULL;
728
729 val = platform_device_add_resources(pdev, tegra_ehci2_device.resource,
730 tegra_ehci2_device.num_resources);
731 if (val)
732 goto error;
733
734 pdev->dev.dma_mask = tegra_ehci2_device.dev.dma_mask;
735 pdev->dev.coherent_dma_mask = tegra_ehci2_device.dev.coherent_dma_mask;
736
737 val = platform_device_add_data(pdev, &tegra_ehci_uhsic_pdata,
738 sizeof(struct tegra_ehci_platform_data));
739 if (val)
740 goto error;
741
742 val = platform_device_add(pdev);
743 if (val)
744 goto error;
745
746 return pdev;
747
748error:
749 pr_err("%s: failed to add the host contoller device\n", __func__);
750 platform_device_put(pdev);
751 return NULL;
752}
753
754void tegra_usb_hsic_host_unregister(struct platform_device *pdev)
755{
756 platform_device_unregister(pdev);
757}
758
759static int enterprise_usb_hsic_postsupend(void)
760{
761 pr_debug("%s\n", __func__);
762#ifdef CONFIG_TEGRA_BB_XMM_POWER
763 baseband_xmm_set_power_status(BBXMM_PS_L2);
764#endif
765 return 0;
766}
767
768static int enterprise_usb_hsic_preresume(void)
769{
770 pr_debug("%s\n", __func__);
771#ifdef CONFIG_TEGRA_BB_XMM_POWER
772 baseband_xmm_set_power_status(BBXMM_PS_L2TOL0);
773#endif
774 return 0;
775}
776
777static int enterprise_usb_hsic_phy_ready(void)
778{
779 pr_debug("%s\n", __func__);
780#ifdef CONFIG_TEGRA_BB_XMM_POWER
781 baseband_xmm_set_power_status(BBXMM_PS_L0);
782#endif
783 return 0;
784}
785
786static int enterprise_usb_hsic_phy_off(void)
787{
788 pr_debug("%s\n", __func__);
789#ifdef CONFIG_TEGRA_BB_XMM_POWER
790 baseband_xmm_set_power_status(BBXMM_PS_L3);
791#endif
792 return 0;
793}
794
795static void enterprise_usb_init(void)
796{
797 struct fsl_usb2_platform_data *udc_pdata;
798
799 tegra_usb_phy_init(tegra_usb_phy_pdata, ARRAY_SIZE(tegra_usb_phy_pdata));
800
801 tegra_otg_device.dev.platform_data = &tegra_otg_pdata;
802 platform_device_register(&tegra_otg_device);
803
804 udc_pdata = tegra_udc_device.dev.platform_data;
805}
806
807static struct platform_device *enterprise_audio_devices[] __initdata = {
808 &tegra_ahub_device,
809 &tegra_dam_device0,
810 &tegra_dam_device1,
811 &tegra_dam_device2,
812 &tegra_i2s_device0,
813 &tegra_i2s_device1,
814 &tegra_i2s_device2,
815 &tegra_i2s_device3,
816 &tegra_spdif_device,
817 &spdif_dit_device,
818 &bluetooth_dit_device,
819 &baseband_dit_device,
820 &tegra_pcm_device,
821 &enterprise_audio_device,
822 &enterprise_audio_aic326x_device,
823};
824
825static void enterprise_audio_init(void)
826{
827 struct board_info board_info;
828
829 tegra_get_board_info(&board_info);
830
831 if (board_info.board_id == BOARD_E1197)
832 enterprise_audio_pdata.audio_port_id[HIFI_CODEC] = 1;
833
834 platform_add_devices(enterprise_audio_devices,
835 ARRAY_SIZE(enterprise_audio_devices));
836}
837
838static void enterprise_gps_init(void)
839{
840 tegra_gpio_enable(TEGRA_GPIO_PE4);
841 tegra_gpio_enable(TEGRA_GPIO_PE5);
842}
843
844static struct baseband_power_platform_data tegra_baseband_power_data = {
845 .baseband_type = BASEBAND_XMM,
846 .modem = {
847 .xmm = {
848 .bb_rst = XMM_GPIO_BB_RST,
849 .bb_on = XMM_GPIO_BB_ON,
850 .ipc_bb_wake = XMM_GPIO_IPC_BB_WAKE,
851 .ipc_ap_wake = XMM_GPIO_IPC_AP_WAKE,
852 .ipc_hsic_active = XMM_GPIO_IPC_HSIC_ACTIVE,
853 .ipc_hsic_sus_req = XMM_GPIO_IPC_HSIC_SUS_REQ,
854 },
855 },
856};
857
858static struct platform_device tegra_baseband_power_device = {
859 .name = "baseband_xmm_power",
860 .id = -1,
861 .dev = {
862 .platform_data = &tegra_baseband_power_data,
863 },
864};
865
866static struct platform_device tegra_baseband_power2_device = {
867 .name = "baseband_xmm_power2",
868 .id = -1,
869 .dev = {
870 .platform_data = &tegra_baseband_power_data,
871 },
872};
873
874#ifdef CONFIG_TEGRA_BB_M7400
875static union tegra_bb_gpio_id m7400_gpio_id = {
876 .m7400 = {
877 .pwr_status = GPIO_BB_RESET,
878 .pwr_on = GPIO_BB_PWRON,
879 .uart_awr = GPIO_BB_APACK,
880 .uart_cwr = GPIO_BB_CPACK,
881 .usb_awr = GPIO_BB_APACK2,
882 .usb_cwr = GPIO_BB_CPACK2,
883 .service = GPIO_BB_RSVD2,
884 .resout2 = GPIO_BB_RSVD1,
885 },
886};
887
888static struct tegra_bb_pdata m7400_pdata = {
889 .id = &m7400_gpio_id,
890 .device = &tegra_ehci2_device,
891 .ehci_register = tegra_usb_hsic_host_register,
892 .ehci_unregister = tegra_usb_hsic_host_unregister,
893 .bb_id = TEGRA_BB_M7400,
894};
895
896static struct platform_device tegra_baseband_m7400_device = {
897 .name = "tegra_baseband_power",
898 .id = -1,
899 .dev = {
900 .platform_data = &m7400_pdata,
901 },
902};
903#endif
904
905static void enterprise_baseband_init(void)
906{
907 int modem_id = tegra_get_modem_id();
908
909 switch (modem_id) {
910 case TEGRA_BB_PH450: /* PH450 ULPI */
911 enterprise_modem_init();
912 break;
913 case TEGRA_BB_XMM6260: /* XMM6260 HSIC */
914 /* xmm baseband - do not switch off phy during suspend */
915 tegra_ehci_uhsic_pdata.power_down_on_bus_suspend = 0;
916 uhsic_phy_config.postsuspend = enterprise_usb_hsic_postsupend;
917 uhsic_phy_config.preresume = enterprise_usb_hsic_preresume;
918 uhsic_phy_config.usb_phy_ready = enterprise_usb_hsic_phy_ready;
919 uhsic_phy_config.post_phy_off = enterprise_usb_hsic_phy_off;
920 /* enable XMM6260 baseband gpio(s) */
921 tegra_gpio_enable(tegra_baseband_power_data.modem.generic
922 .mdm_reset);
923 tegra_gpio_enable(tegra_baseband_power_data.modem.generic
924 .mdm_on);
925 tegra_gpio_enable(tegra_baseband_power_data.modem.generic
926 .ap2mdm_ack);
927 tegra_gpio_enable(tegra_baseband_power_data.modem.generic
928 .mdm2ap_ack);
929 tegra_gpio_enable(tegra_baseband_power_data.modem.generic
930 .ap2mdm_ack2);
931 tegra_gpio_enable(tegra_baseband_power_data.modem.generic
932 .mdm2ap_ack2);
933 tegra_baseband_power_data.hsic_register =
934 &tegra_usb_hsic_host_register;
935 tegra_baseband_power_data.hsic_unregister =
936 &tegra_usb_hsic_host_unregister;
937 platform_device_register(&tegra_baseband_power_device);
938 platform_device_register(&tegra_baseband_power2_device);
939 break;
940#ifdef CONFIG_TEGRA_BB_M7400
941 case TEGRA_BB_M7400: /* M7400 HSIC */
942 tegra_ehci_uhsic_pdata.power_down_on_bus_suspend = 0;
943 tegra_ehci2_device.dev.platform_data
944 = &tegra_ehci_uhsic_pdata;
945 platform_device_register(&tegra_baseband_m7400_device);
946 break;
947#endif
948 }
949}
950
951static void enterprise_nfc_init(void)
952{
953 tegra_gpio_enable(TEGRA_GPIO_PS4);
954 tegra_gpio_enable(TEGRA_GPIO_PM6);
955}
956
957static void __init tegra_enterprise_init(void)
958{
959 tegra_thermal_init(&thermal_data);
960 tegra_clk_init_from_table(enterprise_clk_init_table);
961 enterprise_pinmux_init();
962 enterprise_i2c_init();
963 enterprise_uart_init();
964 enterprise_usb_init();
965 platform_add_devices(enterprise_devices, ARRAY_SIZE(enterprise_devices));
966 tegra_ram_console_debug_init();
967 enterprise_regulator_init();
968 enterprise_sdhci_init();
969#ifdef CONFIG_TEGRA_EDP_LIMITS
970 enterprise_edp_init();
971#endif
972 enterprise_kbc_init();
973 enterprise_touch_init();
974 enterprise_audio_init();
975 enterprise_gps_init();
976 enterprise_baseband_init();
977 enterprise_panel_init();
978 enterprise_setup_bluesleep();
979 enterprise_emc_init();
980 enterprise_sensors_init();
981 enterprise_suspend_init();
982 enterprise_bpc_mgmt_init();
983 tegra_release_bootloader_fb();
984 enterprise_nfc_init();
985}
986
987static void __init tegra_enterprise_reserve(void)
988{
989#if defined(CONFIG_NVMAP_CONVERT_CARVEOUT_TO_IOVMM)
990 tegra_reserve(0, SZ_4M, SZ_8M);
991#else
992 tegra_reserve(SZ_128M, SZ_4M, SZ_8M);
993#endif
994 tegra_ram_console_debug_reserve(SZ_1M);
995}
996
997MACHINE_START(TEGRA_ENTERPRISE, "tegra_enterprise")
998 .boot_params = 0x80000100,
999 .map_io = tegra_map_common_io,
1000 .reserve = tegra_enterprise_reserve,
1001 .init_early = tegra_init_early,
1002 .init_irq = tegra_init_irq,
1003 .timer = &tegra_timer,
1004 .init_machine = tegra_enterprise_init,
1005MACHINE_END