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Diffstat (limited to 'arch/arm/mach-tegra/board-cardhu-pm298-power-rails.c')
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diff --git a/arch/arm/mach-tegra/board-cardhu-pm298-power-rails.c b/arch/arm/mach-tegra/board-cardhu-pm298-power-rails.c
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1/*
2 * arch/arm/mach-tegra/board-cardhu-pm298-power-rails.c
3 *
4 * Copyright (C) 2011 NVIDIA, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
18 * 02111-1307, USA
19 */
20#include <linux/i2c.h>
21#include <linux/pda_power.h>
22#include <linux/platform_device.h>
23#include <linux/resource.h>
24#include <linux/regulator/machine.h>
25#include <linux/gpio.h>
26#include <linux/io.h>
27#include <linux/regulator/gpio-switch-regulator.h>
28#include <linux/regulator/fixed.h>
29#include <linux/mfd/max77663-core.h>
30#include <linux/regulator/max77663-regulator.h>
31
32#include <mach/iomap.h>
33#include <mach/irqs.h>
34#include <mach/pinmux.h>
35#include <mach/edp.h>
36
37#include "gpio-names.h"
38#include "board.h"
39#include "board-cardhu.h"
40#include "pm.h"
41#include "wakeups-t3.h"
42
43#define PMC_CTRL 0x0
44#define PMC_CTRL_INTR_LOW BIT(17)
45
46static struct regulator_consumer_supply max77663_sd0_supply[] = {
47 REGULATOR_SUPPLY("vdd_cpu_pmu", NULL),
48 REGULATOR_SUPPLY("vdd_cpu", NULL),
49 REGULATOR_SUPPLY("vdd_sys", NULL),
50};
51
52static struct regulator_consumer_supply max77663_sd1_supply[] = {
53 REGULATOR_SUPPLY("vdd_core", NULL),
54 REGULATOR_SUPPLY("en_vddio_ddr_1v2", NULL),
55};
56
57static struct regulator_consumer_supply max77663_sd2_supply[] = {
58 REGULATOR_SUPPLY("avdd_hdmi_pll", NULL),
59 REGULATOR_SUPPLY("avdd_usb_pll", NULL),
60 REGULATOR_SUPPLY("avdd_osc", NULL),
61 REGULATOR_SUPPLY("vdd1v8_satelite", NULL),
62 REGULATOR_SUPPLY("vddio_uart", NULL),
63 REGULATOR_SUPPLY("pwrdet_uart", NULL),
64 REGULATOR_SUPPLY("vddio_audio", NULL),
65 REGULATOR_SUPPLY("pwrdet_audio", NULL),
66 REGULATOR_SUPPLY("vddio_bb", NULL),
67 REGULATOR_SUPPLY("pwrdet_bb", NULL),
68 REGULATOR_SUPPLY("vddio_lcd_pmu", NULL),
69 REGULATOR_SUPPLY("pwrdet_lcd", NULL),
70 REGULATOR_SUPPLY("vddio_cam", NULL),
71 REGULATOR_SUPPLY("pwrdet_cam", NULL),
72 REGULATOR_SUPPLY("vddio_vi", NULL),
73 REGULATOR_SUPPLY("pwrdet_vi", NULL),
74 REGULATOR_SUPPLY("ldo6", NULL),
75 REGULATOR_SUPPLY("ldo7", NULL),
76 REGULATOR_SUPPLY("ldo8", NULL),
77 REGULATOR_SUPPLY("vcore_audio", NULL),
78 REGULATOR_SUPPLY("avcore_audio", NULL),
79 REGULATOR_SUPPLY("vddio_sdmmc", "sdhci-tegra.2"),
80 REGULATOR_SUPPLY("pwrdet_sdmmc3", NULL),
81 REGULATOR_SUPPLY("vcore1_lpddr2", NULL),
82 REGULATOR_SUPPLY("vcom_1v8", NULL),
83 REGULATOR_SUPPLY("pmuio_1v8", NULL),
84 REGULATOR_SUPPLY("avdd_ic_usb", NULL),
85 REGULATOR_SUPPLY("vdd_gen1v8", NULL),
86};
87
88static struct regulator_consumer_supply max77663_sd3_supply[] = {
89 REGULATOR_SUPPLY("vdd_gen1v5", NULL),
90 REGULATOR_SUPPLY("vcore_lcd", NULL),
91 REGULATOR_SUPPLY("track_ldo1", NULL),
92 REGULATOR_SUPPLY("external_ldo_1v2", NULL),
93 REGULATOR_SUPPLY("vcore_cam1", NULL),
94 REGULATOR_SUPPLY("vcore_cam2", NULL),
95 REGULATOR_SUPPLY("avdd_pexb", NULL),
96 REGULATOR_SUPPLY("vdd_pexb", NULL),
97 REGULATOR_SUPPLY("avdd_pex_pll", NULL),
98 REGULATOR_SUPPLY("avdd_pexa", NULL),
99 REGULATOR_SUPPLY("vdd_pexa", NULL),
100 REGULATOR_SUPPLY("vcom_1v2", NULL),
101 REGULATOR_SUPPLY("vdio_hsic", NULL),
102};
103
104static struct regulator_consumer_supply max77663_ldo0_supply[] = {
105 REGULATOR_SUPPLY("vdd_ddr_hs", NULL),
106};
107
108static struct regulator_consumer_supply max77663_ldo1_supply[] = {
109 REGULATOR_SUPPLY("avdd_plla_p_c_s", NULL),
110 REGULATOR_SUPPLY("avdd_pllm", NULL),
111 REGULATOR_SUPPLY("avdd_pllu_d", NULL),
112 REGULATOR_SUPPLY("avdd_pllu_d2", NULL),
113 REGULATOR_SUPPLY("avdd_pllx", NULL),
114};
115
116static struct regulator_consumer_supply max77663_ldo2_supply[] = {
117 REGULATOR_SUPPLY("avdd_dsi_csi", NULL),
118 REGULATOR_SUPPLY("pwrdet_mipi", NULL),
119};
120
121static struct regulator_consumer_supply max77663_ldo3_supply[] = {
122 REGULATOR_SUPPLY("vddio_sdmmc", "sdhci-tegra.3"),
123 REGULATOR_SUPPLY("pwrdet_sdmmc4", NULL),
124};
125
126static struct regulator_consumer_supply max77663_ldo4_supply[] = {
127 REGULATOR_SUPPLY("vdd_rtc", NULL),
128};
129
130static struct regulator_consumer_supply max77663_ldo5_supply[] = {
131 REGULATOR_SUPPLY("vddio_sdmmc", "sdhci-tegra.0"),
132 REGULATOR_SUPPLY("pwrdet_sdmmc1", NULL),
133};
134
135static struct regulator_consumer_supply max77663_ldo6_supply[] = {
136 REGULATOR_SUPPLY("vddio_sys", NULL),
137};
138
139static struct regulator_consumer_supply max77663_ldo7_supply[] = {
140 REGULATOR_SUPPLY("unused_ldo7", NULL),
141};
142
143static struct regulator_consumer_supply max77663_ldo8_supply[] = {
144 REGULATOR_SUPPLY("vcore_mmc", NULL),
145};
146
147static struct max77663_regulator_fps_cfg max77663_fps_cfgs[] = {
148 {
149 .src = FPS_SRC_0,
150 .en_src = FPS_EN_SRC_EN0,
151 .time_period = FPS_TIME_PERIOD_DEF,
152 },
153 {
154 .src = FPS_SRC_1,
155 .en_src = FPS_EN_SRC_EN1,
156 .time_period = FPS_TIME_PERIOD_DEF,
157 },
158 {
159 .src = FPS_SRC_2,
160 .en_src = FPS_EN_SRC_EN0,
161 .time_period = FPS_TIME_PERIOD_DEF,
162 },
163};
164
165#define MAX77663_PDATA_INIT(_id, _min_uV, _max_uV, _supply_reg, \
166 _always_on, _boot_on, _apply_uV, \
167 _init_apply, _init_enable, _init_uV, \
168 _fps_src, _fps_pu_period, _fps_pd_period, _flags) \
169 static struct max77663_regulator_platform_data max77663_regulator_pdata_##_id = \
170 { \
171 .init_data = { \
172 .constraints = { \
173 .min_uV = _min_uV, \
174 .max_uV = _max_uV, \
175 .valid_modes_mask = (REGULATOR_MODE_NORMAL | \
176 REGULATOR_MODE_STANDBY), \
177 .valid_ops_mask = (REGULATOR_CHANGE_MODE | \
178 REGULATOR_CHANGE_STATUS | \
179 REGULATOR_CHANGE_VOLTAGE), \
180 .always_on = _always_on, \
181 .boot_on = _boot_on, \
182 .apply_uV = _apply_uV, \
183 }, \
184 .num_consumer_supplies = \
185 ARRAY_SIZE(max77663_##_id##_supply), \
186 .consumer_supplies = max77663_##_id##_supply, \
187 .supply_regulator = _supply_reg, \
188 }, \
189 .init_apply = _init_apply, \
190 .init_enable = _init_enable, \
191 .init_uV = _init_uV, \
192 .fps_src = _fps_src, \
193 .fps_pu_period = _fps_pu_period, \
194 .fps_pd_period = _fps_pd_period, \
195 .fps_cfgs = max77663_fps_cfgs, \
196 .flags = _flags, \
197 }
198
199MAX77663_PDATA_INIT(sd0, 600000, 3387500, NULL, 1, 0, 0,
200 0, 0, -1, FPS_SRC_NONE, -1, -1, EN2_CTRL_SD0 | SD_FSRADE_DISABLE);
201
202MAX77663_PDATA_INIT(sd1, 800000, 1587500, NULL, 1, 0, 0,
203 1, 1, -1, FPS_SRC_1, -1, -1, SD_FSRADE_DISABLE);
204
205MAX77663_PDATA_INIT(sd2, 600000, 3387500, NULL, 1, 0, 0,
206 1, 1, -1, FPS_SRC_NONE, -1, -1, 0);
207
208MAX77663_PDATA_INIT(sd3, 600000, 3387500, NULL, 0, 0, 0,
209 1, 1, -1, FPS_SRC_NONE, -1, -1, 0);
210
211MAX77663_PDATA_INIT(ldo0, 800000, 2350000, max77663_rails(sd2), 0, 0, 0,
212 1, 1, -1, FPS_SRC_NONE, -1, -1, 0);
213
214MAX77663_PDATA_INIT(ldo1, 800000, 2350000, max77663_rails(sd2), 0, 0, 0,
215 1, 1, -1, FPS_SRC_NONE, -1, -1, 0);
216
217MAX77663_PDATA_INIT(ldo2, 800000, 3950000, max77663_rails(sd2), 0, 0, 0,
218 0, 0, -1, FPS_SRC_NONE, -1, -1, 0);
219
220MAX77663_PDATA_INIT(ldo3, 800000, 3950000, NULL, 0, 0, 0,
221 1, 1, -1, FPS_SRC_NONE, -1, -1, 0);
222
223MAX77663_PDATA_INIT(ldo4, 800000, 1587500, NULL, 0, 0, 0,
224 1, 1, -1, FPS_SRC_NONE, -1, -1, 0);
225
226MAX77663_PDATA_INIT(ldo5, 800000, 3950000, NULL, 0, 0, 0,
227 0, 0, -1, FPS_SRC_NONE, -1, -1, 0);
228
229MAX77663_PDATA_INIT(ldo6, 800000, 3950000, NULL, 1, 0, 0,
230 1, 1, -1, FPS_SRC_NONE, -1, -1, 0);
231
232MAX77663_PDATA_INIT(ldo7, 800000, 3950000, NULL, 0, 0, 0,
233 0, 0, -1, FPS_SRC_NONE, -1, -1, 0);
234
235MAX77663_PDATA_INIT(ldo8, 800000, 3950000, NULL, 0, 0, 0,
236 1, 1, -1, FPS_SRC_NONE, -1, -1, 0);
237
238#define MAX77663_REG(_id, _data) \
239 { \
240 .name = "max77663-regulator", \
241 .id = MAX77663_REGULATOR_ID_##_id, \
242 .platform_data = &max77663_regulator_pdata_##_data, \
243 .pdata_size = sizeof(max77663_regulator_pdata_##_data), \
244 }
245
246#define MAX77663_RTC() \
247 { \
248 .name = "max77663-rtc", \
249 .id = 0, \
250 }
251
252static struct mfd_cell max77663_subdevs[] = {
253 MAX77663_REG(SD0, sd0),
254 MAX77663_REG(SD1, sd1),
255 MAX77663_REG(SD2, sd2),
256 MAX77663_REG(SD3, sd3),
257 MAX77663_REG(LDO0, ldo0),
258 MAX77663_REG(LDO1, ldo1),
259 MAX77663_REG(LDO2, ldo2),
260 MAX77663_REG(LDO3, ldo3),
261 MAX77663_REG(LDO4, ldo4),
262 MAX77663_REG(LDO5, ldo5),
263 MAX77663_REG(LDO6, ldo6),
264 MAX77663_REG(LDO7, ldo7),
265 MAX77663_REG(LDO8, ldo8),
266 MAX77663_RTC(),
267};
268
269struct max77663_gpio_config max77663_gpio_cfgs[] = {
270 {
271 .gpio = MAX77663_GPIO0,
272 .dir = GPIO_DIR_OUT,
273 .dout = GPIO_DOUT_LOW,
274 .out_drv = GPIO_OUT_DRV_PUSH_PULL,
275 .alternate = GPIO_ALT_DISABLE,
276 },
277 {
278 .gpio = MAX77663_GPIO1,
279 .dir = GPIO_DIR_OUT,
280 .dout = GPIO_DOUT_HIGH,
281 .out_drv = GPIO_OUT_DRV_OPEN_DRAIN,
282 .alternate = GPIO_ALT_DISABLE,
283 },
284 {
285 .gpio = MAX77663_GPIO2,
286 .dir = GPIO_DIR_OUT,
287 .dout = GPIO_DOUT_HIGH,
288 .out_drv = GPIO_OUT_DRV_OPEN_DRAIN,
289 .alternate = GPIO_ALT_DISABLE,
290 },
291 {
292 .gpio = MAX77663_GPIO3,
293 .dir = GPIO_DIR_OUT,
294 .dout = GPIO_DOUT_HIGH,
295 .out_drv = GPIO_OUT_DRV_OPEN_DRAIN,
296 .alternate = GPIO_ALT_DISABLE,
297 },
298 {
299 .gpio = MAX77663_GPIO4,
300 .out_drv = GPIO_OUT_DRV_PUSH_PULL,
301 .alternate = GPIO_ALT_ENABLE,
302 },
303 {
304 .gpio = MAX77663_GPIO5,
305 .dir = GPIO_DIR_OUT,
306 .dout = GPIO_DOUT_LOW,
307 .out_drv = GPIO_OUT_DRV_PUSH_PULL,
308 .alternate = GPIO_ALT_DISABLE,
309 },
310 {
311 .gpio = MAX77663_GPIO6,
312 .dir = GPIO_DIR_OUT,
313 .dout = GPIO_DOUT_LOW,
314 .out_drv = GPIO_OUT_DRV_PUSH_PULL,
315 .alternate = GPIO_ALT_DISABLE,
316 },
317 {
318 .gpio = MAX77663_GPIO7,
319 .dir = GPIO_DIR_OUT,
320 .dout = GPIO_DOUT_LOW,
321 .out_drv = GPIO_OUT_DRV_PUSH_PULL,
322 .alternate = GPIO_ALT_DISABLE,
323 },
324};
325
326static struct max77663_platform_data max7763_pdata = {
327 .irq_base = MAX77663_IRQ_BASE,
328 .gpio_base = MAX77663_GPIO_BASE,
329
330 .num_gpio_cfgs = ARRAY_SIZE(max77663_gpio_cfgs),
331 .gpio_cfgs = max77663_gpio_cfgs,
332
333 .num_subdevs = ARRAY_SIZE(max77663_subdevs),
334 .sub_devices = max77663_subdevs,
335
336 .use_power_off = true,
337};
338
339static struct i2c_board_info __initdata max77663_regulators[] = {
340 {
341 /* The I2C address was determined by OTP factory setting */
342 I2C_BOARD_INFO("max77663", 0x1C),
343 .irq = INT_EXTERNAL_PMU,
344 .platform_data = &max7763_pdata,
345 },
346};
347
348int __init cardhu_pm298_regulator_init(void)
349{
350 struct board_info board_info;
351 struct board_info pmu_board_info;
352 void __iomem *pmc = IO_ADDRESS(TEGRA_PMC_BASE);
353 u32 pmc_ctrl;
354
355 /* configure the power management controller to trigger PMU
356 * interrupts when low */
357 pmc_ctrl = readl(pmc + PMC_CTRL);
358 writel(pmc_ctrl | PMC_CTRL_INTR_LOW, pmc + PMC_CTRL);
359
360 /* The regulator details have complete constraints */
361 tegra_get_board_info(&board_info);
362 tegra_get_pmu_board_info(&pmu_board_info);
363 if (pmu_board_info.board_id != BOARD_PMU_PM298) {
364 pr_err("%s(): Board ID is not proper\n", __func__);
365 return -ENODEV;
366 }
367
368 i2c_register_board_info(4, max77663_regulators,
369 ARRAY_SIZE(max77663_regulators));
370
371 return 0;
372}
373
374static struct regulator_consumer_supply fixed_reg_en_track_ldo2_supply[] = {
375 REGULATOR_SUPPLY("avdd_sata", NULL),
376 REGULATOR_SUPPLY("vdd_sata", NULL),
377 REGULATOR_SUPPLY("avdd_sata_pll", NULL),
378 REGULATOR_SUPPLY("avdd_plle", NULL),
379};
380
381static struct regulator_consumer_supply fixed_reg_en_5v0_supply[] = {
382 REGULATOR_SUPPLY("vdd_5v0_sys", NULL),
383 REGULATOR_SUPPLY("vdd_5v0_sby", NULL),
384 REGULATOR_SUPPLY("vdd_hall", NULL),
385 REGULATOR_SUPPLY("vterm_ddr", NULL),
386 REGULATOR_SUPPLY("v2ref_ddr", NULL),
387};
388
389static struct regulator_consumer_supply fixed_reg_en_ddr_supply[] = {
390 REGULATOR_SUPPLY("mem_vddio_ddr", NULL),
391 REGULATOR_SUPPLY("t30_vddio_ddr", NULL),
392};
393
394static struct regulator_consumer_supply fixed_reg_en_3v3_sys_supply[] = {
395 REGULATOR_SUPPLY("avdd_vdac", NULL),
396 REGULATOR_SUPPLY("vdd_lvds", NULL),
397 REGULATOR_SUPPLY("vdd_pnl", NULL),
398 REGULATOR_SUPPLY("vcom_3v3", NULL),
399 REGULATOR_SUPPLY("vdd_3v3", NULL),
400 REGULATOR_SUPPLY("vddio_pex_ctl", NULL),
401 REGULATOR_SUPPLY("pwrdet_pex_ctl", NULL),
402 REGULATOR_SUPPLY("hvdd_pex_pmu", NULL),
403 REGULATOR_SUPPLY("avdd_hdmi", NULL),
404 REGULATOR_SUPPLY("vpp_fuse", NULL),
405 REGULATOR_SUPPLY("avdd_usb", NULL),
406 REGULATOR_SUPPLY("vdd_ddr_rx", NULL),
407 REGULATOR_SUPPLY("vcore_nand", NULL),
408 REGULATOR_SUPPLY("hvdd_sata", NULL),
409 REGULATOR_SUPPLY("vddio_gmi_pmu", NULL),
410 REGULATOR_SUPPLY("pwrdet_nand", NULL),
411 REGULATOR_SUPPLY("avdd_cam1", NULL),
412 REGULATOR_SUPPLY("vdd_af", NULL),
413 REGULATOR_SUPPLY("avdd_cam2", NULL),
414 REGULATOR_SUPPLY("vdd_acc", NULL),
415 REGULATOR_SUPPLY("vdd_phtl", NULL),
416 REGULATOR_SUPPLY("vddio_tp", NULL),
417 REGULATOR_SUPPLY("vdd_led", NULL),
418 REGULATOR_SUPPLY("vddio_cec", NULL),
419 REGULATOR_SUPPLY("vdd_cmps", NULL),
420 REGULATOR_SUPPLY("vdd_temp", NULL),
421 REGULATOR_SUPPLY("vpp_kfuse", NULL),
422 REGULATOR_SUPPLY("vddio_ts", NULL),
423 REGULATOR_SUPPLY("vdd_ir_led", NULL),
424 REGULATOR_SUPPLY("vddio_1wire", NULL),
425 REGULATOR_SUPPLY("avddio_audio", NULL),
426 REGULATOR_SUPPLY("vdd_ec", NULL),
427 REGULATOR_SUPPLY("vcom_pa", NULL),
428 REGULATOR_SUPPLY("vdd_3v3_devices", NULL),
429 REGULATOR_SUPPLY("vdd_3v3_dock", NULL),
430 REGULATOR_SUPPLY("vdd_3v3_edid", NULL),
431 REGULATOR_SUPPLY("vdd_3v3_hdmi_cec", NULL),
432 REGULATOR_SUPPLY("vdd_3v3_gmi", NULL),
433 REGULATOR_SUPPLY("vdd_3v3_spk_amp", NULL),
434 REGULATOR_SUPPLY("vdd_3v3_sensor", NULL),
435 REGULATOR_SUPPLY("vdd_3v3_cam", NULL),
436 REGULATOR_SUPPLY("vdd_3v3_als", NULL),
437 REGULATOR_SUPPLY("debug_cons", NULL),
438 REGULATOR_SUPPLY("vdd", "4-004c"),
439};
440
441/* DIS_5V_SWITCH from AP SPI2_SCK X02 */
442static struct regulator_consumer_supply fixed_reg_dis_5v_switch_supply[] = {
443 REGULATOR_SUPPLY("master_5v_switch", NULL),
444};
445
446/* EN_VDD_BL */
447static struct regulator_consumer_supply fixed_reg_en_vdd_bl_supply[] = {
448 REGULATOR_SUPPLY("vdd_backlight", NULL),
449 REGULATOR_SUPPLY("vdd_backlight1", NULL),
450};
451
452/* EN_3V3_MODEM from AP GPIO VI_VSYNCH D06*/
453static struct regulator_consumer_supply fixed_reg_en_3v3_modem_supply[] = {
454 REGULATOR_SUPPLY("vdd_3v3_mini_card", NULL),
455 REGULATOR_SUPPLY("vdd_mini_card", NULL),
456};
457/* EN_VDD_PNL1 from AP GPIO VI_D6 L04*/
458static struct regulator_consumer_supply fixed_reg_en_vdd_pnl1_supply[] = {
459 REGULATOR_SUPPLY("vdd_lcd_panel", NULL),
460};
461
462/* CAM1_LDO_EN from AP GPIO KB_ROW6 R06*/
463static struct regulator_consumer_supply fixed_reg_cam1_ldo_en_supply[] = {
464 REGULATOR_SUPPLY("vdd_2v8_cam1", NULL),
465 REGULATOR_SUPPLY("vdd", "6-0072"),
466};
467
468/* CAM2_LDO_EN from AP GPIO KB_ROW7 R07*/
469static struct regulator_consumer_supply fixed_reg_cam2_ldo_en_supply[] = {
470 REGULATOR_SUPPLY("vdd_2v8_cam2", NULL),
471 REGULATOR_SUPPLY("vdd", "7-0072"),
472};
473
474/* CAM3_LDO_EN from AP GPIO KB_ROW8 S00*/
475static struct regulator_consumer_supply fixed_reg_cam3_ldo_en_supply[] = {
476 REGULATOR_SUPPLY("vdd_cam3", NULL),
477};
478
479/* EN_VDD_COM from AP GPIO SDMMC3_DAT5 D00*/
480static struct regulator_consumer_supply fixed_reg_en_vdd_com_supply[] = {
481 REGULATOR_SUPPLY("vdd_com_bd", NULL),
482};
483
484/* EN_VDD_SDMMC1 from AP GPIO VI_HSYNC D07*/
485static struct regulator_consumer_supply fixed_reg_en_vdd_sdmmc1_supply[] = {
486 REGULATOR_SUPPLY("vddio_sd_slot", "sdhci-tegra.0"),
487};
488
489/* EN_3V3_EMMC from AP GPIO SDMMC3_DAT4 D01*/
490static struct regulator_consumer_supply fixed_reg_en_3v3_emmc_supply[] = {
491 REGULATOR_SUPPLY("vdd_emmc_core", NULL),
492};
493
494/* EN_3V3_PEX_HVDD from AP GPIO VI_D09 L07*/
495static struct regulator_consumer_supply fixed_reg_en_3v3_pex_hvdd_supply[] = {
496 REGULATOR_SUPPLY("hvdd_pex", NULL),
497};
498
499/* EN_3v3_FUSE from AP GPIO VI_D08 L06*/
500static struct regulator_consumer_supply fixed_reg_en_3v3_fuse_supply[] = {
501 REGULATOR_SUPPLY("vdd_fuse", NULL),
502};
503
504/* EN_1V8_CAM from AP GPIO GPIO_PBB4 PBB04*/
505static struct regulator_consumer_supply fixed_reg_en_1v8_cam_supply[] = {
506 REGULATOR_SUPPLY("vdd_1v8_cam1", NULL),
507 REGULATOR_SUPPLY("vdd_1v8_cam2", NULL),
508 REGULATOR_SUPPLY("vdd_1v8_cam3", NULL),
509 REGULATOR_SUPPLY("vdd_i2c", "6-0072"),
510 REGULATOR_SUPPLY("vdd_i2c", "7-0072"),
511 REGULATOR_SUPPLY("vdd_i2c", "2-0033"),
512};
513
514static struct regulator_consumer_supply fixed_reg_en_vbrtr_supply[] = {
515 REGULATOR_SUPPLY("vdd_vbrtr", NULL),
516};
517
518
519/* EN_USB1_VBUS_OC*/
520static struct regulator_consumer_supply gpio_switch_en_usb1_vbus_oc_supply[] = {
521 REGULATOR_SUPPLY("vdd_vbus_micro_usb", NULL),
522};
523static int gpio_switch_en_usb1_vbus_oc_voltages[] = { 5000};
524
525/*EN_USB3_VBUS_OC*/
526static struct regulator_consumer_supply gpio_switch_en_usb3_vbus_oc_supply[] = {
527 REGULATOR_SUPPLY("vdd_vbus_typea_usb", NULL),
528};
529static int gpio_switch_en_usb3_vbus_oc_voltages[] = { 5000};
530
531/* EN_VDDIO_VID_OC from AP GPIO VI_PCLK T00*/
532static struct regulator_consumer_supply gpio_switch_en_vddio_vid_oc_supply[] = {
533 REGULATOR_SUPPLY("vdd_hdmi_con", NULL),
534};
535static int gpio_switch_en_vddio_vid_oc_voltages[] = { 5000};
536
537
538static int enable_load_switch_rail(
539 struct gpio_switch_regulator_subdev_data *psubdev_data)
540{
541 int ret;
542
543 if (psubdev_data->pin_group <= 0)
544 return -EINVAL;
545
546 /* Tristate and make pin as input*/
547 ret = tegra_pinmux_set_tristate(psubdev_data->pin_group,
548 TEGRA_TRI_TRISTATE);
549 if (ret < 0)
550 return ret;
551 return gpio_direction_input(psubdev_data->gpio_nr);
552}
553
554static int disable_load_switch_rail(
555 struct gpio_switch_regulator_subdev_data *psubdev_data)
556{
557 int ret;
558
559 if (psubdev_data->pin_group <= 0)
560 return -EINVAL;
561
562 /* Un-tristate and driver low */
563 ret = tegra_pinmux_set_tristate(psubdev_data->pin_group,
564 TEGRA_TRI_NORMAL);
565 if (ret < 0)
566 return ret;
567 return gpio_direction_output(psubdev_data->gpio_nr, 0);
568}
569
570/* Macro for defining gpio switch regulator sub device data */
571#define GREG_INIT(_id, _var, _name, _input_supply, _always_on, _boot_on, \
572 _gpio_nr, _active_low, _init_state, _pg, _enable, _disable) \
573 static struct gpio_switch_regulator_subdev_data gpio_pdata_##_var = \
574 { \
575 .regulator_name = "gpio-switch-"#_name, \
576 .input_supply = _input_supply, \
577 .id = _id, \
578 .gpio_nr = _gpio_nr, \
579 .pin_group = _pg, \
580 .active_low = _active_low, \
581 .init_state = _init_state, \
582 .voltages = gpio_switch_##_name##_voltages, \
583 .n_voltages = ARRAY_SIZE(gpio_switch_##_name##_voltages), \
584 .num_consumer_supplies = \
585 ARRAY_SIZE(gpio_switch_##_name##_supply), \
586 .consumer_supplies = gpio_switch_##_name##_supply, \
587 .constraints = { \
588 .valid_modes_mask = (REGULATOR_MODE_NORMAL | \
589 REGULATOR_MODE_STANDBY), \
590 .valid_ops_mask = (REGULATOR_CHANGE_MODE | \
591 REGULATOR_CHANGE_STATUS | \
592 REGULATOR_CHANGE_VOLTAGE), \
593 .always_on = _always_on, \
594 .boot_on = _boot_on, \
595 }, \
596 .enable_rail = _enable, \
597 .disable_rail = _disable, \
598 }; \
599 static struct gpio_switch_regulator_subdev_data \
600 *gpio_pdata_##_var##_list[] = { \
601 &gpio_pdata_##_var, \
602 }; \
603 static struct gpio_switch_regulator_platform_data gs_##_var##_pdata = \
604 { \
605 .num_subdevs = 1, \
606 .subdevs = gpio_pdata_##_var##_list, \
607 }; \
608 static struct platform_device gswitch_reg_##_var##_dev = { \
609 .name = "gpio-switch-regulator", \
610 .id = _id, \
611 .dev = { \
612 .platform_data = &gs_##_var##_pdata, \
613 }, \
614 }
615
616/* Macro for defining fixed regulator sub device data */
617#define FIXED_SUPPLY(_name) "fixed_reg_"#_name
618#define FIXED_REG(_id, _var, _name, _in_supply, _always_on, _boot_on, \
619 _gpio_nr, _active_high, _boot_state, _millivolts) \
620 static struct regulator_init_data ri_data_##_var = \
621 { \
622 .supply_regulator = _in_supply, \
623 .num_consumer_supplies = \
624 ARRAY_SIZE(fixed_reg_##_name##_supply), \
625 .consumer_supplies = fixed_reg_##_name##_supply, \
626 .constraints = { \
627 .valid_modes_mask = (REGULATOR_MODE_NORMAL | \
628 REGULATOR_MODE_STANDBY), \
629 .valid_ops_mask = (REGULATOR_CHANGE_MODE | \
630 REGULATOR_CHANGE_STATUS | \
631 REGULATOR_CHANGE_VOLTAGE), \
632 .always_on = _always_on, \
633 .boot_on = _boot_on, \
634 }, \
635 }; \
636 static struct fixed_voltage_config fixed_reg_##_var##_pdata = \
637 { \
638 .supply_name = FIXED_SUPPLY(_name), \
639 .microvolts = _millivolts * 1000, \
640 .gpio = _gpio_nr, \
641 .enable_high = _active_high, \
642 .enabled_at_boot = _boot_state, \
643 .init_data = &ri_data_##_var, \
644 }; \
645 static struct platform_device fixed_reg_##_var##_dev = { \
646 .name = "reg-fixed-voltage", \
647 .id = _id, \
648 .dev = { \
649 .platform_data = &fixed_reg_##_var##_pdata, \
650 }, \
651 }
652
653/* common to most of boards*/
654FIXED_REG(0, en_track_ldo2, en_track_ldo2, NULL, 0, 0, MAX77663_GPIO_BASE + MAX77663_GPIO0, true, 0, 3300);
655FIXED_REG(1, en_5v0, en_5v0, NULL, 1, 0, MAX77663_GPIO_BASE + MAX77663_GPIO2, true, 1, 5000);
656FIXED_REG(2, en_ddr, en_ddr, NULL, 1, 0, MAX77663_GPIO_BASE + MAX77663_GPIO3, true, 1, 1500);
657FIXED_REG(3, en_3v3_sys, en_3v3_sys, NULL, 1, 0, MAX77663_GPIO_BASE + MAX77663_GPIO1, true, 1, 3300);
658FIXED_REG(4, en_vdd_bl, en_vdd_bl, NULL, 0, 0, TEGRA_GPIO_PK3, true, 1, 5000);
659FIXED_REG(5, en_3v3_modem, en_3v3_modem, NULL, 1, 0, TEGRA_GPIO_PD6, true, 1, 3300);
660FIXED_REG(6, en_vdd_pnl1, en_vdd_pnl1, FIXED_SUPPLY(en_3v3_sys), 0, 0, TEGRA_GPIO_PL4, true, 1, 3300);
661FIXED_REG(7, cam3_ldo_en, cam3_ldo_en, FIXED_SUPPLY(en_3v3_sys), 0, 0, TEGRA_GPIO_PS0, true, 0, 3300);
662FIXED_REG(8, en_vdd_com, en_vdd_com, FIXED_SUPPLY(en_3v3_sys), 1, 0, TEGRA_GPIO_PD0, true, 1, 3300);
663FIXED_REG(9, en_3v3_fuse, en_3v3_fuse, FIXED_SUPPLY(en_3v3_sys), 0, 0, TEGRA_GPIO_PL6, true, 0, 3300);
664FIXED_REG(10, en_3v3_emmc, en_3v3_emmc, FIXED_SUPPLY(en_3v3_sys), 1, 0, TEGRA_GPIO_PD1, true, 1, 3300);
665FIXED_REG(11, en_vdd_sdmmc1, en_vdd_sdmmc1, FIXED_SUPPLY(en_3v3_sys), 0, 0, TEGRA_GPIO_PD7, true, 1, 3300);
666FIXED_REG(12, en_3v3_pex_hvdd, en_3v3_pex_hvdd, FIXED_SUPPLY(en_3v3_sys), 0, 0, TEGRA_GPIO_PL7, true, 0, 3300);
667FIXED_REG(13, en_1v8_cam, en_1v8_cam, max77663_rails(sd2), 0, 0, TEGRA_GPIO_PBB4, true, 0, 1800);
668
669/*Specific to pm269*/
670FIXED_REG(4, en_vdd_bl_pm269, en_vdd_bl, NULL, 0, 0, TEGRA_GPIO_PH3, true, 1, 5000);
671FIXED_REG(6, en_vdd_pnl1_pm269, en_vdd_pnl1, FIXED_SUPPLY(en_3v3_sys), 0, 0, TEGRA_GPIO_PW1, true, 0, 3300);
672FIXED_REG(9, en_3v3_fuse_pm269, en_3v3_fuse, FIXED_SUPPLY(en_3v3_sys), 0, 0, TEGRA_GPIO_PC1, true, 0, 3300);
673FIXED_REG(12, en_3v3_pex_hvdd_pm269, en_3v3_pex_hvdd, FIXED_SUPPLY(en_3v3_sys), 0, 0, TEGRA_GPIO_PC6, true, 0, 3300);
674
675/* Specific to E1187/E1186/E1256 */
676FIXED_REG(14, dis_5v_switch_e118x, dis_5v_switch, FIXED_SUPPLY(en_5v0), 0, 0, TEGRA_GPIO_PX2, false, 0, 5000);
677
678/* E1198/E1291 specific*/
679FIXED_REG(18, cam1_ldo_en, cam1_ldo_en, FIXED_SUPPLY(en_3v3_sys), 0, 0, TEGRA_GPIO_PR6, true, 0, 2800);
680FIXED_REG(19, cam2_ldo_en, cam2_ldo_en, FIXED_SUPPLY(en_3v3_sys), 0, 0, TEGRA_GPIO_PR7, true, 0, 2800);
681FIXED_REG(22, en_vbrtr, en_vbrtr, FIXED_SUPPLY(en_3v3_sys), 0, 0, PMU_TCA6416_GPIO_PORT12, true, 0, 3300);
682
683/**** Open collector Load switches ****/
684/*Specific to pm269*/
685GREG_INIT(17, en_vddio_vid_oc_pm269, en_vddio_vid_oc, "master_5v_switch",
686 0, 0, TEGRA_GPIO_PP2, false, 0, TEGRA_PINGROUP_DAP3_DOUT,
687 enable_load_switch_rail, disable_load_switch_rail);
688
689/* Specific to E1187/E1186/E1256 */
690GREG_INIT(15, en_usb1_vbus_oc_e118x, en_usb1_vbus_oc, "master_5v_switch",
691 0, 0, TEGRA_GPIO_PI4, false, 0, TEGRA_PINGROUP_GMI_RST_N,
692 enable_load_switch_rail, disable_load_switch_rail);
693GREG_INIT(16, en_usb3_vbus_oc_e118x, en_usb3_vbus_oc, "master_5v_switch",
694 0, 0, TEGRA_GPIO_PH7, false, 0, TEGRA_PINGROUP_GMI_AD15,
695 enable_load_switch_rail, disable_load_switch_rail);
696GREG_INIT(17, en_vddio_vid_oc_e118x, en_vddio_vid_oc, "master_5v_switch",
697 0, 0, TEGRA_GPIO_PT0, false, 0, TEGRA_PINGROUP_VI_PCLK,
698 enable_load_switch_rail, disable_load_switch_rail);
699
700/*
701 * Creating the fixed/gpio-switch regulator device tables for different boards
702 */
703#define ADD_FIXED_REG(_name) (&fixed_reg_##_name##_dev)
704#define ADD_GPIO_REG(_name) (&gswitch_reg_##_name##_dev)
705
706#define COMMON_FIXED_REG \
707 ADD_FIXED_REG(en_track_ldo2), \
708 ADD_FIXED_REG(en_5v0), \
709 ADD_FIXED_REG(en_ddr), \
710 ADD_FIXED_REG(en_3v3_sys), \
711 ADD_FIXED_REG(en_3v3_modem), \
712 ADD_FIXED_REG(en_vdd_pnl1), \
713 ADD_FIXED_REG(cam1_ldo_en), \
714 ADD_FIXED_REG(cam2_ldo_en), \
715 ADD_FIXED_REG(cam3_ldo_en), \
716 ADD_FIXED_REG(en_vdd_com), \
717 ADD_FIXED_REG(en_3v3_fuse), \
718 ADD_FIXED_REG(en_3v3_emmc), \
719 ADD_FIXED_REG(en_vdd_sdmmc1), \
720 ADD_FIXED_REG(en_3v3_pex_hvdd), \
721 ADD_FIXED_REG(en_1v8_cam),
722
723#define PM269_FIXED_REG \
724 ADD_FIXED_REG(en_track_ldo2), \
725 ADD_FIXED_REG(en_5v0), \
726 ADD_FIXED_REG(en_ddr), \
727 ADD_FIXED_REG(en_vdd_bl_pm269), \
728 ADD_FIXED_REG(en_3v3_sys), \
729 ADD_FIXED_REG(en_3v3_modem), \
730 ADD_FIXED_REG(en_vdd_pnl1_pm269), \
731 ADD_FIXED_REG(cam1_ldo_en), \
732 ADD_FIXED_REG(cam2_ldo_en), \
733 ADD_FIXED_REG(cam3_ldo_en), \
734 ADD_FIXED_REG(en_vdd_com), \
735 ADD_FIXED_REG(en_3v3_fuse_pm269), \
736 ADD_FIXED_REG(en_3v3_emmc), \
737 ADD_FIXED_REG(en_3v3_pex_hvdd_pm269), \
738 ADD_FIXED_REG(en_1v8_cam), \
739 ADD_FIXED_REG(dis_5v_switch_e118x), \
740 ADD_GPIO_REG(en_usb1_vbus_oc_e118x), \
741 ADD_GPIO_REG(en_usb3_vbus_oc_e118x), \
742 ADD_GPIO_REG(en_vddio_vid_oc_pm269),
743
744#define E118x_FIXED_REG \
745 ADD_FIXED_REG(en_vdd_bl), \
746 ADD_FIXED_REG(dis_5v_switch_e118x), \
747 ADD_FIXED_REG(en_vbrtr), \
748 ADD_GPIO_REG(en_usb1_vbus_oc_e118x), \
749 ADD_GPIO_REG(en_usb3_vbus_oc_e118x), \
750 ADD_GPIO_REG(en_vddio_vid_oc_e118x), \
751
752/* Gpio switch regulator platform data for E1186/E1187/E1256*/
753static struct platform_device *fixed_reg_devs_e118x[] = {
754 COMMON_FIXED_REG
755 E118x_FIXED_REG
756};
757
758/* Gpio switch regulator platform data for PM269*/
759static struct platform_device *fixed_reg_devs_pm269[] = {
760 PM269_FIXED_REG
761};
762
763int __init cardhu_pm298_gpio_switch_regulator_init(void)
764{
765 int i;
766 struct board_info board_info;
767 struct platform_device **fixed_reg_devs;
768 int nfixreg_devs;
769
770 tegra_get_board_info(&board_info);
771
772 switch (board_info.board_id) {
773 case BOARD_PM269:
774 case BOARD_PM305:
775 case BOARD_PM311:
776 case BOARD_E1257:
777 nfixreg_devs = ARRAY_SIZE(fixed_reg_devs_pm269);
778 fixed_reg_devs = fixed_reg_devs_pm269;
779 break;
780
781 default:
782 nfixreg_devs = ARRAY_SIZE(fixed_reg_devs_e118x);
783 fixed_reg_devs = fixed_reg_devs_e118x;
784 break;
785 }
786
787 for (i = 0; i < nfixreg_devs; ++i) {
788 int gpio_nr;
789 if (!strncmp(fixed_reg_devs[i]->name, "gpio", 4)) {
790 struct gpio_switch_regulator_platform_data *gs_pdata =
791 fixed_reg_devs[i]->dev.platform_data;
792 gpio_nr = gs_pdata->subdevs[0]->gpio_nr;
793 } else {
794 struct fixed_voltage_config *fixed_reg_pdata =
795 fixed_reg_devs[i]->dev.platform_data;
796 gpio_nr = fixed_reg_pdata->gpio;
797 }
798
799 if (gpio_nr < TEGRA_NR_GPIOS)
800 tegra_gpio_enable(gpio_nr);
801 }
802 return platform_add_devices(fixed_reg_devs, nfixreg_devs);
803}
generated by cgit v1.2.2 (git 2.25.0) at 2025-07-23 20:57:30 -0400