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Diffstat (limited to 'arch/arm/mach-shmobile/smp-r8a7779.c')
-rw-r--r--arch/arm/mach-shmobile/smp-r8a7779.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/mach-shmobile/smp-r8a7779.c b/arch/arm/mach-shmobile/smp-r8a7779.c
index 9bb7b8575a1..b62e19d4c9a 100644
--- a/arch/arm/mach-shmobile/smp-r8a7779.c
+++ b/arch/arm/mach-shmobile/smp-r8a7779.c
@@ -30,7 +30,7 @@
30#include <asm/smp_twd.h> 30#include <asm/smp_twd.h>
31#include <asm/hardware/gic.h> 31#include <asm/hardware/gic.h>
32 32
33#define AVECR 0xfe700040 33#define AVECR IOMEM(0xfe700040)
34 34
35static struct r8a7779_pm_ch r8a7779_ch_cpu1 = { 35static struct r8a7779_pm_ch r8a7779_ch_cpu1 = {
36 .chan_offs = 0x40, /* PWRSR0 .. PWRER0 */ 36 .chan_offs = 0x40, /* PWRSR0 .. PWRER0 */
@@ -138,7 +138,7 @@ void __init r8a7779_smp_prepare_cpus(void)
138 scu_enable(scu_base_addr()); 138 scu_enable(scu_base_addr());
139 139
140 /* Map the reset vector (in headsmp.S) */ 140 /* Map the reset vector (in headsmp.S) */
141 __raw_writel(__pa(shmobile_secondary_vector), __io(AVECR)); 141 __raw_writel(__pa(shmobile_secondary_vector), AVECR);
142 142
143 /* enable cache coherency on CPU0 */ 143 /* enable cache coherency on CPU0 */
144 modify_scu_cpu_psr(0, 3 << (cpu * 8)); 144 modify_scu_cpu_psr(0, 3 << (cpu * 8));