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Diffstat (limited to 'arch/arm/mach-shmobile/intc-sh7372.c')
-rw-r--r--arch/arm/mach-shmobile/intc-sh7372.c34
1 files changed, 22 insertions, 12 deletions
diff --git a/arch/arm/mach-shmobile/intc-sh7372.c b/arch/arm/mach-shmobile/intc-sh7372.c
index 6447e0af52d..2587a22842f 100644
--- a/arch/arm/mach-shmobile/intc-sh7372.c
+++ b/arch/arm/mach-shmobile/intc-sh7372.c
@@ -19,6 +19,7 @@
19#include <linux/kernel.h> 19#include <linux/kernel.h>
20#include <linux/init.h> 20#include <linux/init.h>
21#include <linux/interrupt.h> 21#include <linux/interrupt.h>
22#include <linux/module.h>
22#include <linux/irq.h> 23#include <linux/irq.h>
23#include <linux/io.h> 24#include <linux/io.h>
24#include <linux/sh_intc.h> 25#include <linux/sh_intc.h>
@@ -305,14 +306,16 @@ static DECLARE_INTC_DESC(intca_desc, "sh7372-intca",
305 intca_mask_registers, intca_prio_registers, 306 intca_mask_registers, intca_prio_registers,
306 NULL); 307 NULL);
307 308
308INTC_IRQ_PINS_32(intca_irq_pins, 0xe6900000, 309INTC_IRQ_PINS_16(intca_irq_pins_lo, 0xe6900000,
309 INTC_VECT, "sh7372-intca-irq-pins"); 310 INTC_VECT, "sh7372-intca-irq-lo");
311
312INTC_IRQ_PINS_16H(intca_irq_pins_hi, 0xe6900000,
313 INTC_VECT, "sh7372-intca-irq-hi");
314
310enum { 315enum {
311 UNUSED_INTCS = 0, 316 UNUSED_INTCS = 0,
312 ENABLED_INTCS, 317 ENABLED_INTCS,
313 318
314 INTCS,
315
316 /* interrupt sources INTCS */ 319 /* interrupt sources INTCS */
317 320
318 /* IRQ0S - IRQ31S */ 321 /* IRQ0S - IRQ31S */
@@ -426,8 +429,6 @@ static struct intc_vect intcs_vectors[] = {
426 INTCS_VECT(CPORTS2R, 0x1a20), 429 INTCS_VECT(CPORTS2R, 0x1a20),
427 /* CEC */ 430 /* CEC */
428 INTCS_VECT(JPU6E, 0x1a80), 431 INTCS_VECT(JPU6E, 0x1a80),
429
430 INTC_VECT(INTCS, 0xf80),
431}; 432};
432 433
433static struct intc_group intcs_groups[] __initdata = { 434static struct intc_group intcs_groups[] __initdata = {
@@ -490,9 +491,6 @@ static struct intc_mask_reg intcs_mask_registers[] = {
490 { 0xffd5019c, 0xffd501dc, 8, /* IMR7SA3 / IMCR7SA3 */ 491 { 0xffd5019c, 0xffd501dc, 8, /* IMR7SA3 / IMCR7SA3 */
491 { MFIS2_INTCS, CPORTS2R, 0, 0, 492 { MFIS2_INTCS, CPORTS2R, 0, 0,
492 JPU6E, 0, 0, 0 } }, 493 JPU6E, 0, 0, 0 } },
493 { 0xffd20104, 0, 16, /* INTAMASK */
494 { 0, 0, 0, 0, 0, 0, 0, 0,
495 0, 0, 0, 0, 0, 0, 0, INTCS } },
496}; 494};
497 495
498/* Priority is needed for INTCA to receive the INTCS interrupt */ 496/* Priority is needed for INTCA to receive the INTCS interrupt */
@@ -557,18 +555,30 @@ static void __iomem *intcs_ffd5;
557void __init sh7372_init_irq(void) 555void __init sh7372_init_irq(void)
558{ 556{
559 void __iomem *intevtsa; 557 void __iomem *intevtsa;
558 int n;
560 559
561 intcs_ffd2 = ioremap_nocache(0xffd20000, PAGE_SIZE); 560 intcs_ffd2 = ioremap_nocache(0xffd20000, PAGE_SIZE);
562 intevtsa = intcs_ffd2 + 0x100; 561 intevtsa = intcs_ffd2 + 0x100;
563 intcs_ffd5 = ioremap_nocache(0xffd50000, PAGE_SIZE); 562 intcs_ffd5 = ioremap_nocache(0xffd50000, PAGE_SIZE);
564 563
565 register_intc_controller(&intca_desc); 564 register_intc_controller(&intca_desc);
566 register_intc_controller(&intca_irq_pins_desc); 565 register_intc_controller(&intca_irq_pins_lo_desc);
566 register_intc_controller(&intca_irq_pins_hi_desc);
567 register_intc_controller(&intcs_desc); 567 register_intc_controller(&intcs_desc);
568 568
569 /* setup dummy cascade chip for INTCS */
570 n = evt2irq(0xf80);
571 irq_alloc_desc_at(n, numa_node_id());
572 irq_set_chip_and_handler_name(n, &dummy_irq_chip,
573 handle_level_irq, "level");
574 set_irq_flags(n, IRQF_VALID); /* yuck */
575
569 /* demux using INTEVTSA */ 576 /* demux using INTEVTSA */
570 irq_set_handler_data(evt2irq(0xf80), (void *)intevtsa); 577 irq_set_handler_data(n, (void *)intevtsa);
571 irq_set_chained_handler(evt2irq(0xf80), intcs_demux); 578 irq_set_chained_handler(n, intcs_demux);
579
580 /* unmask INTCS in INTAMASK */
581 iowrite16(0, intcs_ffd2 + 0x104);
572} 582}
573 583
574static unsigned short ffd2[0x200]; 584static unsigned short ffd2[0x200];