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-rw-r--r--arch/arm/mach-s5pv310/mach-smdkc210.c52
1 files changed, 36 insertions, 16 deletions
diff --git a/arch/arm/mach-s5pv310/mach-smdkc210.c b/arch/arm/mach-s5pv310/mach-smdkc210.c
index 2b8d4fc52d7..2d49273c0a2 100644
--- a/arch/arm/mach-s5pv310/mach-smdkc210.c
+++ b/arch/arm/mach-s5pv310/mach-smdkc210.c
@@ -14,18 +14,21 @@
14#include <linux/platform_device.h> 14#include <linux/platform_device.h>
15#include <linux/smsc911x.h> 15#include <linux/smsc911x.h>
16#include <linux/io.h> 16#include <linux/io.h>
17#include <linux/i2c.h>
17 18
18#include <asm/mach/arch.h> 19#include <asm/mach/arch.h>
19#include <asm/mach-types.h> 20#include <asm/mach-types.h>
20 21
21#include <plat/regs-serial.h> 22#include <plat/regs-serial.h>
23#include <plat/regs-srom.h>
22#include <plat/s5pv310.h> 24#include <plat/s5pv310.h>
23#include <plat/cpu.h> 25#include <plat/cpu.h>
24#include <plat/devs.h> 26#include <plat/devs.h>
25#include <plat/sdhci.h> 27#include <plat/sdhci.h>
28#include <plat/iic.h>
29#include <plat/pd.h>
26 30
27#include <mach/map.h> 31#include <mach/map.h>
28#include <mach/regs-srom.h>
29 32
30/* Following are default values for UCON, ULCON and UFCON UART registers */ 33/* Following are default values for UCON, ULCON and UFCON UART registers */
31#define SMDKC210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ 34#define SMDKC210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
@@ -139,14 +142,29 @@ static struct platform_device smdkc210_smsc911x = {
139 }, 142 },
140}; 143};
141 144
145static struct i2c_board_info i2c_devs1[] __initdata = {
146 {I2C_BOARD_INFO("wm8994", 0x1a),},
147};
148
142static struct platform_device *smdkc210_devices[] __initdata = { 149static struct platform_device *smdkc210_devices[] __initdata = {
143 &s3c_device_hsmmc0, 150 &s3c_device_hsmmc0,
144 &s3c_device_hsmmc1, 151 &s3c_device_hsmmc1,
145 &s3c_device_hsmmc2, 152 &s3c_device_hsmmc2,
146 &s3c_device_hsmmc3, 153 &s3c_device_hsmmc3,
154 &s3c_device_i2c1,
147 &s3c_device_rtc, 155 &s3c_device_rtc,
148 &s3c_device_wdt, 156 &s3c_device_wdt,
157 &s5pv310_device_ac97,
158 &s5pv310_device_i2s0,
159 &s5pv310_device_pd[PD_MFC],
160 &s5pv310_device_pd[PD_G3D],
161 &s5pv310_device_pd[PD_LCD0],
162 &s5pv310_device_pd[PD_LCD1],
163 &s5pv310_device_pd[PD_CAM],
164 &s5pv310_device_pd[PD_TV],
165 &s5pv310_device_pd[PD_GPS],
149 &smdkc210_smsc911x, 166 &smdkc210_smsc911x,
167 &s5pv310_device_sysmmu,
150}; 168};
151 169
152static void __init smdkc210_smsc911x_init(void) 170static void __init smdkc210_smsc911x_init(void)
@@ -154,23 +172,22 @@ static void __init smdkc210_smsc911x_init(void)
154 u32 cs1; 172 u32 cs1;
155 173
156 /* configure nCS1 width to 16 bits */ 174 /* configure nCS1 width to 16 bits */
157 cs1 = __raw_readl(S5PV310_SROM_BW) & 175 cs1 = __raw_readl(S5P_SROM_BW) &
158 ~(S5PV310_SROM_BW__CS_MASK << 176 ~(S5P_SROM_BW__CS_MASK << S5P_SROM_BW__NCS1__SHIFT);
159 S5PV310_SROM_BW__NCS1__SHIFT); 177 cs1 |= ((1 << S5P_SROM_BW__DATAWIDTH__SHIFT) |
160 cs1 |= ((1 << S5PV310_SROM_BW__DATAWIDTH__SHIFT) | 178 (1 << S5P_SROM_BW__WAITENABLE__SHIFT) |
161 (1 << S5PV310_SROM_BW__WAITENABLE__SHIFT) | 179 (1 << S5P_SROM_BW__BYTEENABLE__SHIFT)) <<
162 (1 << S5PV310_SROM_BW__BYTEENABLE__SHIFT)) << 180 S5P_SROM_BW__NCS1__SHIFT;
163 S5PV310_SROM_BW__NCS1__SHIFT; 181 __raw_writel(cs1, S5P_SROM_BW);
164 __raw_writel(cs1, S5PV310_SROM_BW);
165 182
166 /* set timing for nCS1 suitable for ethernet chip */ 183 /* set timing for nCS1 suitable for ethernet chip */
167 __raw_writel((0x1 << S5PV310_SROM_BCX__PMC__SHIFT) | 184 __raw_writel((0x1 << S5P_SROM_BCX__PMC__SHIFT) |
168 (0x9 << S5PV310_SROM_BCX__TACP__SHIFT) | 185 (0x9 << S5P_SROM_BCX__TACP__SHIFT) |
169 (0xc << S5PV310_SROM_BCX__TCAH__SHIFT) | 186 (0xc << S5P_SROM_BCX__TCAH__SHIFT) |
170 (0x1 << S5PV310_SROM_BCX__TCOH__SHIFT) | 187 (0x1 << S5P_SROM_BCX__TCOH__SHIFT) |
171 (0x6 << S5PV310_SROM_BCX__TACC__SHIFT) | 188 (0x6 << S5P_SROM_BCX__TACC__SHIFT) |
172 (0x1 << S5PV310_SROM_BCX__TCOS__SHIFT) | 189 (0x1 << S5P_SROM_BCX__TCOS__SHIFT) |
173 (0x1 << S5PV310_SROM_BCX__TACS__SHIFT), S5PV310_SROM_BC1); 190 (0x1 << S5P_SROM_BCX__TACS__SHIFT), S5P_SROM_BC1);
174} 191}
175 192
176static void __init smdkc210_map_io(void) 193static void __init smdkc210_map_io(void)
@@ -182,6 +199,9 @@ static void __init smdkc210_map_io(void)
182 199
183static void __init smdkc210_machine_init(void) 200static void __init smdkc210_machine_init(void)
184{ 201{
202 s3c_i2c1_set_platdata(NULL);
203 i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
204
185 smdkc210_smsc911x_init(); 205 smdkc210_smsc911x_init();
186 206
187 s3c_sdhci0_set_platdata(&smdkc210_hsmmc0_pdata); 207 s3c_sdhci0_set_platdata(&smdkc210_hsmmc0_pdata);