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-rw-r--r--arch/arm/mach-s5pv210/Kconfig87
-rw-r--r--arch/arm/mach-s5pv210/Makefile2
-rw-r--r--arch/arm/mach-s5pv210/cpu.c29
-rw-r--r--arch/arm/mach-s5pv210/dev-audio.c2
-rw-r--r--arch/arm/mach-s5pv210/dev-onenand.c7
-rw-r--r--arch/arm/mach-s5pv210/dev-spi.c2
-rw-r--r--arch/arm/mach-s5pv210/gpiolib.c14
-rw-r--r--arch/arm/mach-s5pv210/include/mach/gpio.h12
-rw-r--r--arch/arm/mach-s5pv210/include/mach/irqs.h4
-rw-r--r--arch/arm/mach-s5pv210/include/mach/map.h16
-rw-r--r--arch/arm/mach-s5pv210/include/mach/memory.h9
-rw-r--r--arch/arm/mach-s5pv210/include/mach/regs-clock.h2
-rw-r--r--arch/arm/mach-s5pv210/include/mach/system.h7
-rw-r--r--arch/arm/mach-s5pv210/mach-aquila.c417
-rw-r--r--arch/arm/mach-s5pv210/mach-goni.c437
-rw-r--r--arch/arm/mach-s5pv210/mach-smdkc110.c66
-rw-r--r--arch/arm/mach-s5pv210/mach-smdkv210.c93
-rw-r--r--arch/arm/mach-s5pv210/setup-fb-24bpp.c2
-rw-r--r--arch/arm/mach-s5pv210/setup-i2c0.c2
-rw-r--r--arch/arm/mach-s5pv210/setup-i2c1.c2
-rw-r--r--arch/arm/mach-s5pv210/setup-i2c2.c2
-rw-r--r--arch/arm/mach-s5pv210/setup-ide.c50
-rw-r--r--arch/arm/mach-s5pv210/setup-keypad.c34
-rw-r--r--arch/arm/mach-s5pv210/setup-sdhci-gpio.c47
-rw-r--r--arch/arm/mach-s5pv210/setup-sdhci.c4
25 files changed, 1234 insertions, 115 deletions
diff --git a/arch/arm/mach-s5pv210/Kconfig b/arch/arm/mach-s5pv210/Kconfig
index 0761eac9aae..d3a38955c74 100644
--- a/arch/arm/mach-s5pv210/Kconfig
+++ b/arch/arm/mach-s5pv210/Kconfig
@@ -27,11 +27,21 @@ config S5PV210_SETUP_I2C2
27 help 27 help
28 Common setup code for i2c bus 2. 28 Common setup code for i2c bus 2.
29 29
30config S5PV210_SETUP_IDE
31 bool
32 help
33 Common setup code for S5PV210 IDE GPIO configurations
34
30config S5PV210_SETUP_FB_24BPP 35config S5PV210_SETUP_FB_24BPP
31 bool 36 bool
32 help 37 help
33 Common setup code for S5PV210 with an 24bpp RGB display helper. 38 Common setup code for S5PV210 with an 24bpp RGB display helper.
34 39
40config S5PV210_SETUP_KEYPAD
41 bool
42 help
43 Common setup code for keypad.
44
35config S5PV210_SETUP_SDHCI 45config S5PV210_SETUP_SDHCI
36 bool 46 bool
37 select S5PV210_SETUP_SDHCI_GPIO 47 select S5PV210_SETUP_SDHCI_GPIO
@@ -43,14 +53,27 @@ config S5PV210_SETUP_SDHCI_GPIO
43 help 53 help
44 Common setup code for SDHCI gpio. 54 Common setup code for SDHCI gpio.
45 55
46# machine support 56config S5PC110_DEV_ONENAND
57 bool
58 help
59 Compile in platform device definition for OneNAND1 controller
60
61menu "S5PC110 Machines"
47 62
48config MACH_AQUILA 63config MACH_AQUILA
49 bool "Samsung Aquila" 64 bool "Aquila"
50 select CPU_S5PV210 65 select CPU_S5PV210
51 select ARCH_SPARSEMEM_ENABLE 66 select ARCH_SPARSEMEM_ENABLE
52 select S5PV210_SETUP_FB_24BPP
53 select S3C_DEV_FB 67 select S3C_DEV_FB
68 select S5P_DEV_FIMC0
69 select S5P_DEV_FIMC1
70 select S5P_DEV_FIMC2
71 select S3C_DEV_HSMMC
72 select S3C_DEV_HSMMC1
73 select S3C_DEV_HSMMC2
74 select S5PC110_DEV_ONENAND
75 select S5PV210_SETUP_FB_24BPP
76 select S5PV210_SETUP_SDHCI
54 help 77 help
55 Machine support for the Samsung Aquila target based on S5PC110 SoC 78 Machine support for the Samsung Aquila target based on S5PC110 SoC
56 79
@@ -58,34 +81,64 @@ config MACH_GONI
58 bool "GONI" 81 bool "GONI"
59 select CPU_S5PV210 82 select CPU_S5PV210
60 select ARCH_SPARSEMEM_ENABLE 83 select ARCH_SPARSEMEM_ENABLE
84 select S3C_DEV_FB
85 select S5P_DEV_FIMC0
86 select S5P_DEV_FIMC1
87 select S5P_DEV_FIMC2
88 select S3C_DEV_HSMMC
89 select S3C_DEV_HSMMC1
90 select S3C_DEV_HSMMC2
91 select S5PC110_DEV_ONENAND
92 select S5PV210_SETUP_FB_24BPP
93 select S5PV210_SETUP_SDHCI
61 help 94 help
62 Machine support for Samsung GONI board 95 Machine support for Samsung GONI board
63 S5PC110(MCP) is one of package option of S5PV210 96 S5PC110(MCP) is one of package option of S5PV210
64 97
65config S5PC110_DEV_ONENAND 98config MACH_SMDKC110
66 bool 99 bool "SMDKC110"
100 select CPU_S5PV210
101 select ARCH_SPARSEMEM_ENABLE
102 select S3C_DEV_I2C1
103 select S3C_DEV_I2C2
104 select S3C_DEV_RTC
105 select S3C_DEV_WDT
106 select SAMSUNG_DEV_IDE
107 select S5PV210_SETUP_I2C1
108 select S5PV210_SETUP_I2C2
109 select S5PV210_SETUP_IDE
67 help 110 help
68 Compile in platform device definition for OneNAND1 controller 111 Machine support for Samsung SMDKC110
112 S5PC110(MCP) is one of package option of S5PV210
113
114endmenu
115
116menu "S5PV210 Machines"
69 117
70config MACH_SMDKV210 118config MACH_SMDKV210
71 bool "SMDKV210" 119 bool "SMDKV210"
72 select CPU_S5PV210 120 select CPU_S5PV210
73 select ARCH_SPARSEMEM_ENABLE 121 select ARCH_SPARSEMEM_ENABLE
122 select S3C_DEV_HSMMC
123 select S3C_DEV_HSMMC1
124 select S3C_DEV_HSMMC2
125 select S3C_DEV_HSMMC3
126 select S3C_DEV_I2C1
127 select S3C_DEV_I2C2
128 select S3C_DEV_RTC
129 select S3C_DEV_WDT
74 select SAMSUNG_DEV_ADC 130 select SAMSUNG_DEV_ADC
131 select SAMSUNG_DEV_IDE
132 select SAMSUNG_DEV_KEYPAD
75 select SAMSUNG_DEV_TS 133 select SAMSUNG_DEV_TS
76 select S3C_DEV_WDT 134 select S5PV210_SETUP_I2C1
77 select HAVE_S3C2410_WATCHDOG 135 select S5PV210_SETUP_I2C2
136 select S5PV210_SETUP_IDE
137 select S5PV210_SETUP_KEYPAD
138 select S5PV210_SETUP_SDHCI
78 help 139 help
79 Machine support for Samsung SMDKV210 140 Machine support for Samsung SMDKV210
80 141
81config MACH_SMDKC110 142endmenu
82 bool "SMDKC110"
83 select CPU_S5PV210
84 select ARCH_SPARSEMEM_ENABLE
85 select S3C_DEV_WDT
86 select HAVE_S3C2410_WATCHDOG
87 help
88 Machine support for Samsung SMDKC110
89 S5PC110(MCP) is one of package option of S5PV210
90 143
91endif 144endif
diff --git a/arch/arm/mach-s5pv210/Makefile b/arch/arm/mach-s5pv210/Makefile
index 30be9a6a462..05048c5aa4c 100644
--- a/arch/arm/mach-s5pv210/Makefile
+++ b/arch/arm/mach-s5pv210/Makefile
@@ -31,5 +31,7 @@ obj-$(CONFIG_S5PC110_DEV_ONENAND) += dev-onenand.o
31obj-$(CONFIG_S5PV210_SETUP_FB_24BPP) += setup-fb-24bpp.o 31obj-$(CONFIG_S5PV210_SETUP_FB_24BPP) += setup-fb-24bpp.o
32obj-$(CONFIG_S5PV210_SETUP_I2C1) += setup-i2c1.o 32obj-$(CONFIG_S5PV210_SETUP_I2C1) += setup-i2c1.o
33obj-$(CONFIG_S5PV210_SETUP_I2C2) += setup-i2c2.o 33obj-$(CONFIG_S5PV210_SETUP_I2C2) += setup-i2c2.o
34obj-$(CONFIG_S5PV210_SETUP_IDE) += setup-ide.o
35obj-$(CONFIG_S5PV210_SETUP_KEYPAD) += setup-keypad.o
34obj-$(CONFIG_S5PV210_SETUP_SDHCI) += setup-sdhci.o 36obj-$(CONFIG_S5PV210_SETUP_SDHCI) += setup-sdhci.o
35obj-$(CONFIG_S5PV210_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o 37obj-$(CONFIG_S5PV210_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o
diff --git a/arch/arm/mach-s5pv210/cpu.c b/arch/arm/mach-s5pv210/cpu.c
index ffd8b17c363..b9f4d677cf5 100644
--- a/arch/arm/mach-s5pv210/cpu.c
+++ b/arch/arm/mach-s5pv210/cpu.c
@@ -33,8 +33,13 @@
33#include <plat/clock.h> 33#include <plat/clock.h>
34#include <plat/fb-core.h> 34#include <plat/fb-core.h>
35#include <plat/s5pv210.h> 35#include <plat/s5pv210.h>
36#include <plat/adc-core.h>
37#include <plat/ata-core.h>
38#include <plat/fimc-core.h>
36#include <plat/iic-core.h> 39#include <plat/iic-core.h>
40#include <plat/keypad-core.h>
37#include <plat/sdhci.h> 41#include <plat/sdhci.h>
42#include <plat/reset.h>
38 43
39/* Initial IO mappings */ 44/* Initial IO mappings */
40 45
@@ -70,6 +75,11 @@ static void s5pv210_idle(void)
70 local_irq_enable(); 75 local_irq_enable();
71} 76}
72 77
78static void s5pv210_sw_reset(void)
79{
80 __raw_writel(0x1, S5P_SWRESET);
81}
82
73/* s5pv210_map_io 83/* s5pv210_map_io
74 * 84 *
75 * register the standard cpu IO areas 85 * register the standard cpu IO areas
@@ -77,16 +87,21 @@ static void s5pv210_idle(void)
77 87
78void __init s5pv210_map_io(void) 88void __init s5pv210_map_io(void)
79{ 89{
80#ifdef CONFIG_S3C_DEV_ADC
81 s3c_device_adc.name = "s3c64xx-adc";
82#endif
83
84 iotable_init(s5pv210_iodesc, ARRAY_SIZE(s5pv210_iodesc)); 90 iotable_init(s5pv210_iodesc, ARRAY_SIZE(s5pv210_iodesc));
85 91
86 /* initialise device information early */ 92 /* initialise device information early */
87 s5pv210_default_sdhci0(); 93 s5pv210_default_sdhci0();
88 s5pv210_default_sdhci1(); 94 s5pv210_default_sdhci1();
89 s5pv210_default_sdhci2(); 95 s5pv210_default_sdhci2();
96 s5pv210_default_sdhci3();
97
98 s3c_adc_setname("s3c64xx-adc");
99
100 s3c_cfcon_setname("s5pv210-pata");
101
102 s3c_fimc_setname(0, "s5pv210-fimc");
103 s3c_fimc_setname(1, "s5pv210-fimc");
104 s3c_fimc_setname(2, "s5pv210-fimc");
90 105
91 /* the i2c devices are directly compatible with s3c2440 */ 106 /* the i2c devices are directly compatible with s3c2440 */
92 s3c_i2c0_setname("s3c2440-i2c"); 107 s3c_i2c0_setname("s3c2440-i2c");
@@ -94,6 +109,9 @@ void __init s5pv210_map_io(void)
94 s3c_i2c2_setname("s3c2440-i2c"); 109 s3c_i2c2_setname("s3c2440-i2c");
95 110
96 s3c_fb_setname("s5pv210-fb"); 111 s3c_fb_setname("s5pv210-fb");
112
113 /* Use s5pv210-keypad instead of samsung-keypad */
114 samsung_keypad_setname("s5pv210-keypad");
97} 115}
98 116
99void __init s5pv210_init_clocks(int xtal) 117void __init s5pv210_init_clocks(int xtal)
@@ -141,5 +159,8 @@ int __init s5pv210_init(void)
141 /* set idle function */ 159 /* set idle function */
142 pm_idle = s5pv210_idle; 160 pm_idle = s5pv210_idle;
143 161
162 /* set sw_reset function */
163 s5p_reset_hook = s5pv210_sw_reset;
164
144 return sysdev_register(&s5pv210_sysdev); 165 return sysdev_register(&s5pv210_sysdev);
145} 166}
diff --git a/arch/arm/mach-s5pv210/dev-audio.c b/arch/arm/mach-s5pv210/dev-audio.c
index 6e215330a1b..21dc6cf955c 100644
--- a/arch/arm/mach-s5pv210/dev-audio.c
+++ b/arch/arm/mach-s5pv210/dev-audio.c
@@ -10,11 +10,11 @@
10 10
11#include <linux/platform_device.h> 11#include <linux/platform_device.h>
12#include <linux/dma-mapping.h> 12#include <linux/dma-mapping.h>
13#include <linux/gpio.h>
13 14
14#include <plat/gpio-cfg.h> 15#include <plat/gpio-cfg.h>
15#include <plat/audio.h> 16#include <plat/audio.h>
16 17
17#include <mach/gpio.h>
18#include <mach/map.h> 18#include <mach/map.h>
19#include <mach/dma.h> 19#include <mach/dma.h>
20#include <mach/irqs.h> 20#include <mach/irqs.h>
diff --git a/arch/arm/mach-s5pv210/dev-onenand.c b/arch/arm/mach-s5pv210/dev-onenand.c
index 34997b752f9..f8ede33ee82 100644
--- a/arch/arm/mach-s5pv210/dev-onenand.c
+++ b/arch/arm/mach-s5pv210/dev-onenand.c
@@ -27,9 +27,14 @@ static struct resource s5pc110_onenand_resources[] = {
27 }, 27 },
28 [1] = { 28 [1] = {
29 .start = S5PC110_PA_ONENAND_DMA, 29 .start = S5PC110_PA_ONENAND_DMA,
30 .end = S5PC110_PA_ONENAND_DMA + SZ_2K - 1, 30 .end = S5PC110_PA_ONENAND_DMA + SZ_8K - 1,
31 .flags = IORESOURCE_MEM, 31 .flags = IORESOURCE_MEM,
32 }, 32 },
33 [2] = {
34 .start = IRQ_ONENAND_AUDI,
35 .end = IRQ_ONENAND_AUDI,
36 .flags = IORESOURCE_IRQ,
37 },
33}; 38};
34 39
35struct platform_device s5pc110_device_onenand = { 40struct platform_device s5pc110_device_onenand = {
diff --git a/arch/arm/mach-s5pv210/dev-spi.c b/arch/arm/mach-s5pv210/dev-spi.c
index 337a62b57a0..826cdbc43e2 100644
--- a/arch/arm/mach-s5pv210/dev-spi.c
+++ b/arch/arm/mach-s5pv210/dev-spi.c
@@ -10,11 +10,11 @@
10 10
11#include <linux/platform_device.h> 11#include <linux/platform_device.h>
12#include <linux/dma-mapping.h> 12#include <linux/dma-mapping.h>
13#include <linux/gpio.h>
13 14
14#include <mach/dma.h> 15#include <mach/dma.h>
15#include <mach/map.h> 16#include <mach/map.h>
16#include <mach/irqs.h> 17#include <mach/irqs.h>
17#include <mach/gpio.h>
18#include <mach/spi-clocks.h> 18#include <mach/spi-clocks.h>
19 19
20#include <plat/s3c64xx-spi.h> 20#include <plat/s3c64xx-spi.h>
diff --git a/arch/arm/mach-s5pv210/gpiolib.c b/arch/arm/mach-s5pv210/gpiolib.c
index 9ea8972e023..0d459112d03 100644
--- a/arch/arm/mach-s5pv210/gpiolib.c
+++ b/arch/arm/mach-s5pv210/gpiolib.c
@@ -207,6 +207,20 @@ static struct s3c_gpio_chip s5pv210_gpio_4bit[] = {
207 .label = "MP03", 207 .label = "MP03",
208 }, 208 },
209 }, { 209 }, {
210 .config = &gpio_cfg_noint,
211 .chip = {
212 .base = S5PV210_MP04(0),
213 .ngpio = S5PV210_GPIO_MP04_NR,
214 .label = "MP04",
215 },
216 }, {
217 .config = &gpio_cfg_noint,
218 .chip = {
219 .base = S5PV210_MP05(0),
220 .ngpio = S5PV210_GPIO_MP05_NR,
221 .label = "MP05",
222 },
223 }, {
210 .base = (S5P_VA_GPIO + 0xC00), 224 .base = (S5P_VA_GPIO + 0xC00),
211 .config = &gpio_cfg_noint, 225 .config = &gpio_cfg_noint,
212 .chip = { 226 .chip = {
diff --git a/arch/arm/mach-s5pv210/include/mach/gpio.h b/arch/arm/mach-s5pv210/include/mach/gpio.h
index d6461ba2b71..1f4b595534c 100644
--- a/arch/arm/mach-s5pv210/include/mach/gpio.h
+++ b/arch/arm/mach-s5pv210/include/mach/gpio.h
@@ -52,6 +52,8 @@
52#define S5PV210_GPIO_MP01_NR (8) 52#define S5PV210_GPIO_MP01_NR (8)
53#define S5PV210_GPIO_MP02_NR (4) 53#define S5PV210_GPIO_MP02_NR (4)
54#define S5PV210_GPIO_MP03_NR (8) 54#define S5PV210_GPIO_MP03_NR (8)
55#define S5PV210_GPIO_MP04_NR (8)
56#define S5PV210_GPIO_MP05_NR (8)
55 57
56/* GPIO bank numbers */ 58/* GPIO bank numbers */
57 59
@@ -94,6 +96,8 @@ enum s5p_gpio_number {
94 S5PV210_GPIO_MP01_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_J4), 96 S5PV210_GPIO_MP01_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_J4),
95 S5PV210_GPIO_MP02_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_MP01), 97 S5PV210_GPIO_MP02_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_MP01),
96 S5PV210_GPIO_MP03_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_MP02), 98 S5PV210_GPIO_MP03_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_MP02),
99 S5PV210_GPIO_MP04_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_MP03),
100 S5PV210_GPIO_MP05_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_MP04),
97}; 101};
98 102
99/* S5PV210 GPIO number definitions */ 103/* S5PV210 GPIO number definitions */
@@ -127,13 +131,15 @@ enum s5p_gpio_number {
127#define S5PV210_MP01(_nr) (S5PV210_GPIO_MP01_START + (_nr)) 131#define S5PV210_MP01(_nr) (S5PV210_GPIO_MP01_START + (_nr))
128#define S5PV210_MP02(_nr) (S5PV210_GPIO_MP02_START + (_nr)) 132#define S5PV210_MP02(_nr) (S5PV210_GPIO_MP02_START + (_nr))
129#define S5PV210_MP03(_nr) (S5PV210_GPIO_MP03_START + (_nr)) 133#define S5PV210_MP03(_nr) (S5PV210_GPIO_MP03_START + (_nr))
134#define S5PV210_MP04(_nr) (S5PV210_GPIO_MP04_START + (_nr))
135#define S5PV210_MP05(_nr) (S5PV210_GPIO_MP05_START + (_nr))
130 136
131/* the end of the S5PV210 specific gpios */ 137/* the end of the S5PV210 specific gpios */
132#define S5PV210_GPIO_END (S5PV210_MP03(S5PV210_GPIO_MP03_NR) + 1) 138#define S5PV210_GPIO_END (S5PV210_MP05(S5PV210_GPIO_MP05_NR) + 1)
133#define S3C_GPIO_END S5PV210_GPIO_END 139#define S3C_GPIO_END S5PV210_GPIO_END
134 140
135/* define the number of gpios we need to the one after the MP03() range */ 141/* define the number of gpios we need to the one after the MP05() range */
136#define ARCH_NR_GPIOS (S5PV210_MP03(S5PV210_GPIO_MP03_NR) + \ 142#define ARCH_NR_GPIOS (S5PV210_MP05(S5PV210_GPIO_MP05_NR) + \
137 CONFIG_SAMSUNG_GPIO_EXTRA + 1) 143 CONFIG_SAMSUNG_GPIO_EXTRA + 1)
138 144
139#include <asm-generic/gpio.h> 145#include <asm-generic/gpio.h>
diff --git a/arch/arm/mach-s5pv210/include/mach/irqs.h b/arch/arm/mach-s5pv210/include/mach/irqs.h
index 96895378ea2..e1c020e5a49 100644
--- a/arch/arm/mach-s5pv210/include/mach/irqs.h
+++ b/arch/arm/mach-s5pv210/include/mach/irqs.h
@@ -36,7 +36,7 @@
36 36
37/* VIC1: ARM, Power, Memory, Connectivity, Storage */ 37/* VIC1: ARM, Power, Memory, Connectivity, Storage */
38 38
39#define IRQ_CORTEX0 S5P_IRQ_VIC1(0) 39#define IRQ_PMU S5P_IRQ_VIC1(0)
40#define IRQ_CORTEX1 S5P_IRQ_VIC1(1) 40#define IRQ_CORTEX1 S5P_IRQ_VIC1(1)
41#define IRQ_CORTEX2 S5P_IRQ_VIC1(2) 41#define IRQ_CORTEX2 S5P_IRQ_VIC1(2)
42#define IRQ_CORTEX3 S5P_IRQ_VIC1(3) 42#define IRQ_CORTEX3 S5P_IRQ_VIC1(3)
@@ -45,7 +45,7 @@
45#define IRQ_IEMIEC S5P_IRQ_VIC1(6) 45#define IRQ_IEMIEC S5P_IRQ_VIC1(6)
46#define IRQ_ONENAND S5P_IRQ_VIC1(7) 46#define IRQ_ONENAND S5P_IRQ_VIC1(7)
47#define IRQ_NFC S5P_IRQ_VIC1(8) 47#define IRQ_NFC S5P_IRQ_VIC1(8)
48#define IRQ_CFC S5P_IRQ_VIC1(9) 48#define IRQ_CFCON S5P_IRQ_VIC1(9)
49#define IRQ_UART0 S5P_IRQ_VIC1(10) 49#define IRQ_UART0 S5P_IRQ_VIC1(10)
50#define IRQ_UART1 S5P_IRQ_VIC1(11) 50#define IRQ_UART1 S5P_IRQ_VIC1(11)
51#define IRQ_UART2 S5P_IRQ_VIC1(12) 51#define IRQ_UART2 S5P_IRQ_VIC1(12)
diff --git a/arch/arm/mach-s5pv210/include/mach/map.h b/arch/arm/mach-s5pv210/include/mach/map.h
index 34eb168ec95..dd4fb6bf14b 100644
--- a/arch/arm/mach-s5pv210/include/mach/map.h
+++ b/arch/arm/mach-s5pv210/include/mach/map.h
@@ -32,6 +32,8 @@
32#define S5PV210_PA_SPI0 0xE1300000 32#define S5PV210_PA_SPI0 0xE1300000
33#define S5PV210_PA_SPI1 0xE1400000 33#define S5PV210_PA_SPI1 0xE1400000
34 34
35#define S5PV210_PA_KEYPAD (0xE1600000)
36
35#define S5PV210_PA_IIC0 (0xE1800000) 37#define S5PV210_PA_IIC0 (0xE1800000)
36#define S5PV210_PA_IIC1 (0xFAB00000) 38#define S5PV210_PA_IIC1 (0xFAB00000)
37#define S5PV210_PA_IIC2 (0xE1A00000) 39#define S5PV210_PA_IIC2 (0xE1A00000)
@@ -43,6 +45,7 @@
43 45
44#define S5PV210_PA_WATCHDOG (0xE2700000) 46#define S5PV210_PA_WATCHDOG (0xE2700000)
45 47
48#define S5PV210_PA_RTC (0xE2800000)
46#define S5PV210_PA_UART (0xE2900000) 49#define S5PV210_PA_UART (0xE2900000)
47 50
48#define S5P_PA_UART0 (S5PV210_PA_UART + 0x0) 51#define S5P_PA_UART0 (S5PV210_PA_UART + 0x0)
@@ -54,12 +57,18 @@
54 57
55#define S5PV210_PA_SROMC (0xE8000000) 58#define S5PV210_PA_SROMC (0xE8000000)
56 59
60#define S5PV210_PA_CFCON (0xE8200000)
61
57#define S5PV210_PA_MDMA 0xFA200000 62#define S5PV210_PA_MDMA 0xFA200000
58#define S5PV210_PA_PDMA0 0xE0900000 63#define S5PV210_PA_PDMA0 0xE0900000
59#define S5PV210_PA_PDMA1 0xE0A00000 64#define S5PV210_PA_PDMA1 0xE0A00000
60 65
61#define S5PV210_PA_FB (0xF8000000) 66#define S5PV210_PA_FB (0xF8000000)
62 67
68#define S5PV210_PA_FIMC0 (0xFB200000)
69#define S5PV210_PA_FIMC1 (0xFB300000)
70#define S5PV210_PA_FIMC2 (0xFB400000)
71
63#define S5PV210_PA_HSMMC(x) (0xEB000000 + ((x) * 0x100000)) 72#define S5PV210_PA_HSMMC(x) (0xEB000000 + ((x) * 0x100000))
64 73
65#define S5PV210_PA_VIC0 (0xF2000000) 74#define S5PV210_PA_VIC0 (0xF2000000)
@@ -97,12 +106,19 @@
97#define S3C_PA_HSMMC0 S5PV210_PA_HSMMC(0) 106#define S3C_PA_HSMMC0 S5PV210_PA_HSMMC(0)
98#define S3C_PA_HSMMC1 S5PV210_PA_HSMMC(1) 107#define S3C_PA_HSMMC1 S5PV210_PA_HSMMC(1)
99#define S3C_PA_HSMMC2 S5PV210_PA_HSMMC(2) 108#define S3C_PA_HSMMC2 S5PV210_PA_HSMMC(2)
109#define S3C_PA_HSMMC3 S5PV210_PA_HSMMC(3)
100#define S3C_PA_IIC S5PV210_PA_IIC0 110#define S3C_PA_IIC S5PV210_PA_IIC0
101#define S3C_PA_IIC1 S5PV210_PA_IIC1 111#define S3C_PA_IIC1 S5PV210_PA_IIC1
102#define S3C_PA_IIC2 S5PV210_PA_IIC2 112#define S3C_PA_IIC2 S5PV210_PA_IIC2
103#define S3C_PA_FB S5PV210_PA_FB 113#define S3C_PA_FB S5PV210_PA_FB
114#define S3C_PA_RTC S5PV210_PA_RTC
104#define S3C_PA_WDT S5PV210_PA_WATCHDOG 115#define S3C_PA_WDT S5PV210_PA_WATCHDOG
116#define S5P_PA_FIMC0 S5PV210_PA_FIMC0
117#define S5P_PA_FIMC1 S5PV210_PA_FIMC1
118#define S5P_PA_FIMC2 S5PV210_PA_FIMC2
105 119
106#define SAMSUNG_PA_ADC S5PV210_PA_ADC 120#define SAMSUNG_PA_ADC S5PV210_PA_ADC
121#define SAMSUNG_PA_CFCON S5PV210_PA_CFCON
122#define SAMSUNG_PA_KEYPAD S5PV210_PA_KEYPAD
107 123
108#endif /* __ASM_ARCH_MAP_H */ 124#endif /* __ASM_ARCH_MAP_H */
diff --git a/arch/arm/mach-s5pv210/include/mach/memory.h b/arch/arm/mach-s5pv210/include/mach/memory.h
index 379117e2760..d503e0c4ce4 100644
--- a/arch/arm/mach-s5pv210/include/mach/memory.h
+++ b/arch/arm/mach-s5pv210/include/mach/memory.h
@@ -16,8 +16,13 @@
16#define PHYS_OFFSET UL(0x20000000) 16#define PHYS_OFFSET UL(0x20000000)
17#define CONSISTENT_DMA_SIZE (SZ_8M + SZ_4M + SZ_2M) 17#define CONSISTENT_DMA_SIZE (SZ_8M + SZ_4M + SZ_2M)
18 18
19/* Maximum of 256MiB in one bank */ 19/*
20#define MAX_PHYSMEM_BITS 32 20 * Sparsemem support
21 * Physical memory can be located from 0x20000000 to 0x7fffffff,
22 * so MAX_PHYSMEM_BITS is 31.
23 */
24
25#define MAX_PHYSMEM_BITS 31
21#define SECTION_SIZE_BITS 28 26#define SECTION_SIZE_BITS 28
22 27
23#endif /* __ASM_ARCH_MEMORY_H */ 28#endif /* __ASM_ARCH_MEMORY_H */
diff --git a/arch/arm/mach-s5pv210/include/mach/regs-clock.h b/arch/arm/mach-s5pv210/include/mach/regs-clock.h
index 2a25ab40c86..499aef73747 100644
--- a/arch/arm/mach-s5pv210/include/mach/regs-clock.h
+++ b/arch/arm/mach-s5pv210/include/mach/regs-clock.h
@@ -90,6 +90,8 @@
90#define S5P_CLKDIV0_PCLK66_SHIFT (28) 90#define S5P_CLKDIV0_PCLK66_SHIFT (28)
91#define S5P_CLKDIV0_PCLK66_MASK (0x7 << S5P_CLKDIV0_PCLK66_SHIFT) 91#define S5P_CLKDIV0_PCLK66_MASK (0x7 << S5P_CLKDIV0_PCLK66_SHIFT)
92 92
93#define S5P_SWRESET S5P_CLKREG(0x2000)
94
93/* Registers related to power management */ 95/* Registers related to power management */
94#define S5P_PWR_CFG S5P_CLKREG(0xC000) 96#define S5P_PWR_CFG S5P_CLKREG(0xC000)
95#define S5P_EINT_WAKEUP_MASK S5P_CLKREG(0xC004) 97#define S5P_EINT_WAKEUP_MASK S5P_CLKREG(0xC004)
diff --git a/arch/arm/mach-s5pv210/include/mach/system.h b/arch/arm/mach-s5pv210/include/mach/system.h
index 1ca04d5025b..af8a200b213 100644
--- a/arch/arm/mach-s5pv210/include/mach/system.h
+++ b/arch/arm/mach-s5pv210/include/mach/system.h
@@ -13,12 +13,9 @@
13#ifndef __ASM_ARCH_SYSTEM_H 13#ifndef __ASM_ARCH_SYSTEM_H
14#define __ASM_ARCH_SYSTEM_H __FILE__ 14#define __ASM_ARCH_SYSTEM_H __FILE__
15 15
16static void arch_idle(void) 16#include <plat/system-reset.h>
17{
18 /* nothing here yet */
19}
20 17
21static void arch_reset(char mode, const char *cmd) 18static void arch_idle(void)
22{ 19{
23 /* nothing here yet */ 20 /* nothing here yet */
24} 21}
diff --git a/arch/arm/mach-s5pv210/mach-aquila.c b/arch/arm/mach-s5pv210/mach-aquila.c
index 881fe89eefd..0dda8012d6b 100644
--- a/arch/arm/mach-s5pv210/mach-aquila.c
+++ b/arch/arm/mach-s5pv210/mach-aquila.c
@@ -13,6 +13,12 @@
13#include <linux/init.h> 13#include <linux/init.h>
14#include <linux/serial_core.h> 14#include <linux/serial_core.h>
15#include <linux/fb.h> 15#include <linux/fb.h>
16#include <linux/i2c.h>
17#include <linux/i2c-gpio.h>
18#include <linux/mfd/max8998.h>
19#include <linux/gpio_keys.h>
20#include <linux/input.h>
21#include <linux/gpio.h>
16 22
17#include <asm/mach/arch.h> 23#include <asm/mach/arch.h>
18#include <asm/mach/map.h> 24#include <asm/mach/map.h>
@@ -23,54 +29,63 @@
23#include <mach/regs-clock.h> 29#include <mach/regs-clock.h>
24#include <mach/regs-fb.h> 30#include <mach/regs-fb.h>
25 31
32#include <plat/gpio-cfg.h>
26#include <plat/regs-serial.h> 33#include <plat/regs-serial.h>
27#include <plat/s5pv210.h> 34#include <plat/s5pv210.h>
28#include <plat/devs.h> 35#include <plat/devs.h>
29#include <plat/cpu.h> 36#include <plat/cpu.h>
30#include <plat/fb.h> 37#include <plat/fb.h>
38#include <plat/fimc-core.h>
39#include <plat/sdhci.h>
31 40
32/* Following are default values for UCON, ULCON and UFCON UART registers */ 41/* Following are default values for UCON, ULCON and UFCON UART registers */
33#define S5PV210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ 42#define AQUILA_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
34 S3C2410_UCON_RXILEVEL | \ 43 S3C2410_UCON_RXILEVEL | \
35 S3C2410_UCON_TXIRQMODE | \ 44 S3C2410_UCON_TXIRQMODE | \
36 S3C2410_UCON_RXIRQMODE | \ 45 S3C2410_UCON_RXIRQMODE | \
37 S3C2410_UCON_RXFIFO_TOI | \ 46 S3C2410_UCON_RXFIFO_TOI | \
38 S3C2443_UCON_RXERR_IRQEN) 47 S3C2443_UCON_RXERR_IRQEN)
39 48
40#define S5PV210_ULCON_DEFAULT S3C2410_LCON_CS8 49#define AQUILA_ULCON_DEFAULT S3C2410_LCON_CS8
41 50
42#define S5PV210_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \ 51#define AQUILA_UFCON_DEFAULT S3C2410_UFCON_FIFOMODE
43 S5PV210_UFCON_TXTRIG4 | \
44 S5PV210_UFCON_RXTRIG4)
45 52
46static struct s3c2410_uartcfg smdkv210_uartcfgs[] __initdata = { 53static struct s3c2410_uartcfg aquila_uartcfgs[] __initdata = {
47 [0] = { 54 [0] = {
48 .hwport = 0, 55 .hwport = 0,
49 .flags = 0, 56 .flags = 0,
50 .ucon = S5PV210_UCON_DEFAULT, 57 .ucon = AQUILA_UCON_DEFAULT,
51 .ulcon = S5PV210_ULCON_DEFAULT, 58 .ulcon = AQUILA_ULCON_DEFAULT,
52 .ufcon = S5PV210_UFCON_DEFAULT, 59 /*
60 * Actually UART0 can support 256 bytes fifo, but aquila board
61 * supports 128 bytes fifo because of initial chip bug
62 */
63 .ufcon = AQUILA_UFCON_DEFAULT |
64 S5PV210_UFCON_TXTRIG128 | S5PV210_UFCON_RXTRIG128,
53 }, 65 },
54 [1] = { 66 [1] = {
55 .hwport = 1, 67 .hwport = 1,
56 .flags = 0, 68 .flags = 0,
57 .ucon = S5PV210_UCON_DEFAULT, 69 .ucon = AQUILA_UCON_DEFAULT,
58 .ulcon = S5PV210_ULCON_DEFAULT, 70 .ulcon = AQUILA_ULCON_DEFAULT,
59 .ufcon = S5PV210_UFCON_DEFAULT, 71 .ufcon = AQUILA_UFCON_DEFAULT |
72 S5PV210_UFCON_TXTRIG64 | S5PV210_UFCON_RXTRIG64,
60 }, 73 },
61 [2] = { 74 [2] = {
62 .hwport = 2, 75 .hwport = 2,
63 .flags = 0, 76 .flags = 0,
64 .ucon = S5PV210_UCON_DEFAULT, 77 .ucon = AQUILA_UCON_DEFAULT,
65 .ulcon = S5PV210_ULCON_DEFAULT, 78 .ulcon = AQUILA_ULCON_DEFAULT,
66 .ufcon = S5PV210_UFCON_DEFAULT, 79 .ufcon = AQUILA_UFCON_DEFAULT |
80 S5PV210_UFCON_TXTRIG16 | S5PV210_UFCON_RXTRIG16,
67 }, 81 },
68 [3] = { 82 [3] = {
69 .hwport = 3, 83 .hwport = 3,
70 .flags = 0, 84 .flags = 0,
71 .ucon = S5PV210_UCON_DEFAULT, 85 .ucon = AQUILA_UCON_DEFAULT,
72 .ulcon = S5PV210_ULCON_DEFAULT, 86 .ulcon = AQUILA_ULCON_DEFAULT,
73 .ufcon = S5PV210_UFCON_DEFAULT, 87 .ufcon = AQUILA_UFCON_DEFAULT |
88 S5PV210_UFCON_TXTRIG16 | S5PV210_UFCON_RXTRIG16,
74 }, 89 },
75}; 90};
76 91
@@ -114,19 +129,383 @@ static struct s3c_fb_platdata aquila_lcd_pdata __initdata = {
114 .setup_gpio = s5pv210_fb_gpio_setup_24bpp, 129 .setup_gpio = s5pv210_fb_gpio_setup_24bpp,
115}; 130};
116 131
132/* MAX8998 regulators */
133#if defined(CONFIG_REGULATOR_MAX8998) || defined(CONFIG_REGULATOR_MAX8998_MODULE)
134
135static struct regulator_init_data aquila_ldo2_data = {
136 .constraints = {
137 .name = "VALIVE_1.1V",
138 .min_uV = 1100000,
139 .max_uV = 1100000,
140 .apply_uV = 1,
141 .always_on = 1,
142 .state_mem = {
143 .enabled = 1,
144 },
145 },
146};
147
148static struct regulator_init_data aquila_ldo3_data = {
149 .constraints = {
150 .name = "VUSB/MIPI_1.1V",
151 .min_uV = 1100000,
152 .max_uV = 1100000,
153 .apply_uV = 1,
154 .always_on = 1,
155 },
156};
157
158static struct regulator_init_data aquila_ldo4_data = {
159 .constraints = {
160 .name = "VDAC_3.3V",
161 .min_uV = 3300000,
162 .max_uV = 3300000,
163 .apply_uV = 1,
164 },
165};
166
167static struct regulator_init_data aquila_ldo5_data = {
168 .constraints = {
169 .name = "VTF_2.8V",
170 .min_uV = 2800000,
171 .max_uV = 2800000,
172 .apply_uV = 1,
173 },
174};
175
176static struct regulator_init_data aquila_ldo6_data = {
177 .constraints = {
178 .name = "VCC_3.3V",
179 .min_uV = 3300000,
180 .max_uV = 3300000,
181 .apply_uV = 1,
182 },
183};
184
185static struct regulator_init_data aquila_ldo7_data = {
186 .constraints = {
187 .name = "VCC_3.0V",
188 .min_uV = 3000000,
189 .max_uV = 3000000,
190 .apply_uV = 1,
191 .boot_on = 1,
192 .always_on = 1,
193 },
194};
195
196static struct regulator_init_data aquila_ldo8_data = {
197 .constraints = {
198 .name = "VUSB/VADC_3.3V",
199 .min_uV = 3300000,
200 .max_uV = 3300000,
201 .apply_uV = 1,
202 .always_on = 1,
203 },
204};
205
206static struct regulator_init_data aquila_ldo9_data = {
207 .constraints = {
208 .name = "VCC/VCAM_2.8V",
209 .min_uV = 2800000,
210 .max_uV = 2800000,
211 .apply_uV = 1,
212 .always_on = 1,
213 },
214};
215
216static struct regulator_init_data aquila_ldo10_data = {
217 .constraints = {
218 .name = "VPLL_1.1V",
219 .min_uV = 1100000,
220 .max_uV = 1100000,
221 .apply_uV = 1,
222 .boot_on = 1,
223 },
224};
225
226static struct regulator_init_data aquila_ldo11_data = {
227 .constraints = {
228 .name = "CAM_IO_2.8V",
229 .min_uV = 2800000,
230 .max_uV = 2800000,
231 .apply_uV = 1,
232 .always_on = 1,
233 },
234};
235
236static struct regulator_init_data aquila_ldo12_data = {
237 .constraints = {
238 .name = "CAM_ISP_1.2V",
239 .min_uV = 1200000,
240 .max_uV = 1200000,
241 .apply_uV = 1,
242 .always_on = 1,
243 },
244};
245
246static struct regulator_init_data aquila_ldo13_data = {
247 .constraints = {
248 .name = "CAM_A_2.8V",
249 .min_uV = 2800000,
250 .max_uV = 2800000,
251 .apply_uV = 1,
252 .always_on = 1,
253 },
254};
255
256static struct regulator_init_data aquila_ldo14_data = {
257 .constraints = {
258 .name = "CAM_CIF_1.8V",
259 .min_uV = 1800000,
260 .max_uV = 1800000,
261 .apply_uV = 1,
262 .always_on = 1,
263 },
264};
265
266static struct regulator_init_data aquila_ldo15_data = {
267 .constraints = {
268 .name = "CAM_AF_3.3V",
269 .min_uV = 3300000,
270 .max_uV = 3300000,
271 .apply_uV = 1,
272 .always_on = 1,
273 },
274};
275
276static struct regulator_init_data aquila_ldo16_data = {
277 .constraints = {
278 .name = "VMIPI_1.8V",
279 .min_uV = 1800000,
280 .max_uV = 1800000,
281 .apply_uV = 1,
282 .always_on = 1,
283 },
284};
285
286static struct regulator_init_data aquila_ldo17_data = {
287 .constraints = {
288 .name = "CAM_8M_1.8V",
289 .min_uV = 1800000,
290 .max_uV = 1800000,
291 .apply_uV = 1,
292 .always_on = 1,
293 },
294};
295
296/* BUCK */
297static struct regulator_consumer_supply buck1_consumer[] = {
298 { .supply = "vddarm", },
299};
300
301static struct regulator_consumer_supply buck2_consumer[] = {
302 { .supply = "vddint", },
303};
304
305static struct regulator_init_data aquila_buck1_data = {
306 .constraints = {
307 .name = "VARM_1.2V",
308 .min_uV = 1200000,
309 .max_uV = 1200000,
310 .apply_uV = 1,
311 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
312 REGULATOR_CHANGE_STATUS,
313 },
314 .num_consumer_supplies = ARRAY_SIZE(buck1_consumer),
315 .consumer_supplies = buck1_consumer,
316};
317
318static struct regulator_init_data aquila_buck2_data = {
319 .constraints = {
320 .name = "VINT_1.2V",
321 .min_uV = 1200000,
322 .max_uV = 1200000,
323 .apply_uV = 1,
324 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
325 REGULATOR_CHANGE_STATUS,
326 },
327 .num_consumer_supplies = ARRAY_SIZE(buck2_consumer),
328 .consumer_supplies = buck2_consumer,
329};
330
331static struct regulator_init_data aquila_buck3_data = {
332 .constraints = {
333 .name = "VCC_1.8V",
334 .min_uV = 1800000,
335 .max_uV = 1800000,
336 .apply_uV = 1,
337 .state_mem = {
338 .enabled = 1,
339 },
340 },
341};
342
343static struct regulator_init_data aquila_buck4_data = {
344 .constraints = {
345 .name = "CAM_CORE_1.2V",
346 .min_uV = 1200000,
347 .max_uV = 1200000,
348 .apply_uV = 1,
349 .always_on = 1,
350 },
351};
352
353static struct max8998_regulator_data aquila_regulators[] = {
354 { MAX8998_LDO2, &aquila_ldo2_data },
355 { MAX8998_LDO3, &aquila_ldo3_data },
356 { MAX8998_LDO4, &aquila_ldo4_data },
357 { MAX8998_LDO5, &aquila_ldo5_data },
358 { MAX8998_LDO6, &aquila_ldo6_data },
359 { MAX8998_LDO7, &aquila_ldo7_data },
360 { MAX8998_LDO8, &aquila_ldo8_data },
361 { MAX8998_LDO9, &aquila_ldo9_data },
362 { MAX8998_LDO10, &aquila_ldo10_data },
363 { MAX8998_LDO11, &aquila_ldo11_data },
364 { MAX8998_LDO12, &aquila_ldo12_data },
365 { MAX8998_LDO13, &aquila_ldo13_data },
366 { MAX8998_LDO14, &aquila_ldo14_data },
367 { MAX8998_LDO15, &aquila_ldo15_data },
368 { MAX8998_LDO16, &aquila_ldo16_data },
369 { MAX8998_LDO17, &aquila_ldo17_data },
370 { MAX8998_BUCK1, &aquila_buck1_data },
371 { MAX8998_BUCK2, &aquila_buck2_data },
372 { MAX8998_BUCK3, &aquila_buck3_data },
373 { MAX8998_BUCK4, &aquila_buck4_data },
374};
375
376static struct max8998_platform_data aquila_max8998_pdata = {
377 .num_regulators = ARRAY_SIZE(aquila_regulators),
378 .regulators = aquila_regulators,
379};
380#endif
381
382/* GPIO I2C PMIC */
383#define AP_I2C_GPIO_PMIC_BUS_4 4
384static struct i2c_gpio_platform_data aquila_i2c_gpio_pmic_data = {
385 .sda_pin = S5PV210_GPJ4(0), /* XMSMCSN */
386 .scl_pin = S5PV210_GPJ4(3), /* XMSMIRQN */
387};
388
389static struct platform_device aquila_i2c_gpio_pmic = {
390 .name = "i2c-gpio",
391 .id = AP_I2C_GPIO_PMIC_BUS_4,
392 .dev = {
393 .platform_data = &aquila_i2c_gpio_pmic_data,
394 },
395};
396
397static struct i2c_board_info i2c_gpio_pmic_devs[] __initdata = {
398#if defined(CONFIG_REGULATOR_MAX8998) || defined(CONFIG_REGULATOR_MAX8998_MODULE)
399 {
400 /* 0xCC when SRAD = 0 */
401 I2C_BOARD_INFO("max8998", 0xCC >> 1),
402 .platform_data = &aquila_max8998_pdata,
403 },
404#endif
405};
406
407/* PMIC Power button */
408static struct gpio_keys_button aquila_gpio_keys_table[] = {
409 {
410 .code = KEY_POWER,
411 .gpio = S5PV210_GPH2(6),
412 .desc = "gpio-keys: KEY_POWER",
413 .type = EV_KEY,
414 .active_low = 1,
415 .wakeup = 1,
416 .debounce_interval = 1,
417 },
418};
419
420static struct gpio_keys_platform_data aquila_gpio_keys_data = {
421 .buttons = aquila_gpio_keys_table,
422 .nbuttons = ARRAY_SIZE(aquila_gpio_keys_table),
423};
424
425static struct platform_device aquila_device_gpiokeys = {
426 .name = "gpio-keys",
427 .dev = {
428 .platform_data = &aquila_gpio_keys_data,
429 },
430};
431
432static void __init aquila_pmic_init(void)
433{
434 /* AP_PMIC_IRQ: EINT7 */
435 s3c_gpio_cfgpin(S5PV210_GPH0(7), S3C_GPIO_SFN(0xf));
436 s3c_gpio_setpull(S5PV210_GPH0(7), S3C_GPIO_PULL_UP);
437
438 /* nPower: EINT22 */
439 s3c_gpio_cfgpin(S5PV210_GPH2(6), S3C_GPIO_SFN(0xf));
440 s3c_gpio_setpull(S5PV210_GPH2(6), S3C_GPIO_PULL_UP);
441}
442
443/* MoviNAND */
444static struct s3c_sdhci_platdata aquila_hsmmc0_data __initdata = {
445 .max_width = 4,
446 .cd_type = S3C_SDHCI_CD_PERMANENT,
447};
448
449/* Wireless LAN */
450static struct s3c_sdhci_platdata aquila_hsmmc1_data __initdata = {
451 .max_width = 4,
452 .cd_type = S3C_SDHCI_CD_EXTERNAL,
453 /* ext_cd_{init,cleanup} callbacks will be added later */
454};
455
456/* External Flash */
457#define AQUILA_EXT_FLASH_EN S5PV210_MP05(4)
458#define AQUILA_EXT_FLASH_CD S5PV210_GPH3(4)
459static struct s3c_sdhci_platdata aquila_hsmmc2_data __initdata = {
460 .max_width = 4,
461 .cd_type = S3C_SDHCI_CD_GPIO,
462 .ext_cd_gpio = AQUILA_EXT_FLASH_CD,
463 .ext_cd_gpio_invert = 1,
464};
465
466static void aquila_setup_sdhci(void)
467{
468 gpio_request(AQUILA_EXT_FLASH_EN, "FLASH_EN");
469 gpio_direction_output(AQUILA_EXT_FLASH_EN, 1);
470
471 s3c_sdhci0_set_platdata(&aquila_hsmmc0_data);
472 s3c_sdhci1_set_platdata(&aquila_hsmmc1_data);
473 s3c_sdhci2_set_platdata(&aquila_hsmmc2_data);
474};
475
117static struct platform_device *aquila_devices[] __initdata = { 476static struct platform_device *aquila_devices[] __initdata = {
477 &aquila_i2c_gpio_pmic,
478 &aquila_device_gpiokeys,
118 &s3c_device_fb, 479 &s3c_device_fb,
480 &s5pc110_device_onenand,
481 &s3c_device_hsmmc0,
482 &s3c_device_hsmmc1,
483 &s3c_device_hsmmc2,
484 &s5p_device_fimc0,
485 &s5p_device_fimc1,
486 &s5p_device_fimc2,
119}; 487};
120 488
121static void __init aquila_map_io(void) 489static void __init aquila_map_io(void)
122{ 490{
123 s5p_init_io(NULL, 0, S5P_VA_CHIPID); 491 s5p_init_io(NULL, 0, S5P_VA_CHIPID);
124 s3c24xx_init_clocks(24000000); 492 s3c24xx_init_clocks(24000000);
125 s3c24xx_init_uarts(smdkv210_uartcfgs, ARRAY_SIZE(smdkv210_uartcfgs)); 493 s3c24xx_init_uarts(aquila_uartcfgs, ARRAY_SIZE(aquila_uartcfgs));
126} 494}
127 495
128static void __init aquila_machine_init(void) 496static void __init aquila_machine_init(void)
129{ 497{
498 /* PMIC */
499 aquila_pmic_init();
500 i2c_register_board_info(AP_I2C_GPIO_PMIC_BUS_4, i2c_gpio_pmic_devs,
501 ARRAY_SIZE(i2c_gpio_pmic_devs));
502 /* SDHCI */
503 aquila_setup_sdhci();
504
505 s3c_fimc_setname(0, "s5p-fimc");
506 s3c_fimc_setname(1, "s5p-fimc");
507 s3c_fimc_setname(2, "s5p-fimc");
508
130 /* FB */ 509 /* FB */
131 s3c_fb_set_platdata(&aquila_lcd_pdata); 510 s3c_fb_set_platdata(&aquila_lcd_pdata);
132 511
diff --git a/arch/arm/mach-s5pv210/mach-goni.c b/arch/arm/mach-s5pv210/mach-goni.c
index 4863b13824e..53754d7d364 100644
--- a/arch/arm/mach-s5pv210/mach-goni.c
+++ b/arch/arm/mach-s5pv210/mach-goni.c
@@ -12,6 +12,13 @@
12#include <linux/types.h> 12#include <linux/types.h>
13#include <linux/init.h> 13#include <linux/init.h>
14#include <linux/serial_core.h> 14#include <linux/serial_core.h>
15#include <linux/fb.h>
16#include <linux/i2c.h>
17#include <linux/i2c-gpio.h>
18#include <linux/mfd/max8998.h>
19#include <linux/gpio_keys.h>
20#include <linux/input.h>
21#include <linux/gpio.h>
15 22
16#include <asm/mach/arch.h> 23#include <asm/mach/arch.h>
17#include <asm/mach/map.h> 24#include <asm/mach/map.h>
@@ -20,58 +27,444 @@
20 27
21#include <mach/map.h> 28#include <mach/map.h>
22#include <mach/regs-clock.h> 29#include <mach/regs-clock.h>
30#include <mach/regs-fb.h>
23 31
32#include <plat/gpio-cfg.h>
24#include <plat/regs-serial.h> 33#include <plat/regs-serial.h>
25#include <plat/s5pv210.h> 34#include <plat/s5pv210.h>
26#include <plat/devs.h> 35#include <plat/devs.h>
27#include <plat/cpu.h> 36#include <plat/cpu.h>
37#include <plat/fb.h>
38#include <plat/sdhci.h>
28 39
29/* Following are default values for UCON, ULCON and UFCON UART registers */ 40/* Following are default values for UCON, ULCON and UFCON UART registers */
30#define S5PV210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ 41#define GONI_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
31 S3C2410_UCON_RXILEVEL | \ 42 S3C2410_UCON_RXILEVEL | \
32 S3C2410_UCON_TXIRQMODE | \ 43 S3C2410_UCON_TXIRQMODE | \
33 S3C2410_UCON_RXIRQMODE | \ 44 S3C2410_UCON_RXIRQMODE | \
34 S3C2410_UCON_RXFIFO_TOI | \ 45 S3C2410_UCON_RXFIFO_TOI | \
35 S3C2443_UCON_RXERR_IRQEN) 46 S3C2443_UCON_RXERR_IRQEN)
36 47
37#define S5PV210_ULCON_DEFAULT S3C2410_LCON_CS8 48#define GONI_ULCON_DEFAULT S3C2410_LCON_CS8
38 49
39#define S5PV210_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \ 50#define GONI_UFCON_DEFAULT S3C2410_UFCON_FIFOMODE
40 S5PV210_UFCON_TXTRIG4 | \
41 S5PV210_UFCON_RXTRIG4)
42 51
43static struct s3c2410_uartcfg goni_uartcfgs[] __initdata = { 52static struct s3c2410_uartcfg goni_uartcfgs[] __initdata = {
44 [0] = { 53 [0] = {
45 .hwport = 0, 54 .hwport = 0,
46 .flags = 0, 55 .flags = 0,
47 .ucon = S5PV210_UCON_DEFAULT, 56 .ucon = GONI_UCON_DEFAULT,
48 .ulcon = S5PV210_ULCON_DEFAULT, 57 .ulcon = GONI_ULCON_DEFAULT,
49 .ufcon = S5PV210_UFCON_DEFAULT, 58 .ufcon = GONI_UFCON_DEFAULT |
59 S5PV210_UFCON_TXTRIG256 | S5PV210_UFCON_RXTRIG256,
50 }, 60 },
51 [1] = { 61 [1] = {
52 .hwport = 1, 62 .hwport = 1,
53 .flags = 0, 63 .flags = 0,
54 .ucon = S5PV210_UCON_DEFAULT, 64 .ucon = GONI_UCON_DEFAULT,
55 .ulcon = S5PV210_ULCON_DEFAULT, 65 .ulcon = GONI_ULCON_DEFAULT,
56 .ufcon = S5PV210_UFCON_DEFAULT, 66 .ufcon = GONI_UFCON_DEFAULT |
67 S5PV210_UFCON_TXTRIG64 | S5PV210_UFCON_RXTRIG64,
57 }, 68 },
58 [2] = { 69 [2] = {
59 .hwport = 2, 70 .hwport = 2,
60 .flags = 0, 71 .flags = 0,
61 .ucon = S5PV210_UCON_DEFAULT, 72 .ucon = GONI_UCON_DEFAULT,
62 .ulcon = S5PV210_ULCON_DEFAULT, 73 .ulcon = GONI_ULCON_DEFAULT,
63 .ufcon = S5PV210_UFCON_DEFAULT, 74 .ufcon = GONI_UFCON_DEFAULT |
75 S5PV210_UFCON_TXTRIG16 | S5PV210_UFCON_RXTRIG16,
64 }, 76 },
65 [3] = { 77 [3] = {
66 .hwport = 3, 78 .hwport = 3,
67 .flags = 0, 79 .flags = 0,
68 .ucon = S5PV210_UCON_DEFAULT, 80 .ucon = GONI_UCON_DEFAULT,
69 .ulcon = S5PV210_ULCON_DEFAULT, 81 .ulcon = GONI_ULCON_DEFAULT,
70 .ufcon = S5PV210_UFCON_DEFAULT, 82 .ufcon = GONI_UFCON_DEFAULT |
83 S5PV210_UFCON_TXTRIG16 | S5PV210_UFCON_RXTRIG16,
71 }, 84 },
72}; 85};
73 86
87/* Frame Buffer */
88static struct s3c_fb_pd_win goni_fb_win0 = {
89 .win_mode = {
90 .pixclock = 1000000000000ULL / ((16+16+2+480)*(28+3+2+800)*55),
91 .left_margin = 16,
92 .right_margin = 16,
93 .upper_margin = 3,
94 .lower_margin = 28,
95 .hsync_len = 2,
96 .vsync_len = 2,
97 .xres = 480,
98 .yres = 800,
99 .refresh = 55,
100 },
101 .max_bpp = 32,
102 .default_bpp = 16,
103};
104
105static struct s3c_fb_platdata goni_lcd_pdata __initdata = {
106 .win[0] = &goni_fb_win0,
107 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB |
108 VIDCON0_CLKSEL_LCD,
109 .vidcon1 = VIDCON1_INV_VCLK | VIDCON1_INV_VDEN
110 | VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
111 .setup_gpio = s5pv210_fb_gpio_setup_24bpp,
112};
113
114/* MAX8998 regulators */
115#if defined(CONFIG_REGULATOR_MAX8998) || defined(CONFIG_REGULATOR_MAX8998_MODULE)
116
117static struct regulator_init_data goni_ldo2_data = {
118 .constraints = {
119 .name = "VALIVE_1.1V",
120 .min_uV = 1100000,
121 .max_uV = 1100000,
122 .apply_uV = 1,
123 .always_on = 1,
124 .state_mem = {
125 .enabled = 1,
126 },
127 },
128};
129
130static struct regulator_init_data goni_ldo3_data = {
131 .constraints = {
132 .name = "VUSB/MIPI_1.1V",
133 .min_uV = 1100000,
134 .max_uV = 1100000,
135 .apply_uV = 1,
136 .always_on = 1,
137 },
138};
139
140static struct regulator_init_data goni_ldo4_data = {
141 .constraints = {
142 .name = "VDAC_3.3V",
143 .min_uV = 3300000,
144 .max_uV = 3300000,
145 .apply_uV = 1,
146 },
147};
148
149static struct regulator_init_data goni_ldo5_data = {
150 .constraints = {
151 .name = "VTF_2.8V",
152 .min_uV = 2800000,
153 .max_uV = 2800000,
154 .apply_uV = 1,
155 },
156};
157
158static struct regulator_init_data goni_ldo6_data = {
159 .constraints = {
160 .name = "VCC_3.3V",
161 .min_uV = 3300000,
162 .max_uV = 3300000,
163 .apply_uV = 1,
164 },
165};
166
167static struct regulator_init_data goni_ldo7_data = {
168 .constraints = {
169 .name = "VLCD_1.8V",
170 .min_uV = 1800000,
171 .max_uV = 1800000,
172 .apply_uV = 1,
173 .always_on = 1,
174 },
175};
176
177static struct regulator_init_data goni_ldo8_data = {
178 .constraints = {
179 .name = "VUSB/VADC_3.3V",
180 .min_uV = 3300000,
181 .max_uV = 3300000,
182 .apply_uV = 1,
183 .always_on = 1,
184 },
185};
186
187static struct regulator_init_data goni_ldo9_data = {
188 .constraints = {
189 .name = "VCC/VCAM_2.8V",
190 .min_uV = 2800000,
191 .max_uV = 2800000,
192 .apply_uV = 1,
193 .always_on = 1,
194 },
195};
196
197static struct regulator_init_data goni_ldo10_data = {
198 .constraints = {
199 .name = "VPLL_1.1V",
200 .min_uV = 1100000,
201 .max_uV = 1100000,
202 .apply_uV = 1,
203 .boot_on = 1,
204 },
205};
206
207static struct regulator_init_data goni_ldo11_data = {
208 .constraints = {
209 .name = "CAM_IO_2.8V",
210 .min_uV = 2800000,
211 .max_uV = 2800000,
212 .apply_uV = 1,
213 .always_on = 1,
214 },
215};
216
217static struct regulator_init_data goni_ldo12_data = {
218 .constraints = {
219 .name = "CAM_ISP_1.2V",
220 .min_uV = 1200000,
221 .max_uV = 1200000,
222 .apply_uV = 1,
223 .always_on = 1,
224 },
225};
226
227static struct regulator_init_data goni_ldo13_data = {
228 .constraints = {
229 .name = "CAM_A_2.8V",
230 .min_uV = 2800000,
231 .max_uV = 2800000,
232 .apply_uV = 1,
233 .always_on = 1,
234 },
235};
236
237static struct regulator_init_data goni_ldo14_data = {
238 .constraints = {
239 .name = "CAM_CIF_1.8V",
240 .min_uV = 1800000,
241 .max_uV = 1800000,
242 .apply_uV = 1,
243 .always_on = 1,
244 },
245};
246
247static struct regulator_init_data goni_ldo15_data = {
248 .constraints = {
249 .name = "CAM_AF_3.3V",
250 .min_uV = 3300000,
251 .max_uV = 3300000,
252 .apply_uV = 1,
253 .always_on = 1,
254 },
255};
256
257static struct regulator_init_data goni_ldo16_data = {
258 .constraints = {
259 .name = "VMIPI_1.8V",
260 .min_uV = 1800000,
261 .max_uV = 1800000,
262 .apply_uV = 1,
263 .always_on = 1,
264 },
265};
266
267static struct regulator_init_data goni_ldo17_data = {
268 .constraints = {
269 .name = "VCC_3.0V_LCD",
270 .min_uV = 3000000,
271 .max_uV = 3000000,
272 .apply_uV = 1,
273 .always_on = 1,
274 },
275};
276
277/* BUCK */
278static struct regulator_consumer_supply buck1_consumer[] = {
279 { .supply = "vddarm", },
280};
281
282static struct regulator_consumer_supply buck2_consumer[] = {
283 { .supply = "vddint", },
284};
285
286static struct regulator_init_data goni_buck1_data = {
287 .constraints = {
288 .name = "VARM_1.2V",
289 .min_uV = 1200000,
290 .max_uV = 1200000,
291 .apply_uV = 1,
292 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
293 REGULATOR_CHANGE_STATUS,
294 },
295 .num_consumer_supplies = ARRAY_SIZE(buck1_consumer),
296 .consumer_supplies = buck1_consumer,
297};
298
299static struct regulator_init_data goni_buck2_data = {
300 .constraints = {
301 .name = "VINT_1.2V",
302 .min_uV = 1200000,
303 .max_uV = 1200000,
304 .apply_uV = 1,
305 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
306 REGULATOR_CHANGE_STATUS,
307 },
308 .num_consumer_supplies = ARRAY_SIZE(buck2_consumer),
309 .consumer_supplies = buck2_consumer,
310};
311
312static struct regulator_init_data goni_buck3_data = {
313 .constraints = {
314 .name = "VCC_1.8V",
315 .min_uV = 1800000,
316 .max_uV = 1800000,
317 .apply_uV = 1,
318 .state_mem = {
319 .enabled = 1,
320 },
321 },
322};
323
324static struct regulator_init_data goni_buck4_data = {
325 .constraints = {
326 .name = "CAM_CORE_1.2V",
327 .min_uV = 1200000,
328 .max_uV = 1200000,
329 .apply_uV = 1,
330 .always_on = 1,
331 },
332};
333
334static struct max8998_regulator_data goni_regulators[] = {
335 { MAX8998_LDO2, &goni_ldo2_data },
336 { MAX8998_LDO3, &goni_ldo3_data },
337 { MAX8998_LDO4, &goni_ldo4_data },
338 { MAX8998_LDO5, &goni_ldo5_data },
339 { MAX8998_LDO6, &goni_ldo6_data },
340 { MAX8998_LDO7, &goni_ldo7_data },
341 { MAX8998_LDO8, &goni_ldo8_data },
342 { MAX8998_LDO9, &goni_ldo9_data },
343 { MAX8998_LDO10, &goni_ldo10_data },
344 { MAX8998_LDO11, &goni_ldo11_data },
345 { MAX8998_LDO12, &goni_ldo12_data },
346 { MAX8998_LDO13, &goni_ldo13_data },
347 { MAX8998_LDO14, &goni_ldo14_data },
348 { MAX8998_LDO15, &goni_ldo15_data },
349 { MAX8998_LDO16, &goni_ldo16_data },
350 { MAX8998_LDO17, &goni_ldo17_data },
351 { MAX8998_BUCK1, &goni_buck1_data },
352 { MAX8998_BUCK2, &goni_buck2_data },
353 { MAX8998_BUCK3, &goni_buck3_data },
354 { MAX8998_BUCK4, &goni_buck4_data },
355};
356
357static struct max8998_platform_data goni_max8998_pdata = {
358 .num_regulators = ARRAY_SIZE(goni_regulators),
359 .regulators = goni_regulators,
360};
361#endif
362
363/* GPIO I2C PMIC */
364#define AP_I2C_GPIO_PMIC_BUS_4 4
365static struct i2c_gpio_platform_data goni_i2c_gpio_pmic_data = {
366 .sda_pin = S5PV210_GPJ4(0), /* XMSMCSN */
367 .scl_pin = S5PV210_GPJ4(3), /* XMSMIRQN */
368};
369
370static struct platform_device goni_i2c_gpio_pmic = {
371 .name = "i2c-gpio",
372 .id = AP_I2C_GPIO_PMIC_BUS_4,
373 .dev = {
374 .platform_data = &goni_i2c_gpio_pmic_data,
375 },
376};
377
378static struct i2c_board_info i2c_gpio_pmic_devs[] __initdata = {
379#if defined(CONFIG_REGULATOR_MAX8998) || defined(CONFIG_REGULATOR_MAX8998_MODULE)
380 {
381 /* 0xCC when SRAD = 0 */
382 I2C_BOARD_INFO("max8998", 0xCC >> 1),
383 .platform_data = &goni_max8998_pdata,
384 },
385#endif
386};
387
388/* PMIC Power button */
389static struct gpio_keys_button goni_gpio_keys_table[] = {
390 {
391 .code = KEY_POWER,
392 .gpio = S5PV210_GPH2(6),
393 .desc = "gpio-keys: KEY_POWER",
394 .type = EV_KEY,
395 .active_low = 1,
396 .wakeup = 1,
397 .debounce_interval = 1,
398 },
399};
400
401static struct gpio_keys_platform_data goni_gpio_keys_data = {
402 .buttons = goni_gpio_keys_table,
403 .nbuttons = ARRAY_SIZE(goni_gpio_keys_table),
404};
405
406static struct platform_device goni_device_gpiokeys = {
407 .name = "gpio-keys",
408 .dev = {
409 .platform_data = &goni_gpio_keys_data,
410 },
411};
412
413static void __init goni_pmic_init(void)
414{
415 /* AP_PMIC_IRQ: EINT7 */
416 s3c_gpio_cfgpin(S5PV210_GPH0(7), S3C_GPIO_SFN(0xf));
417 s3c_gpio_setpull(S5PV210_GPH0(7), S3C_GPIO_PULL_UP);
418
419 /* nPower: EINT22 */
420 s3c_gpio_cfgpin(S5PV210_GPH2(6), S3C_GPIO_SFN(0xf));
421 s3c_gpio_setpull(S5PV210_GPH2(6), S3C_GPIO_PULL_UP);
422}
423
424/* MoviNAND */
425static struct s3c_sdhci_platdata goni_hsmmc0_data __initdata = {
426 .max_width = 4,
427 .cd_type = S3C_SDHCI_CD_PERMANENT,
428};
429
430/* Wireless LAN */
431static struct s3c_sdhci_platdata goni_hsmmc1_data __initdata = {
432 .max_width = 4,
433 .cd_type = S3C_SDHCI_CD_EXTERNAL,
434 /* ext_cd_{init,cleanup} callbacks will be added later */
435};
436
437/* External Flash */
438#define GONI_EXT_FLASH_EN S5PV210_MP05(4)
439#define GONI_EXT_FLASH_CD S5PV210_GPH3(4)
440static struct s3c_sdhci_platdata goni_hsmmc2_data __initdata = {
441 .max_width = 4,
442 .cd_type = S3C_SDHCI_CD_GPIO,
443 .ext_cd_gpio = GONI_EXT_FLASH_CD,
444 .ext_cd_gpio_invert = 1,
445};
446
447static void goni_setup_sdhci(void)
448{
449 gpio_request(GONI_EXT_FLASH_EN, "FLASH_EN");
450 gpio_direction_output(GONI_EXT_FLASH_EN, 1);
451
452 s3c_sdhci0_set_platdata(&goni_hsmmc0_data);
453 s3c_sdhci1_set_platdata(&goni_hsmmc1_data);
454 s3c_sdhci2_set_platdata(&goni_hsmmc2_data);
455};
456
74static struct platform_device *goni_devices[] __initdata = { 457static struct platform_device *goni_devices[] __initdata = {
458 &s3c_device_fb,
459 &s5pc110_device_onenand,
460 &goni_i2c_gpio_pmic,
461 &goni_device_gpiokeys,
462 &s5p_device_fimc0,
463 &s5p_device_fimc1,
464 &s5p_device_fimc2,
465 &s3c_device_hsmmc0,
466 &s3c_device_hsmmc1,
467 &s3c_device_hsmmc2,
75}; 468};
76 469
77static void __init goni_map_io(void) 470static void __init goni_map_io(void)
@@ -83,6 +476,16 @@ static void __init goni_map_io(void)
83 476
84static void __init goni_machine_init(void) 477static void __init goni_machine_init(void)
85{ 478{
479 /* PMIC */
480 goni_pmic_init();
481 i2c_register_board_info(AP_I2C_GPIO_PMIC_BUS_4, i2c_gpio_pmic_devs,
482 ARRAY_SIZE(i2c_gpio_pmic_devs));
483 /* SDHCI */
484 goni_setup_sdhci();
485
486 /* FB */
487 s3c_fb_set_platdata(&goni_lcd_pdata);
488
86 platform_add_devices(goni_devices, ARRAY_SIZE(goni_devices)); 489 platform_add_devices(goni_devices, ARRAY_SIZE(goni_devices));
87} 490}
88 491
diff --git a/arch/arm/mach-s5pv210/mach-smdkc110.c b/arch/arm/mach-s5pv210/mach-smdkc110.c
index 4c8903c6d10..8211bb87c54 100644
--- a/arch/arm/mach-s5pv210/mach-smdkc110.c
+++ b/arch/arm/mach-s5pv210/mach-smdkc110.c
@@ -12,6 +12,7 @@
12#include <linux/types.h> 12#include <linux/types.h>
13#include <linux/init.h> 13#include <linux/init.h>
14#include <linux/serial_core.h> 14#include <linux/serial_core.h>
15#include <linux/i2c.h>
15 16
16#include <asm/mach/arch.h> 17#include <asm/mach/arch.h>
17#include <asm/mach/map.h> 18#include <asm/mach/map.h>
@@ -25,18 +26,20 @@
25#include <plat/s5pv210.h> 26#include <plat/s5pv210.h>
26#include <plat/devs.h> 27#include <plat/devs.h>
27#include <plat/cpu.h> 28#include <plat/cpu.h>
29#include <plat/ata.h>
30#include <plat/iic.h>
28 31
29/* Following are default values for UCON, ULCON and UFCON UART registers */ 32/* Following are default values for UCON, ULCON and UFCON UART registers */
30#define S5PV210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ 33#define SMDKC110_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
31 S3C2410_UCON_RXILEVEL | \ 34 S3C2410_UCON_RXILEVEL | \
32 S3C2410_UCON_TXIRQMODE | \ 35 S3C2410_UCON_TXIRQMODE | \
33 S3C2410_UCON_RXIRQMODE | \ 36 S3C2410_UCON_RXIRQMODE | \
34 S3C2410_UCON_RXFIFO_TOI | \ 37 S3C2410_UCON_RXFIFO_TOI | \
35 S3C2443_UCON_RXERR_IRQEN) 38 S3C2443_UCON_RXERR_IRQEN)
36 39
37#define S5PV210_ULCON_DEFAULT S3C2410_LCON_CS8 40#define SMDKC110_ULCON_DEFAULT S3C2410_LCON_CS8
38 41
39#define S5PV210_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \ 42#define SMDKC110_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
40 S5PV210_UFCON_TXTRIG4 | \ 43 S5PV210_UFCON_TXTRIG4 | \
41 S5PV210_UFCON_RXTRIG4) 44 S5PV210_UFCON_RXTRIG4)
42 45
@@ -44,39 +47,60 @@ static struct s3c2410_uartcfg smdkv210_uartcfgs[] __initdata = {
44 [0] = { 47 [0] = {
45 .hwport = 0, 48 .hwport = 0,
46 .flags = 0, 49 .flags = 0,
47 .ucon = S5PV210_UCON_DEFAULT, 50 .ucon = SMDKC110_UCON_DEFAULT,
48 .ulcon = S5PV210_ULCON_DEFAULT, 51 .ulcon = SMDKC110_ULCON_DEFAULT,
49 .ufcon = S5PV210_UFCON_DEFAULT, 52 .ufcon = SMDKC110_UFCON_DEFAULT,
50 }, 53 },
51 [1] = { 54 [1] = {
52 .hwport = 1, 55 .hwport = 1,
53 .flags = 0, 56 .flags = 0,
54 .ucon = S5PV210_UCON_DEFAULT, 57 .ucon = SMDKC110_UCON_DEFAULT,
55 .ulcon = S5PV210_ULCON_DEFAULT, 58 .ulcon = SMDKC110_ULCON_DEFAULT,
56 .ufcon = S5PV210_UFCON_DEFAULT, 59 .ufcon = SMDKC110_UFCON_DEFAULT,
57 }, 60 },
58 [2] = { 61 [2] = {
59 .hwport = 2, 62 .hwport = 2,
60 .flags = 0, 63 .flags = 0,
61 .ucon = S5PV210_UCON_DEFAULT, 64 .ucon = SMDKC110_UCON_DEFAULT,
62 .ulcon = S5PV210_ULCON_DEFAULT, 65 .ulcon = SMDKC110_ULCON_DEFAULT,
63 .ufcon = S5PV210_UFCON_DEFAULT, 66 .ufcon = SMDKC110_UFCON_DEFAULT,
64 }, 67 },
65 [3] = { 68 [3] = {
66 .hwport = 3, 69 .hwport = 3,
67 .flags = 0, 70 .flags = 0,
68 .ucon = S5PV210_UCON_DEFAULT, 71 .ucon = SMDKC110_UCON_DEFAULT,
69 .ulcon = S5PV210_ULCON_DEFAULT, 72 .ulcon = SMDKC110_ULCON_DEFAULT,
70 .ufcon = S5PV210_UFCON_DEFAULT, 73 .ufcon = SMDKC110_UFCON_DEFAULT,
71 }, 74 },
72}; 75};
73 76
77static struct s3c_ide_platdata smdkc110_ide_pdata __initdata = {
78 .setup_gpio = s5pv210_ide_setup_gpio,
79};
80
74static struct platform_device *smdkc110_devices[] __initdata = { 81static struct platform_device *smdkc110_devices[] __initdata = {
75 &s5pv210_device_iis0, 82 &s5pv210_device_iis0,
76 &s5pv210_device_ac97, 83 &s5pv210_device_ac97,
84 &s3c_device_cfcon,
85 &s3c_device_i2c0,
86 &s3c_device_i2c1,
87 &s3c_device_i2c2,
88 &s3c_device_rtc,
77 &s3c_device_wdt, 89 &s3c_device_wdt,
78}; 90};
79 91
92static struct i2c_board_info smdkc110_i2c_devs0[] __initdata = {
93 { I2C_BOARD_INFO("24c08", 0x50), }, /* Samsung S524AD0XD1 */
94};
95
96static struct i2c_board_info smdkc110_i2c_devs1[] __initdata = {
97 /* To Be Updated */
98};
99
100static struct i2c_board_info smdkc110_i2c_devs2[] __initdata = {
101 /* To Be Updated */
102};
103
80static void __init smdkc110_map_io(void) 104static void __init smdkc110_map_io(void)
81{ 105{
82 s5p_init_io(NULL, 0, S5P_VA_CHIPID); 106 s5p_init_io(NULL, 0, S5P_VA_CHIPID);
@@ -86,6 +110,18 @@ static void __init smdkc110_map_io(void)
86 110
87static void __init smdkc110_machine_init(void) 111static void __init smdkc110_machine_init(void)
88{ 112{
113 s3c_i2c0_set_platdata(NULL);
114 s3c_i2c1_set_platdata(NULL);
115 s3c_i2c2_set_platdata(NULL);
116 i2c_register_board_info(0, smdkc110_i2c_devs0,
117 ARRAY_SIZE(smdkc110_i2c_devs0));
118 i2c_register_board_info(1, smdkc110_i2c_devs1,
119 ARRAY_SIZE(smdkc110_i2c_devs1));
120 i2c_register_board_info(2, smdkc110_i2c_devs2,
121 ARRAY_SIZE(smdkc110_i2c_devs2));
122
123 s3c_ide_set_platdata(&smdkc110_ide_pdata);
124
89 platform_add_devices(smdkc110_devices, ARRAY_SIZE(smdkc110_devices)); 125 platform_add_devices(smdkc110_devices, ARRAY_SIZE(smdkc110_devices));
90} 126}
91 127
diff --git a/arch/arm/mach-s5pv210/mach-smdkv210.c b/arch/arm/mach-s5pv210/mach-smdkv210.c
index 0d462794804..fbbc0a3c373 100644
--- a/arch/arm/mach-s5pv210/mach-smdkv210.c
+++ b/arch/arm/mach-s5pv210/mach-smdkv210.c
@@ -10,6 +10,7 @@
10 10
11#include <linux/kernel.h> 11#include <linux/kernel.h>
12#include <linux/types.h> 12#include <linux/types.h>
13#include <linux/i2c.h>
13#include <linux/init.h> 14#include <linux/init.h>
14#include <linux/serial_core.h> 15#include <linux/serial_core.h>
15 16
@@ -27,18 +28,21 @@
27#include <plat/cpu.h> 28#include <plat/cpu.h>
28#include <plat/adc.h> 29#include <plat/adc.h>
29#include <plat/ts.h> 30#include <plat/ts.h>
31#include <plat/ata.h>
32#include <plat/iic.h>
33#include <plat/keypad.h>
30 34
31/* Following are default values for UCON, ULCON and UFCON UART registers */ 35/* Following are default values for UCON, ULCON and UFCON UART registers */
32#define S5PV210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ 36#define SMDKV210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
33 S3C2410_UCON_RXILEVEL | \ 37 S3C2410_UCON_RXILEVEL | \
34 S3C2410_UCON_TXIRQMODE | \ 38 S3C2410_UCON_TXIRQMODE | \
35 S3C2410_UCON_RXIRQMODE | \ 39 S3C2410_UCON_RXIRQMODE | \
36 S3C2410_UCON_RXFIFO_TOI | \ 40 S3C2410_UCON_RXFIFO_TOI | \
37 S3C2443_UCON_RXERR_IRQEN) 41 S3C2443_UCON_RXERR_IRQEN)
38 42
39#define S5PV210_ULCON_DEFAULT S3C2410_LCON_CS8 43#define SMDKV210_ULCON_DEFAULT S3C2410_LCON_CS8
40 44
41#define S5PV210_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \ 45#define SMDKV210_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
42 S5PV210_UFCON_TXTRIG4 | \ 46 S5PV210_UFCON_TXTRIG4 | \
43 S5PV210_UFCON_RXTRIG4) 47 S5PV210_UFCON_RXTRIG4)
44 48
@@ -46,41 +50,86 @@ static struct s3c2410_uartcfg smdkv210_uartcfgs[] __initdata = {
46 [0] = { 50 [0] = {
47 .hwport = 0, 51 .hwport = 0,
48 .flags = 0, 52 .flags = 0,
49 .ucon = S5PV210_UCON_DEFAULT, 53 .ucon = SMDKV210_UCON_DEFAULT,
50 .ulcon = S5PV210_ULCON_DEFAULT, 54 .ulcon = SMDKV210_ULCON_DEFAULT,
51 .ufcon = S5PV210_UFCON_DEFAULT, 55 .ufcon = SMDKV210_UFCON_DEFAULT,
52 }, 56 },
53 [1] = { 57 [1] = {
54 .hwport = 1, 58 .hwport = 1,
55 .flags = 0, 59 .flags = 0,
56 .ucon = S5PV210_UCON_DEFAULT, 60 .ucon = SMDKV210_UCON_DEFAULT,
57 .ulcon = S5PV210_ULCON_DEFAULT, 61 .ulcon = SMDKV210_ULCON_DEFAULT,
58 .ufcon = S5PV210_UFCON_DEFAULT, 62 .ufcon = SMDKV210_UFCON_DEFAULT,
59 }, 63 },
60 [2] = { 64 [2] = {
61 .hwport = 2, 65 .hwport = 2,
62 .flags = 0, 66 .flags = 0,
63 .ucon = S5PV210_UCON_DEFAULT, 67 .ucon = SMDKV210_UCON_DEFAULT,
64 .ulcon = S5PV210_ULCON_DEFAULT, 68 .ulcon = SMDKV210_ULCON_DEFAULT,
65 .ufcon = S5PV210_UFCON_DEFAULT, 69 .ufcon = SMDKV210_UFCON_DEFAULT,
66 }, 70 },
67 [3] = { 71 [3] = {
68 .hwport = 3, 72 .hwport = 3,
69 .flags = 0, 73 .flags = 0,
70 .ucon = S5PV210_UCON_DEFAULT, 74 .ucon = SMDKV210_UCON_DEFAULT,
71 .ulcon = S5PV210_ULCON_DEFAULT, 75 .ulcon = SMDKV210_ULCON_DEFAULT,
72 .ufcon = S5PV210_UFCON_DEFAULT, 76 .ufcon = SMDKV210_UFCON_DEFAULT,
73 }, 77 },
74}; 78};
75 79
80static struct s3c_ide_platdata smdkv210_ide_pdata __initdata = {
81 .setup_gpio = s5pv210_ide_setup_gpio,
82};
83
84static uint32_t smdkv210_keymap[] __initdata = {
85 /* KEY(row, col, keycode) */
86 KEY(0, 3, KEY_1), KEY(0, 4, KEY_2), KEY(0, 5, KEY_3),
87 KEY(0, 6, KEY_4), KEY(0, 7, KEY_5),
88 KEY(1, 3, KEY_A), KEY(1, 4, KEY_B), KEY(1, 5, KEY_C),
89 KEY(1, 6, KEY_D), KEY(1, 7, KEY_E)
90};
91
92static struct matrix_keymap_data smdkv210_keymap_data __initdata = {
93 .keymap = smdkv210_keymap,
94 .keymap_size = ARRAY_SIZE(smdkv210_keymap),
95};
96
97static struct samsung_keypad_platdata smdkv210_keypad_data __initdata = {
98 .keymap_data = &smdkv210_keymap_data,
99 .rows = 8,
100 .cols = 8,
101};
102
76static struct platform_device *smdkv210_devices[] __initdata = { 103static struct platform_device *smdkv210_devices[] __initdata = {
77 &s5pv210_device_iis0, 104 &s5pv210_device_iis0,
78 &s5pv210_device_ac97, 105 &s5pv210_device_ac97,
79 &s3c_device_adc, 106 &s3c_device_adc,
107 &s3c_device_cfcon,
108 &s3c_device_hsmmc0,
109 &s3c_device_hsmmc1,
110 &s3c_device_hsmmc2,
111 &s3c_device_hsmmc3,
112 &s3c_device_i2c0,
113 &s3c_device_i2c1,
114 &s3c_device_i2c2,
115 &samsung_device_keypad,
116 &s3c_device_rtc,
80 &s3c_device_ts, 117 &s3c_device_ts,
81 &s3c_device_wdt, 118 &s3c_device_wdt,
82}; 119};
83 120
121static struct i2c_board_info smdkv210_i2c_devs0[] __initdata = {
122 { I2C_BOARD_INFO("24c08", 0x50), }, /* Samsung S524AD0XD1 */
123};
124
125static struct i2c_board_info smdkv210_i2c_devs1[] __initdata = {
126 /* To Be Updated */
127};
128
129static struct i2c_board_info smdkv210_i2c_devs2[] __initdata = {
130 /* To Be Updated */
131};
132
84static struct s3c2410_ts_mach_info s3c_ts_platform __initdata = { 133static struct s3c2410_ts_mach_info s3c_ts_platform __initdata = {
85 .delay = 10000, 134 .delay = 10000,
86 .presc = 49, 135 .presc = 49,
@@ -96,7 +145,21 @@ static void __init smdkv210_map_io(void)
96 145
97static void __init smdkv210_machine_init(void) 146static void __init smdkv210_machine_init(void)
98{ 147{
148 samsung_keypad_set_platdata(&smdkv210_keypad_data);
99 s3c24xx_ts_set_platdata(&s3c_ts_platform); 149 s3c24xx_ts_set_platdata(&s3c_ts_platform);
150
151 s3c_i2c0_set_platdata(NULL);
152 s3c_i2c1_set_platdata(NULL);
153 s3c_i2c2_set_platdata(NULL);
154 i2c_register_board_info(0, smdkv210_i2c_devs0,
155 ARRAY_SIZE(smdkv210_i2c_devs0));
156 i2c_register_board_info(1, smdkv210_i2c_devs1,
157 ARRAY_SIZE(smdkv210_i2c_devs1));
158 i2c_register_board_info(2, smdkv210_i2c_devs2,
159 ARRAY_SIZE(smdkv210_i2c_devs2));
160
161 s3c_ide_set_platdata(&smdkv210_ide_pdata);
162
100 platform_add_devices(smdkv210_devices, ARRAY_SIZE(smdkv210_devices)); 163 platform_add_devices(smdkv210_devices, ARRAY_SIZE(smdkv210_devices));
101} 164}
102 165
diff --git a/arch/arm/mach-s5pv210/setup-fb-24bpp.c b/arch/arm/mach-s5pv210/setup-fb-24bpp.c
index a50cbac8720..928cf1f125f 100644
--- a/arch/arm/mach-s5pv210/setup-fb-24bpp.c
+++ b/arch/arm/mach-s5pv210/setup-fb-24bpp.c
@@ -13,9 +13,9 @@
13#include <linux/kernel.h> 13#include <linux/kernel.h>
14#include <linux/types.h> 14#include <linux/types.h>
15#include <linux/fb.h> 15#include <linux/fb.h>
16#include <linux/gpio.h>
16 17
17#include <mach/regs-fb.h> 18#include <mach/regs-fb.h>
18#include <mach/gpio.h>
19#include <mach/map.h> 19#include <mach/map.h>
20#include <plat/fb.h> 20#include <plat/fb.h>
21#include <mach/regs-clock.h> 21#include <mach/regs-clock.h>
diff --git a/arch/arm/mach-s5pv210/setup-i2c0.c b/arch/arm/mach-s5pv210/setup-i2c0.c
index c718253c70b..d38f7cb7e66 100644
--- a/arch/arm/mach-s5pv210/setup-i2c0.c
+++ b/arch/arm/mach-s5pv210/setup-i2c0.c
@@ -14,10 +14,10 @@
14 14
15#include <linux/kernel.h> 15#include <linux/kernel.h>
16#include <linux/types.h> 16#include <linux/types.h>
17#include <linux/gpio.h>
17 18
18struct platform_device; /* don't need the contents */ 19struct platform_device; /* don't need the contents */
19 20
20#include <mach/gpio.h>
21#include <plat/iic.h> 21#include <plat/iic.h>
22#include <plat/gpio-cfg.h> 22#include <plat/gpio-cfg.h>
23 23
diff --git a/arch/arm/mach-s5pv210/setup-i2c1.c b/arch/arm/mach-s5pv210/setup-i2c1.c
index 45e0e6ed2ed..148bb7857d8 100644
--- a/arch/arm/mach-s5pv210/setup-i2c1.c
+++ b/arch/arm/mach-s5pv210/setup-i2c1.c
@@ -14,10 +14,10 @@
14 14
15#include <linux/kernel.h> 15#include <linux/kernel.h>
16#include <linux/types.h> 16#include <linux/types.h>
17#include <linux/gpio.h>
17 18
18struct platform_device; /* don't need the contents */ 19struct platform_device; /* don't need the contents */
19 20
20#include <mach/gpio.h>
21#include <plat/iic.h> 21#include <plat/iic.h>
22#include <plat/gpio-cfg.h> 22#include <plat/gpio-cfg.h>
23 23
diff --git a/arch/arm/mach-s5pv210/setup-i2c2.c b/arch/arm/mach-s5pv210/setup-i2c2.c
index b11b4bff69a..2396cb8c373 100644
--- a/arch/arm/mach-s5pv210/setup-i2c2.c
+++ b/arch/arm/mach-s5pv210/setup-i2c2.c
@@ -14,10 +14,10 @@
14 14
15#include <linux/kernel.h> 15#include <linux/kernel.h>
16#include <linux/types.h> 16#include <linux/types.h>
17#include <linux/gpio.h>
17 18
18struct platform_device; /* don't need the contents */ 19struct platform_device; /* don't need the contents */
19 20
20#include <mach/gpio.h>
21#include <plat/iic.h> 21#include <plat/iic.h>
22#include <plat/gpio-cfg.h> 22#include <plat/gpio-cfg.h>
23 23
diff --git a/arch/arm/mach-s5pv210/setup-ide.c b/arch/arm/mach-s5pv210/setup-ide.c
new file mode 100644
index 00000000000..b558b1cc8d6
--- /dev/null
+++ b/arch/arm/mach-s5pv210/setup-ide.c
@@ -0,0 +1,50 @@
1/* linux/arch/arm/mach-s5pv210/setup-ide.c
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * S5PV210 setup information for IDE
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#include <linux/kernel.h>
14#include <linux/gpio.h>
15
16#include <plat/gpio-cfg.h>
17
18void s5pv210_ide_setup_gpio(void)
19{
20 unsigned int gpio = 0;
21
22 for (gpio = S5PV210_GPJ0(0); gpio <= S5PV210_GPJ0(7); gpio++) {
23 /* CF_Add[0 - 2], CF_IORDY, CF_INTRQ, CF_DMARQ, CF_DMARST,
24 CF_DMACK */
25 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(4));
26 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
27 s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
28 }
29
30 for (gpio = S5PV210_GPJ2(0); gpio <= S5PV210_GPJ2(7); gpio++) {
31 /*CF_Data[0 - 7] */
32 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(4));
33 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
34 s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
35 }
36
37 for (gpio = S5PV210_GPJ3(0); gpio <= S5PV210_GPJ3(7); gpio++) {
38 /* CF_Data[8 - 15] */
39 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(4));
40 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
41 s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
42 }
43
44 for (gpio = S5PV210_GPJ4(0); gpio <= S5PV210_GPJ4(3); gpio++) {
45 /* CF_CS0, CF_CS1, CF_IORD, CF_IOWR */
46 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(4));
47 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
48 s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
49 }
50}
diff --git a/arch/arm/mach-s5pv210/setup-keypad.c b/arch/arm/mach-s5pv210/setup-keypad.c
new file mode 100644
index 00000000000..37b2790aafc
--- /dev/null
+++ b/arch/arm/mach-s5pv210/setup-keypad.c
@@ -0,0 +1,34 @@
1/*
2 * linux/arch/arm/mach-s5pv210/setup-keypad.c
3 *
4 * Copyright (C) 2010 Samsung Electronics Co.Ltd
5 * Author: Joonyoung Shim <jy0922.shim@samsung.com>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 *
12 */
13
14#include <linux/gpio.h>
15#include <plat/gpio-cfg.h>
16
17void samsung_keypad_cfg_gpio(unsigned int rows, unsigned int cols)
18{
19 unsigned int gpio, end;
20
21 /* Set all the necessary GPH3 pins to special-function 3: KP_ROW[x] */
22 end = S5PV210_GPH3(rows);
23 for (gpio = S5PV210_GPH3(0); gpio < end; gpio++) {
24 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3));
25 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
26 }
27
28 /* Set all the necessary GPH2 pins to special-function 3: KP_COL[x] */
29 end = S5PV210_GPH2(cols);
30 for (gpio = S5PV210_GPH2(0); gpio < end; gpio++) {
31 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3));
32 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
33 }
34}
diff --git a/arch/arm/mach-s5pv210/setup-sdhci-gpio.c b/arch/arm/mach-s5pv210/setup-sdhci-gpio.c
index fe7d86dad14..b18587b1ec5 100644
--- a/arch/arm/mach-s5pv210/setup-sdhci-gpio.c
+++ b/arch/arm/mach-s5pv210/setup-sdhci-gpio.c
@@ -15,15 +15,17 @@
15#include <linux/interrupt.h> 15#include <linux/interrupt.h>
16#include <linux/platform_device.h> 16#include <linux/platform_device.h>
17#include <linux/io.h> 17#include <linux/io.h>
18#include <linux/gpio.h>
18#include <linux/mmc/host.h> 19#include <linux/mmc/host.h>
19#include <linux/mmc/card.h> 20#include <linux/mmc/card.h>
20 21
21#include <mach/gpio.h>
22#include <plat/gpio-cfg.h> 22#include <plat/gpio-cfg.h>
23#include <plat/regs-sdhci.h> 23#include <plat/regs-sdhci.h>
24#include <plat/sdhci.h>
24 25
25void s5pv210_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width) 26void s5pv210_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width)
26{ 27{
28 struct s3c_sdhci_platdata *pdata = dev->dev.platform_data;
27 unsigned int gpio; 29 unsigned int gpio;
28 30
29 /* Set all the necessary GPG0/GPG1 pins to special-function 2 */ 31 /* Set all the necessary GPG0/GPG1 pins to special-function 2 */
@@ -48,12 +50,15 @@ void s5pv210_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width)
48 break; 50 break;
49 } 51 }
50 52
51 s3c_gpio_setpull(S5PV210_GPG0(2), S3C_GPIO_PULL_UP); 53 if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) {
52 s3c_gpio_cfgpin(S5PV210_GPG0(2), S3C_GPIO_SFN(2)); 54 s3c_gpio_setpull(S5PV210_GPG0(2), S3C_GPIO_PULL_UP);
55 s3c_gpio_cfgpin(S5PV210_GPG0(2), S3C_GPIO_SFN(2));
56 }
53} 57}
54 58
55void s5pv210_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width) 59void s5pv210_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width)
56{ 60{
61 struct s3c_sdhci_platdata *pdata = dev->dev.platform_data;
57 unsigned int gpio; 62 unsigned int gpio;
58 63
59 /* Set all the necessary GPG1[0:1] pins to special-function 2 */ 64 /* Set all the necessary GPG1[0:1] pins to special-function 2 */
@@ -68,12 +73,15 @@ void s5pv210_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width)
68 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); 73 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
69 } 74 }
70 75
71 s3c_gpio_setpull(S5PV210_GPG1(2), S3C_GPIO_PULL_UP); 76 if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) {
72 s3c_gpio_cfgpin(S5PV210_GPG1(2), S3C_GPIO_SFN(2)); 77 s3c_gpio_setpull(S5PV210_GPG1(2), S3C_GPIO_PULL_UP);
78 s3c_gpio_cfgpin(S5PV210_GPG1(2), S3C_GPIO_SFN(2));
79 }
73} 80}
74 81
75void s5pv210_setup_sdhci2_cfg_gpio(struct platform_device *dev, int width) 82void s5pv210_setup_sdhci2_cfg_gpio(struct platform_device *dev, int width)
76{ 83{
84 struct s3c_sdhci_platdata *pdata = dev->dev.platform_data;
77 unsigned int gpio; 85 unsigned int gpio;
78 86
79 /* Set all the necessary GPG2[0:1] pins to special-function 2 */ 87 /* Set all the necessary GPG2[0:1] pins to special-function 2 */
@@ -99,6 +107,31 @@ void s5pv210_setup_sdhci2_cfg_gpio(struct platform_device *dev, int width)
99 break; 107 break;
100 } 108 }
101 109
102 s3c_gpio_setpull(S5PV210_GPG2(2), S3C_GPIO_PULL_UP); 110 if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) {
103 s3c_gpio_cfgpin(S5PV210_GPG2(2), S3C_GPIO_SFN(2)); 111 s3c_gpio_setpull(S5PV210_GPG2(2), S3C_GPIO_PULL_UP);
112 s3c_gpio_cfgpin(S5PV210_GPG2(2), S3C_GPIO_SFN(2));
113 }
114}
115
116void s5pv210_setup_sdhci3_cfg_gpio(struct platform_device *dev, int width)
117{
118 struct s3c_sdhci_platdata *pdata = dev->dev.platform_data;
119 unsigned int gpio;
120
121 /* Set all the necessary GPG3[0:2] pins to special-function 2 */
122 for (gpio = S5PV210_GPG3(0); gpio < S5PV210_GPG3(2); gpio++) {
123 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
124 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
125 }
126
127 /* Data pin GPG3[3:6] to special-function 2 */
128 for (gpio = S5PV210_GPG3(3); gpio <= S5PV210_GPG3(6); gpio++) {
129 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
130 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
131 }
132
133 if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) {
134 s3c_gpio_setpull(S5PV210_GPG3(2), S3C_GPIO_PULL_UP);
135 s3c_gpio_cfgpin(S5PV210_GPG3(2), S3C_GPIO_SFN(2));
136 }
104} 137}
diff --git a/arch/arm/mach-s5pv210/setup-sdhci.c b/arch/arm/mach-s5pv210/setup-sdhci.c
index 51815ec60c2..c32e202731c 100644
--- a/arch/arm/mach-s5pv210/setup-sdhci.c
+++ b/arch/arm/mach-s5pv210/setup-sdhci.c
@@ -26,9 +26,9 @@
26 26
27char *s5pv210_hsmmc_clksrcs[4] = { 27char *s5pv210_hsmmc_clksrcs[4] = {
28 [0] = "hsmmc", /* HCLK */ 28 [0] = "hsmmc", /* HCLK */
29 [1] = "hsmmc", /* HCLK */ 29 /* [1] = "hsmmc", - duplicate HCLK entry */
30 [2] = "sclk_mmc", /* mmc_bus */ 30 [2] = "sclk_mmc", /* mmc_bus */
31 /*[4] = reserved */ 31 /* [3] = NULL, - reserved */
32}; 32};
33 33
34void s5pv210_setup_sdhci_cfg_card(struct platform_device *dev, 34void s5pv210_setup_sdhci_cfg_card(struct platform_device *dev,
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-18 20:55:49 -0400