aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-s5pc100/clock.c
diff options
context:
space:
mode:
Diffstat (limited to 'arch/arm/mach-s5pc100/clock.c')
-rw-r--r--arch/arm/mach-s5pc100/clock.c33
1 files changed, 23 insertions, 10 deletions
diff --git a/arch/arm/mach-s5pc100/clock.c b/arch/arm/mach-s5pc100/clock.c
index c4c74893f53..49f8c30d58d 100644
--- a/arch/arm/mach-s5pc100/clock.c
+++ b/arch/arm/mach-s5pc100/clock.c
@@ -963,16 +963,6 @@ static struct clksrc_clk clksrcs[] = {
963 .reg_div = { .reg = S5P_CLK_DIV2, .shift = 12, .size = 4 }, 963 .reg_div = { .reg = S5P_CLK_DIV2, .shift = 12, .size = 4 },
964 }, { 964 }, {
965 .clk = { 965 .clk = {
966 .name = "uclk1",
967 .ctrlbit = (1 << 3),
968 .enable = s5pc100_sclk0_ctrl,
969
970 },
971 .sources = &clk_src_group2,
972 .reg_src = { .reg = S5P_CLK_SRC1, .shift = 0, .size = 1 },
973 .reg_div = { .reg = S5P_CLK_DIV2, .shift = 0, .size = 4 },
974 }, {
975 .clk = {
976 .name = "sclk_mixer", 966 .name = "sclk_mixer",
977 .ctrlbit = (1 << 6), 967 .ctrlbit = (1 << 6),
978 .enable = s5pc100_sclk0_ctrl, 968 .enable = s5pc100_sclk0_ctrl,
@@ -1099,6 +1089,17 @@ static struct clksrc_clk clksrcs[] = {
1099 }, 1089 },
1100}; 1090};
1101 1091
1092static struct clksrc_clk clk_sclk_uart = {
1093 .clk = {
1094 .name = "uclk1",
1095 .ctrlbit = (1 << 3),
1096 .enable = s5pc100_sclk0_ctrl,
1097 },
1098 .sources = &clk_src_group2,
1099 .reg_src = { .reg = S5P_CLK_SRC1, .shift = 0, .size = 1 },
1100 .reg_div = { .reg = S5P_CLK_DIV2, .shift = 0, .size = 4 },
1101};
1102
1102/* Clock initialisation code */ 1103/* Clock initialisation code */
1103static struct clksrc_clk *sysclks[] = { 1104static struct clksrc_clk *sysclks[] = {
1104 &clk_mout_apll, 1105 &clk_mout_apll,
@@ -1128,6 +1129,10 @@ static struct clksrc_clk *sysclks[] = {
1128 &clk_sclk_spdif, 1129 &clk_sclk_spdif,
1129}; 1130};
1130 1131
1132static struct clksrc_clk *clksrc_cdev[] = {
1133 &clk_sclk_uart,
1134};
1135
1131void __init_or_cpufreq s5pc100_setup_clocks(void) 1136void __init_or_cpufreq s5pc100_setup_clocks(void)
1132{ 1137{
1133 unsigned long xtal; 1138 unsigned long xtal;
@@ -1267,6 +1272,11 @@ static struct clk *clks[] __initdata = {
1267 &clk_pcmcdclk1, 1272 &clk_pcmcdclk1,
1268}; 1273};
1269 1274
1275static struct clk_lookup s5pc100_clk_lookup[] = {
1276 CLKDEV_INIT(NULL, "clk_uart_baud2", &clk_p),
1277 CLKDEV_INIT(NULL, "clk_uart_baud3", &clk_sclk_uart.clk),
1278};
1279
1270void __init s5pc100_register_clocks(void) 1280void __init s5pc100_register_clocks(void)
1271{ 1281{
1272 int ptr; 1282 int ptr;
@@ -1278,9 +1288,12 @@ void __init s5pc100_register_clocks(void)
1278 1288
1279 s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs)); 1289 s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs));
1280 s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks)); 1290 s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));
1291 for (ptr = 0; ptr < ARRAY_SIZE(clksrc_cdev); ptr++)
1292 s3c_register_clksrc(clksrc_cdev[ptr], 1);
1281 1293
1282 s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); 1294 s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
1283 s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); 1295 s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
1296 clkdev_add_table(s5pc100_clk_lookup, ARRAY_SIZE(s5pc100_clk_lookup));
1284 1297
1285 s3c24xx_register_clock(&dummy_apb_pclk); 1298 s3c24xx_register_clock(&dummy_apb_pclk);
1286 1299