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-rw-r--r--arch/arm/mach-s5p6442/include/mach/dma.h26
-rw-r--r--arch/arm/mach-s5p6442/include/mach/map.h11
-rw-r--r--arch/arm/mach-s5p6442/include/mach/pwm-clock.h21
3 files changed, 48 insertions, 10 deletions
diff --git a/arch/arm/mach-s5p6442/include/mach/dma.h b/arch/arm/mach-s5p6442/include/mach/dma.h
new file mode 100644
index 00000000000..81209eb1409
--- /dev/null
+++ b/arch/arm/mach-s5p6442/include/mach/dma.h
@@ -0,0 +1,26 @@
1/*
2 * Copyright (C) 2010 Samsung Electronics Co. Ltd.
3 * Jaswinder Singh <jassi.brar@samsung.com>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
18 */
19
20#ifndef __MACH_DMA_H
21#define __MACH_DMA_H
22
23/* This platform uses the common S3C DMA API driver for PL330 */
24#include <plat/s3c-dma-pl330.h>
25
26#endif /* __MACH_DMA_H */
diff --git a/arch/arm/mach-s5p6442/include/mach/map.h b/arch/arm/mach-s5p6442/include/mach/map.h
index 685277d792f..7568dc0d6be 100644
--- a/arch/arm/mach-s5p6442/include/mach/map.h
+++ b/arch/arm/mach-s5p6442/include/mach/map.h
@@ -34,6 +34,9 @@
34#define S5P6442_PA_VIC2 (0xE4200000) 34#define S5P6442_PA_VIC2 (0xE4200000)
35#define S5P_PA_VIC2 S5P6442_PA_VIC2 35#define S5P_PA_VIC2 S5P6442_PA_VIC2
36 36
37#define S5P6442_PA_MDMA 0xE8000000
38#define S5P6442_PA_PDMA 0xE9000000
39
37#define S5P6442_PA_TIMER (0xEA000000) 40#define S5P6442_PA_TIMER (0xEA000000)
38#define S5P_PA_TIMER S5P6442_PA_TIMER 41#define S5P_PA_TIMER S5P6442_PA_TIMER
39 42
@@ -51,6 +54,14 @@
51#define S5P6442_PA_SDRAM (0x20000000) 54#define S5P6442_PA_SDRAM (0x20000000)
52#define S5P_PA_SDRAM S5P6442_PA_SDRAM 55#define S5P_PA_SDRAM S5P6442_PA_SDRAM
53 56
57/* I2S */
58#define S5P6442_PA_I2S0 0xC0B00000
59#define S5P6442_PA_I2S1 0xF2200000
60
61/* PCM */
62#define S5P6442_PA_PCM0 0xF2400000
63#define S5P6442_PA_PCM1 0xF2500000
64
54/* compatibiltiy defines. */ 65/* compatibiltiy defines. */
55#define S3C_PA_UART S5P6442_PA_UART 66#define S3C_PA_UART S5P6442_PA_UART
56#define S3C_PA_IIC S5P6442_PA_IIC0 67#define S3C_PA_IIC S5P6442_PA_IIC0
diff --git a/arch/arm/mach-s5p6442/include/mach/pwm-clock.h b/arch/arm/mach-s5p6442/include/mach/pwm-clock.h
index 15e8525da0f..2724b37def3 100644
--- a/arch/arm/mach-s5p6442/include/mach/pwm-clock.h
+++ b/arch/arm/mach-s5p6442/include/mach/pwm-clock.h
@@ -1,13 +1,14 @@
1/* linux/arch/arm/mach-s5p6442/include/mach/pwm-clock.h 1/* linux/arch/arm/mach-s5p6442/include/mach/pwm-clock.h
2 * 2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * Copyright 2008 Openmoko, Inc.
3 * Copyright 2008 Simtec Electronics 7 * Copyright 2008 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk> 8 * Ben Dooks <ben@simtec.co.uk>
5 * http://armlinux.simtec.co.uk/ 9 * http://armlinux.simtec.co.uk/
6 * 10 *
7 * Copyright 2010 Samsung Electronics Co., Ltd. 11 * Based on arch/arm/mach-s3c64xx/include/mach/pwm-clock.h
8 * http://www.samsung.com/
9 *
10 * Based on arch/arm/plat-s3c24xx/include/mach/pwm-clock.h
11 * 12 *
12 * S5P6442 - pwm clock and timer support 13 * S5P6442 - pwm clock and timer support
13 * 14 *
@@ -21,14 +22,14 @@
21 22
22/** 23/**
23 * pwm_cfg_src_is_tclk() - return whether the given mux config is a tclk 24 * pwm_cfg_src_is_tclk() - return whether the given mux config is a tclk
24 * @cfg: The timer TCFG1 register bits shifted down to 0. 25 * @tcfg: The timer TCFG1 register bits shifted down to 0.
25 * 26 *
26 * Return true if the given configuration from TCFG1 is a TCLK instead 27 * Return true if the given configuration from TCFG1 is a TCLK instead
27 * any of the TDIV clocks. 28 * any of the TDIV clocks.
28 */ 29 */
29static inline int pwm_cfg_src_is_tclk(unsigned long tcfg) 30static inline int pwm_cfg_src_is_tclk(unsigned long tcfg)
30{ 31{
31 return tcfg == S3C2410_TCFG1_MUX_TCLK; 32 return tcfg == S3C64XX_TCFG1_MUX_TCLK;
32} 33}
33 34
34/** 35/**
@@ -40,7 +41,7 @@ static inline int pwm_cfg_src_is_tclk(unsigned long tcfg)
40 */ 41 */
41static inline unsigned long tcfg_to_divisor(unsigned long tcfg1) 42static inline unsigned long tcfg_to_divisor(unsigned long tcfg1)
42{ 43{
43 return 1 << (1 + tcfg1); 44 return 1 << tcfg1;
44} 45}
45 46
46/** 47/**
@@ -50,7 +51,7 @@ static inline unsigned long tcfg_to_divisor(unsigned long tcfg1)
50 */ 51 */
51static inline unsigned int pwm_tdiv_has_div1(void) 52static inline unsigned int pwm_tdiv_has_div1(void)
52{ 53{
53 return 0; 54 return 1;
54} 55}
55 56
56/** 57/**
@@ -61,9 +62,9 @@ static inline unsigned int pwm_tdiv_has_div1(void)
61 */ 62 */
62static inline unsigned long pwm_tdiv_div_bits(unsigned int div) 63static inline unsigned long pwm_tdiv_div_bits(unsigned int div)
63{ 64{
64 return ilog2(div) - 1; 65 return ilog2(div);
65} 66}
66 67
67#define S3C_TCFG1_MUX_TCLK S3C2410_TCFG1_MUX_TCLK 68#define S3C_TCFG1_MUX_TCLK S3C64XX_TCFG1_MUX_TCLK
68 69
69#endif /* __ASM_ARCH_PWMCLK_H */ 70#endif /* __ASM_ARCH_PWMCLK_H */