diff options
Diffstat (limited to 'arch/arm/mach-s3c2410')
-rw-r--r-- | arch/arm/mach-s3c2410/Makefile | 5 | ||||
-rw-r--r-- | arch/arm/mach-s3c2410/cpu.c | 18 | ||||
-rw-r--r-- | arch/arm/mach-s3c2410/gpio.c | 72 | ||||
-rw-r--r-- | arch/arm/mach-s3c2410/s3c2400-gpio.c | 45 | ||||
-rw-r--r-- | arch/arm/mach-s3c2410/s3c2410-gpio.c | 93 | ||||
-rw-r--r-- | arch/arm/mach-s3c2410/sleep.S | 2 |
6 files changed, 168 insertions, 67 deletions
diff --git a/arch/arm/mach-s3c2410/Makefile b/arch/arm/mach-s3c2410/Makefile index b4f1e051c76..1217bf00309 100644 --- a/arch/arm/mach-s3c2410/Makefile +++ b/arch/arm/mach-s3c2410/Makefile | |||
@@ -10,9 +10,13 @@ obj-m := | |||
10 | obj-n := | 10 | obj-n := |
11 | obj- := | 11 | obj- := |
12 | 12 | ||
13 | # S3C2400 support files | ||
14 | obj-$(CONFIG_CPU_S3C2400) += s3c2400-gpio.o | ||
15 | |||
13 | # S3C2410 support files | 16 | # S3C2410 support files |
14 | 17 | ||
15 | obj-$(CONFIG_CPU_S3C2410) += s3c2410.o | 18 | obj-$(CONFIG_CPU_S3C2410) += s3c2410.o |
19 | obj-$(CONFIG_CPU_S3C2410) += s3c2410-gpio.o | ||
16 | obj-$(CONFIG_S3C2410_DMA) += dma.o | 20 | obj-$(CONFIG_S3C2410_DMA) += dma.o |
17 | 21 | ||
18 | # Power Management support | 22 | # Power Management support |
@@ -25,6 +29,7 @@ obj-$(CONFIG_PM_SIMTEC) += pm-simtec.o | |||
25 | obj-$(CONFIG_CPU_S3C2440) += s3c2440.o s3c2440-dsc.o | 29 | obj-$(CONFIG_CPU_S3C2440) += s3c2440.o s3c2440-dsc.o |
26 | obj-$(CONFIG_CPU_S3C2440) += s3c2440-irq.o | 30 | obj-$(CONFIG_CPU_S3C2440) += s3c2440-irq.o |
27 | obj-$(CONFIG_CPU_S3C2440) += s3c2440-clock.o | 31 | obj-$(CONFIG_CPU_S3C2440) += s3c2440-clock.o |
32 | obj-$(CONFIG_CPU_S3C2440) += s3c2410-gpio.o | ||
28 | 33 | ||
29 | # bast extras | 34 | # bast extras |
30 | 35 | ||
diff --git a/arch/arm/mach-s3c2410/cpu.c b/arch/arm/mach-s3c2410/cpu.c index 687fe371369..00a379334b6 100644 --- a/arch/arm/mach-s3c2410/cpu.c +++ b/arch/arm/mach-s3c2410/cpu.c | |||
@@ -40,6 +40,7 @@ | |||
40 | 40 | ||
41 | #include "cpu.h" | 41 | #include "cpu.h" |
42 | #include "clock.h" | 42 | #include "clock.h" |
43 | #include "s3c2400.h" | ||
43 | #include "s3c2410.h" | 44 | #include "s3c2410.h" |
44 | #include "s3c2440.h" | 45 | #include "s3c2440.h" |
45 | 46 | ||
@@ -55,6 +56,7 @@ struct cpu_table { | |||
55 | 56 | ||
56 | /* table of supported CPUs */ | 57 | /* table of supported CPUs */ |
57 | 58 | ||
59 | static const char name_s3c2400[] = "S3C2400"; | ||
58 | static const char name_s3c2410[] = "S3C2410"; | 60 | static const char name_s3c2410[] = "S3C2410"; |
59 | static const char name_s3c2440[] = "S3C2440"; | 61 | static const char name_s3c2440[] = "S3C2440"; |
60 | static const char name_s3c2410a[] = "S3C2410A"; | 62 | static const char name_s3c2410a[] = "S3C2410A"; |
@@ -96,7 +98,16 @@ static struct cpu_table cpu_ids[] __initdata = { | |||
96 | .init_uarts = s3c2440_init_uarts, | 98 | .init_uarts = s3c2440_init_uarts, |
97 | .init = s3c2440_init, | 99 | .init = s3c2440_init, |
98 | .name = name_s3c2440a | 100 | .name = name_s3c2440a |
99 | } | 101 | }, |
102 | { | ||
103 | .idcode = 0x0, /* S3C2400 doesn't have an idcode */ | ||
104 | .idmask = 0xffffffff, | ||
105 | .map_io = s3c2400_map_io, | ||
106 | .init_clocks = s3c2400_init_clocks, | ||
107 | .init_uarts = s3c2400_init_uarts, | ||
108 | .init = s3c2400_init, | ||
109 | .name = name_s3c2400 | ||
110 | }, | ||
100 | }; | 111 | }; |
101 | 112 | ||
102 | /* minimal IO mapping */ | 113 | /* minimal IO mapping */ |
@@ -148,12 +159,15 @@ static struct cpu_table *cpu; | |||
148 | 159 | ||
149 | void __init s3c24xx_init_io(struct map_desc *mach_desc, int size) | 160 | void __init s3c24xx_init_io(struct map_desc *mach_desc, int size) |
150 | { | 161 | { |
151 | unsigned long idcode; | 162 | unsigned long idcode = 0x0; |
152 | 163 | ||
153 | /* initialise the io descriptors we need for initialisation */ | 164 | /* initialise the io descriptors we need for initialisation */ |
154 | iotable_init(s3c_iodesc, ARRAY_SIZE(s3c_iodesc)); | 165 | iotable_init(s3c_iodesc, ARRAY_SIZE(s3c_iodesc)); |
155 | 166 | ||
167 | #ifndef CONFIG_CPU_S3C2400 | ||
156 | idcode = __raw_readl(S3C2410_GSTATUS1); | 168 | idcode = __raw_readl(S3C2410_GSTATUS1); |
169 | #endif | ||
170 | |||
157 | cpu = s3c_lookup_cpu(idcode); | 171 | cpu = s3c_lookup_cpu(idcode); |
158 | 172 | ||
159 | if (cpu == NULL) { | 173 | if (cpu == NULL) { |
diff --git a/arch/arm/mach-s3c2410/gpio.c b/arch/arm/mach-s3c2410/gpio.c index 23ea3d5fa09..cd39e868458 100644 --- a/arch/arm/mach-s3c2410/gpio.c +++ b/arch/arm/mach-s3c2410/gpio.c | |||
@@ -31,6 +31,7 @@ | |||
31 | * 05-Nov-2004 BJD EXPORT_SYMBOL() added for all code | 31 | * 05-Nov-2004 BJD EXPORT_SYMBOL() added for all code |
32 | * 13-Mar-2005 BJD Updates for __iomem | 32 | * 13-Mar-2005 BJD Updates for __iomem |
33 | * 26-Oct-2005 BJD Added generic configuration types | 33 | * 26-Oct-2005 BJD Added generic configuration types |
34 | * 15-Jan-2006 LCVR Added support for the S3C2400 | ||
34 | */ | 35 | */ |
35 | 36 | ||
36 | 37 | ||
@@ -48,7 +49,7 @@ | |||
48 | 49 | ||
49 | void s3c2410_gpio_cfgpin(unsigned int pin, unsigned int function) | 50 | void s3c2410_gpio_cfgpin(unsigned int pin, unsigned int function) |
50 | { | 51 | { |
51 | void __iomem *base = S3C2410_GPIO_BASE(pin); | 52 | void __iomem *base = S3C24XX_GPIO_BASE(pin); |
52 | unsigned long mask; | 53 | unsigned long mask; |
53 | unsigned long con; | 54 | unsigned long con; |
54 | unsigned long flags; | 55 | unsigned long flags; |
@@ -95,7 +96,7 @@ EXPORT_SYMBOL(s3c2410_gpio_cfgpin); | |||
95 | 96 | ||
96 | unsigned int s3c2410_gpio_getcfg(unsigned int pin) | 97 | unsigned int s3c2410_gpio_getcfg(unsigned int pin) |
97 | { | 98 | { |
98 | void __iomem *base = S3C2410_GPIO_BASE(pin); | 99 | void __iomem *base = S3C24XX_GPIO_BASE(pin); |
99 | unsigned long mask; | 100 | unsigned long mask; |
100 | 101 | ||
101 | if (pin < S3C2410_GPIO_BANKB) { | 102 | if (pin < S3C2410_GPIO_BANKB) { |
@@ -111,7 +112,7 @@ EXPORT_SYMBOL(s3c2410_gpio_getcfg); | |||
111 | 112 | ||
112 | void s3c2410_gpio_pullup(unsigned int pin, unsigned int to) | 113 | void s3c2410_gpio_pullup(unsigned int pin, unsigned int to) |
113 | { | 114 | { |
114 | void __iomem *base = S3C2410_GPIO_BASE(pin); | 115 | void __iomem *base = S3C24XX_GPIO_BASE(pin); |
115 | unsigned long offs = S3C2410_GPIO_OFFSET(pin); | 116 | unsigned long offs = S3C2410_GPIO_OFFSET(pin); |
116 | unsigned long flags; | 117 | unsigned long flags; |
117 | unsigned long up; | 118 | unsigned long up; |
@@ -133,7 +134,7 @@ EXPORT_SYMBOL(s3c2410_gpio_pullup); | |||
133 | 134 | ||
134 | void s3c2410_gpio_setpin(unsigned int pin, unsigned int to) | 135 | void s3c2410_gpio_setpin(unsigned int pin, unsigned int to) |
135 | { | 136 | { |
136 | void __iomem *base = S3C2410_GPIO_BASE(pin); | 137 | void __iomem *base = S3C24XX_GPIO_BASE(pin); |
137 | unsigned long offs = S3C2410_GPIO_OFFSET(pin); | 138 | unsigned long offs = S3C2410_GPIO_OFFSET(pin); |
138 | unsigned long flags; | 139 | unsigned long flags; |
139 | unsigned long dat; | 140 | unsigned long dat; |
@@ -152,7 +153,7 @@ EXPORT_SYMBOL(s3c2410_gpio_setpin); | |||
152 | 153 | ||
153 | unsigned int s3c2410_gpio_getpin(unsigned int pin) | 154 | unsigned int s3c2410_gpio_getpin(unsigned int pin) |
154 | { | 155 | { |
155 | void __iomem *base = S3C2410_GPIO_BASE(pin); | 156 | void __iomem *base = S3C24XX_GPIO_BASE(pin); |
156 | unsigned long offs = S3C2410_GPIO_OFFSET(pin); | 157 | unsigned long offs = S3C2410_GPIO_OFFSET(pin); |
157 | 158 | ||
158 | return __raw_readl(base + 0x04) & (1<< offs); | 159 | return __raw_readl(base + 0x04) & (1<< offs); |
@@ -166,70 +167,13 @@ unsigned int s3c2410_modify_misccr(unsigned int clear, unsigned int change) | |||
166 | unsigned long misccr; | 167 | unsigned long misccr; |
167 | 168 | ||
168 | local_irq_save(flags); | 169 | local_irq_save(flags); |
169 | misccr = __raw_readl(S3C2410_MISCCR); | 170 | misccr = __raw_readl(S3C24XX_MISCCR); |
170 | misccr &= ~clear; | 171 | misccr &= ~clear; |
171 | misccr ^= change; | 172 | misccr ^= change; |
172 | __raw_writel(misccr, S3C2410_MISCCR); | 173 | __raw_writel(misccr, S3C24XX_MISCCR); |
173 | local_irq_restore(flags); | 174 | local_irq_restore(flags); |
174 | 175 | ||
175 | return misccr; | 176 | return misccr; |
176 | } | 177 | } |
177 | 178 | ||
178 | EXPORT_SYMBOL(s3c2410_modify_misccr); | 179 | EXPORT_SYMBOL(s3c2410_modify_misccr); |
179 | |||
180 | int s3c2410_gpio_getirq(unsigned int pin) | ||
181 | { | ||
182 | if (pin < S3C2410_GPF0 || pin > S3C2410_GPG15_EINT23) | ||
183 | return -1; /* not valid interrupts */ | ||
184 | |||
185 | if (pin < S3C2410_GPG0 && pin > S3C2410_GPF7) | ||
186 | return -1; /* not valid pin */ | ||
187 | |||
188 | if (pin < S3C2410_GPF4) | ||
189 | return (pin - S3C2410_GPF0) + IRQ_EINT0; | ||
190 | |||
191 | if (pin < S3C2410_GPG0) | ||
192 | return (pin - S3C2410_GPF4) + IRQ_EINT4; | ||
193 | |||
194 | return (pin - S3C2410_GPG0) + IRQ_EINT8; | ||
195 | } | ||
196 | |||
197 | EXPORT_SYMBOL(s3c2410_gpio_getirq); | ||
198 | |||
199 | int s3c2410_gpio_irqfilter(unsigned int pin, unsigned int on, | ||
200 | unsigned int config) | ||
201 | { | ||
202 | void __iomem *reg = S3C2410_EINFLT0; | ||
203 | unsigned long flags; | ||
204 | unsigned long val; | ||
205 | |||
206 | if (pin < S3C2410_GPG8 || pin > S3C2410_GPG15) | ||
207 | return -1; | ||
208 | |||
209 | config &= 0xff; | ||
210 | |||
211 | pin -= S3C2410_GPG8_EINT16; | ||
212 | reg += pin & ~3; | ||
213 | |||
214 | local_irq_save(flags); | ||
215 | |||
216 | /* update filter width and clock source */ | ||
217 | |||
218 | val = __raw_readl(reg); | ||
219 | val &= ~(0xff << ((pin & 3) * 8)); | ||
220 | val |= config << ((pin & 3) * 8); | ||
221 | __raw_writel(val, reg); | ||
222 | |||
223 | /* update filter enable */ | ||
224 | |||
225 | val = __raw_readl(S3C2410_EXTINT2); | ||
226 | val &= ~(1 << ((pin * 4) + 3)); | ||
227 | val |= on << ((pin * 4) + 3); | ||
228 | __raw_writel(val, S3C2410_EXTINT2); | ||
229 | |||
230 | local_irq_restore(flags); | ||
231 | |||
232 | return 0; | ||
233 | } | ||
234 | |||
235 | EXPORT_SYMBOL(s3c2410_gpio_irqfilter); | ||
diff --git a/arch/arm/mach-s3c2410/s3c2400-gpio.c b/arch/arm/mach-s3c2410/s3c2400-gpio.c new file mode 100644 index 00000000000..5127f39fa9b --- /dev/null +++ b/arch/arm/mach-s3c2410/s3c2400-gpio.c | |||
@@ -0,0 +1,45 @@ | |||
1 | /* linux/arch/arm/mach-s3c2410/gpio.c | ||
2 | * | ||
3 | * Copyright (c) 2006 Lucas Correia Villa Real <lucasvr@gobolinux.org> | ||
4 | * | ||
5 | * S3C2400 GPIO support | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License as published by | ||
9 | * the Free Software Foundation; either version 2 of the License, or | ||
10 | * (at your option) any later version. | ||
11 | * | ||
12 | * This program is distributed in the hope that it will be useful, | ||
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
15 | * GNU General Public License for more details. | ||
16 | * | ||
17 | * You should have received a copy of the GNU General Public License | ||
18 | * along with this program; if not, write to the Free Software | ||
19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
20 | * | ||
21 | * Changelog | ||
22 | * 15-Jan-2006 LCVR Splitted from gpio.c, adding support for the S3C2400 | ||
23 | */ | ||
24 | |||
25 | #include <linux/kernel.h> | ||
26 | #include <linux/init.h> | ||
27 | #include <linux/module.h> | ||
28 | #include <linux/interrupt.h> | ||
29 | #include <linux/ioport.h> | ||
30 | |||
31 | #include <asm/hardware.h> | ||
32 | #include <asm/irq.h> | ||
33 | #include <asm/io.h> | ||
34 | |||
35 | #include <asm/arch/regs-gpio.h> | ||
36 | |||
37 | int s3c2400_gpio_getirq(unsigned int pin) | ||
38 | { | ||
39 | if (pin < S3C2410_GPE0 || pin > S3C2400_GPE7_EINT7) | ||
40 | return -1; /* not valid interrupts */ | ||
41 | |||
42 | return (pin - S3C2410_GPE0) + IRQ_EINT0; | ||
43 | } | ||
44 | |||
45 | EXPORT_SYMBOL(s3c2400_gpio_getirq); | ||
diff --git a/arch/arm/mach-s3c2410/s3c2410-gpio.c b/arch/arm/mach-s3c2410/s3c2410-gpio.c new file mode 100644 index 00000000000..d5e1caea1d2 --- /dev/null +++ b/arch/arm/mach-s3c2410/s3c2410-gpio.c | |||
@@ -0,0 +1,93 @@ | |||
1 | /* linux/arch/arm/mach-s3c2410/gpio.c | ||
2 | * | ||
3 | * Copyright (c) 2004-2006 Simtec Electronics | ||
4 | * Ben Dooks <ben@simtec.co.uk> | ||
5 | * | ||
6 | * S3C2410 GPIO support | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License as published by | ||
10 | * the Free Software Foundation; either version 2 of the License, or | ||
11 | * (at your option) any later version. | ||
12 | * | ||
13 | * This program is distributed in the hope that it will be useful, | ||
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
16 | * GNU General Public License for more details. | ||
17 | * | ||
18 | * You should have received a copy of the GNU General Public License | ||
19 | * along with this program; if not, write to the Free Software | ||
20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
21 | * | ||
22 | * Changelog | ||
23 | * 15-Jan-2006 LCVR Splitted from gpio.c | ||
24 | */ | ||
25 | |||
26 | #include <linux/kernel.h> | ||
27 | #include <linux/init.h> | ||
28 | #include <linux/module.h> | ||
29 | #include <linux/interrupt.h> | ||
30 | #include <linux/ioport.h> | ||
31 | |||
32 | #include <asm/hardware.h> | ||
33 | #include <asm/irq.h> | ||
34 | #include <asm/io.h> | ||
35 | |||
36 | #include <asm/arch/regs-gpio.h> | ||
37 | |||
38 | int s3c2410_gpio_irqfilter(unsigned int pin, unsigned int on, | ||
39 | unsigned int config) | ||
40 | { | ||
41 | void __iomem *reg = S3C2410_EINFLT0; | ||
42 | unsigned long flags; | ||
43 | unsigned long val; | ||
44 | |||
45 | if (pin < S3C2410_GPG8 || pin > S3C2410_GPG15) | ||
46 | return -1; | ||
47 | |||
48 | config &= 0xff; | ||
49 | |||
50 | pin -= S3C2410_GPG8_EINT16; | ||
51 | reg += pin & ~3; | ||
52 | |||
53 | local_irq_save(flags); | ||
54 | |||
55 | /* update filter width and clock source */ | ||
56 | |||
57 | val = __raw_readl(reg); | ||
58 | val &= ~(0xff << ((pin & 3) * 8)); | ||
59 | val |= config << ((pin & 3) * 8); | ||
60 | __raw_writel(val, reg); | ||
61 | |||
62 | /* update filter enable */ | ||
63 | |||
64 | val = __raw_readl(S3C2410_EXTINT2); | ||
65 | val &= ~(1 << ((pin * 4) + 3)); | ||
66 | val |= on << ((pin * 4) + 3); | ||
67 | __raw_writel(val, S3C2410_EXTINT2); | ||
68 | |||
69 | local_irq_restore(flags); | ||
70 | |||
71 | return 0; | ||
72 | } | ||
73 | |||
74 | EXPORT_SYMBOL(s3c2410_gpio_irqfilter); | ||
75 | |||
76 | int s3c2410_gpio_getirq(unsigned int pin) | ||
77 | { | ||
78 | if (pin < S3C2410_GPF0 || pin > S3C2410_GPG15_EINT23) | ||
79 | return -1; /* not valid interrupts */ | ||
80 | |||
81 | if (pin < S3C2410_GPG0 && pin > S3C2410_GPF7) | ||
82 | return -1; /* not valid pin */ | ||
83 | |||
84 | if (pin < S3C2410_GPF4) | ||
85 | return (pin - S3C2410_GPF0) + IRQ_EINT0; | ||
86 | |||
87 | if (pin < S3C2410_GPG0) | ||
88 | return (pin - S3C2410_GPF4) + IRQ_EINT4; | ||
89 | |||
90 | return (pin - S3C2410_GPG0) + IRQ_EINT8; | ||
91 | } | ||
92 | |||
93 | EXPORT_SYMBOL(s3c2410_gpio_getirq); | ||
diff --git a/arch/arm/mach-s3c2410/sleep.S b/arch/arm/mach-s3c2410/sleep.S index e9a055b779b..832fb86a03b 100644 --- a/arch/arm/mach-s3c2410/sleep.S +++ b/arch/arm/mach-s3c2410/sleep.S | |||
@@ -72,7 +72,7 @@ ENTRY(s3c2410_cpu_suspend) | |||
72 | @@ prepare cpu to sleep | 72 | @@ prepare cpu to sleep |
73 | 73 | ||
74 | ldr r4, =S3C2410_REFRESH | 74 | ldr r4, =S3C2410_REFRESH |
75 | ldr r5, =S3C2410_MISCCR | 75 | ldr r5, =S3C24XX_MISCCR |
76 | ldr r6, =S3C2410_CLKCON | 76 | ldr r6, =S3C2410_CLKCON |
77 | ldr r7, [ r4 ] @ get REFRESH (and ensure in TLB) | 77 | ldr r7, [ r4 ] @ get REFRESH (and ensure in TLB) |
78 | ldr r8, [ r5 ] @ get MISCCR (and ensure in TLB) | 78 | ldr r8, [ r5 ] @ get MISCCR (and ensure in TLB) |