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-rw-r--r--arch/arm/mach-pxa/include/mach/pcm990_baseboard.h68
-rw-r--r--arch/arm/mach-pxa/pcm990-baseboard.c83
2 files changed, 52 insertions, 99 deletions
diff --git a/arch/arm/mach-pxa/include/mach/pcm990_baseboard.h b/arch/arm/mach-pxa/include/mach/pcm990_baseboard.h
index d72791695b2..0260aaa2fc1 100644
--- a/arch/arm/mach-pxa/include/mach/pcm990_baseboard.h
+++ b/arch/arm/mach-pxa/include/mach/pcm990_baseboard.h
@@ -31,7 +31,6 @@
31#define PCM990_CTRL_INT_IRQ PXA_GPIO_TO_IRQ(PCM990_CTRL_INT_IRQ_GPIO) 31#define PCM990_CTRL_INT_IRQ PXA_GPIO_TO_IRQ(PCM990_CTRL_INT_IRQ_GPIO)
32#define PCM990_CTRL_INT_IRQ_EDGE IRQ_TYPE_EDGE_RISING 32#define PCM990_CTRL_INT_IRQ_EDGE IRQ_TYPE_EDGE_RISING
33#define PCM990_CTRL_PHYS PXA_CS1_PHYS /* 16-Bit */ 33#define PCM990_CTRL_PHYS PXA_CS1_PHYS /* 16-Bit */
34#define PCM990_CTRL_BASE 0xea000000
35#define PCM990_CTRL_SIZE (1*1024*1024) 34#define PCM990_CTRL_SIZE (1*1024*1024)
36 35
37#define PCM990_CTRL_PWR_IRQ_GPIO 14 36#define PCM990_CTRL_PWR_IRQ_GPIO 14
@@ -69,13 +68,13 @@
69#define PCM990_CTRL_MMC2DE 0x0004 /* R MMC2 Card detect */ 68#define PCM990_CTRL_MMC2DE 0x0004 /* R MMC2 Card detect */
70#define PCM990_CTRL_MMC2WP 0x0008 /* R MMC2 Card write protect */ 69#define PCM990_CTRL_MMC2WP 0x0008 /* R MMC2 Card write protect */
71 70
72#define PCM990_CTRL_REG6 0x000C /* Interrupt Clear REGISTER */ 71#define PCM990_CTRL_INTSETCLR 0x000C /* Interrupt Clear REGISTER */
73#define PCM990_CTRL_INTC0 0x0001 /* Clear Reg BT Detect */ 72#define PCM990_CTRL_INTC0 0x0001 /* Clear Reg BT Detect */
74#define PCM990_CTRL_INTC1 0x0002 /* Clear Reg FR RI */ 73#define PCM990_CTRL_INTC1 0x0002 /* Clear Reg FR RI */
75#define PCM990_CTRL_INTC2 0x0004 /* Clear Reg MMC1 Detect */ 74#define PCM990_CTRL_INTC2 0x0004 /* Clear Reg MMC1 Detect */
76#define PCM990_CTRL_INTC3 0x0008 /* Clear Reg PM_5V off */ 75#define PCM990_CTRL_INTC3 0x0008 /* Clear Reg PM_5V off */
77 76
78#define PCM990_CTRL_REG7 0x000E /* Interrupt Enable REGISTER */ 77#define PCM990_CTRL_INTMSKENA 0x000E /* Interrupt Enable REGISTER */
79#define PCM990_CTRL_ENAINT0 0x0001 /* Enable Int BT Detect */ 78#define PCM990_CTRL_ENAINT0 0x0001 /* Enable Int BT Detect */
80#define PCM990_CTRL_ENAINT1 0x0002 /* Enable Int FR RI */ 79#define PCM990_CTRL_ENAINT1 0x0002 /* Enable Int FR RI */
81#define PCM990_CTRL_ENAINT2 0x0004 /* Enable Int MMC1 Detect */ 80#define PCM990_CTRL_ENAINT2 0x0004 /* Enable Int MMC1 Detect */
@@ -102,32 +101,6 @@
102#define PCM990_CTRL_ACPRES 0x0004 /* DC Present */ 101#define PCM990_CTRL_ACPRES 0x0004 /* DC Present */
103#define PCM990_CTRL_ACALARM 0x0008 /* Error Akku */ 102#define PCM990_CTRL_ACALARM 0x0008 /* Error Akku */
104 103
105#define PCM990_CTRL_P2V(x) ((x) - PCM990_CTRL_PHYS + PCM990_CTRL_BASE)
106#define PCM990_CTRL_V2P(x) ((x) - PCM990_CTRL_BASE + PCM990_CTRL_PHYS)
107
108#ifndef __ASSEMBLY__
109# define __PCM990_CTRL_REG(x) \
110 (*((volatile unsigned char *)PCM990_CTRL_P2V(x)))
111#else
112# define __PCM990_CTRL_REG(x) PCM990_CTRL_P2V(x)
113#endif
114
115#define PCM990_INTMSKENA __PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG7)
116#define PCM990_INTSETCLR __PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG6)
117#define PCM990_CTRL0 __PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG0)
118#define PCM990_CTRL1 __PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG1)
119#define PCM990_CTRL2 __PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG2)
120#define PCM990_CTRL3 __PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG3)
121#define PCM990_CTRL4 __PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG4)
122#define PCM990_CTRL5 __PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG5)
123#define PCM990_CTRL6 __PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG6)
124#define PCM990_CTRL7 __PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG7)
125#define PCM990_CTRL8 __PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG8)
126#define PCM990_CTRL9 __PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG9)
127#define PCM990_CTRL10 __PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG10)
128#define PCM990_CTRL11 __PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG11)
129
130
131/* 104/*
132 * IDE 105 * IDE
133 */ 106 */
@@ -166,24 +139,6 @@
166#define PCM990_IDE_PLD_P2V(x) ((x) - PCM990_IDE_PLD_PHYS + PCM990_IDE_PLD_BASE) 139#define PCM990_IDE_PLD_P2V(x) ((x) - PCM990_IDE_PLD_PHYS + PCM990_IDE_PLD_BASE)
167#define PCM990_IDE_PLD_V2P(x) ((x) - PCM990_IDE_PLD_BASE + PCM990_IDE_PLD_PHYS) 140#define PCM990_IDE_PLD_V2P(x) ((x) - PCM990_IDE_PLD_BASE + PCM990_IDE_PLD_PHYS)
168 141
169#ifndef __ASSEMBLY__
170# define __PCM990_IDE_PLD_REG(x) \
171 (*((volatile unsigned char *)PCM990_IDE_PLD_P2V(x)))
172#else
173# define __PCM990_IDE_PLD_REG(x) PCM990_IDE_PLD_P2V(x)
174#endif
175
176#define PCM990_IDE0 \
177 __PCM990_IDE_PLD_REG(PCM990_IDE_PLD_PHYS + PCM990_IDE_PLD_REG0)
178#define PCM990_IDE1 \
179 __PCM990_IDE_PLD_REG(PCM990_IDE_PLD_PHYS + PCM990_IDE_PLD_REG1)
180#define PCM990_IDE2 \
181 __PCM990_IDE_PLD_REG(PCM990_IDE_PLD_PHYS + PCM990_IDE_PLD_REG2)
182#define PCM990_IDE3 \
183 __PCM990_IDE_PLD_REG(PCM990_IDE_PLD_PHYS + PCM990_IDE_PLD_REG3)
184#define PCM990_IDE4 \
185 __PCM990_IDE_PLD_REG(PCM990_IDE_PLD_PHYS + PCM990_IDE_PLD_REG4)
186
187/* 142/*
188 * Compact Flash 143 * Compact Flash
189 */ 144 */
@@ -196,10 +151,6 @@
196#define PCM990_CF_CD_EDGE IRQ_TYPE_EDGE_RISING 151#define PCM990_CF_CD_EDGE IRQ_TYPE_EDGE_RISING
197 152
198#define PCM990_CF_PLD_PHYS 0x30000000 /* 16 bit wide */ 153#define PCM990_CF_PLD_PHYS 0x30000000 /* 16 bit wide */
199#define PCM990_CF_PLD_BASE 0xef000000
200#define PCM990_CF_PLD_SIZE (1*1024*1024)
201#define PCM990_CF_PLD_P2V(x) ((x) - PCM990_CF_PLD_PHYS + PCM990_CF_PLD_BASE)
202#define PCM990_CF_PLD_V2P(x) ((x) - PCM990_CF_PLD_BASE + PCM990_CF_PLD_PHYS)
203 154
204/* visible CPLD (U6) registers */ 155/* visible CPLD (U6) registers */
205#define PCM990_CF_PLD_REG0 0x1000 /* OFFSET CF REGISTER 0 */ 156#define PCM990_CF_PLD_REG0 0x1000 /* OFFSET CF REGISTER 0 */
@@ -239,21 +190,6 @@
239#define PCM990_CF_REG6_CD1 0x0001 /* R CF Card_Detect1 */ 190#define PCM990_CF_REG6_CD1 0x0001 /* R CF Card_Detect1 */
240#define PCM990_CF_REG6_CD2 0x0002 /* R CF Card_Detect2 */ 191#define PCM990_CF_REG6_CD2 0x0002 /* R CF Card_Detect2 */
241 192
242#ifndef __ASSEMBLY__
243# define __PCM990_CF_PLD_REG(x) \
244 (*((volatile unsigned char *)PCM990_CF_PLD_P2V(x)))
245#else
246# define __PCM990_CF_PLD_REG(x) PCM990_CF_PLD_P2V(x)
247#endif
248
249#define PCM990_CF0 __PCM990_CF_PLD_REG(PCM990_CF_PLD_PHYS + PCM990_CF_PLD_REG0)
250#define PCM990_CF1 __PCM990_CF_PLD_REG(PCM990_CF_PLD_PHYS + PCM990_CF_PLD_REG1)
251#define PCM990_CF2 __PCM990_CF_PLD_REG(PCM990_CF_PLD_PHYS + PCM990_CF_PLD_REG2)
252#define PCM990_CF3 __PCM990_CF_PLD_REG(PCM990_CF_PLD_PHYS + PCM990_CF_PLD_REG3)
253#define PCM990_CF4 __PCM990_CF_PLD_REG(PCM990_CF_PLD_PHYS + PCM990_CF_PLD_REG4)
254#define PCM990_CF5 __PCM990_CF_PLD_REG(PCM990_CF_PLD_PHYS + PCM990_CF_PLD_REG5)
255#define PCM990_CF6 __PCM990_CF_PLD_REG(PCM990_CF_PLD_PHYS + PCM990_CF_PLD_REG6)
256
257/* 193/*
258 * Wolfson AC97 Touch 194 * Wolfson AC97 Touch
259 */ 195 */
diff --git a/arch/arm/mach-pxa/pcm990-baseboard.c b/arch/arm/mach-pxa/pcm990-baseboard.c
index abab4e2b122..cb723e84bc2 100644
--- a/arch/arm/mach-pxa/pcm990-baseboard.c
+++ b/arch/arm/mach-pxa/pcm990-baseboard.c
@@ -65,6 +65,18 @@ static unsigned long pcm990_pin_config[] __initdata = {
65 GPIO31_AC97_SYNC, 65 GPIO31_AC97_SYNC,
66}; 66};
67 67
68static void __iomem *pcm990_cpld_base;
69
70static u8 pcm990_cpld_readb(unsigned int reg)
71{
72 return readb(pcm990_cpld_base + reg);
73}
74
75static void pcm990_cpld_writeb(u8 value, unsigned int reg)
76{
77 writeb(value, pcm990_cpld_base + reg);
78}
79
68/* 80/*
69 * pcm990_lcd_power - control power supply to the LCD 81 * pcm990_lcd_power - control power supply to the LCD
70 * @on: 0 = switch off, 1 = switch on 82 * @on: 0 = switch off, 1 = switch on
@@ -78,13 +90,13 @@ static void pcm990_lcd_power(int on, struct fb_var_screeninfo *var)
78 /* enable LCD-Latches 90 /* enable LCD-Latches
79 * power on LCD 91 * power on LCD
80 */ 92 */
81 __PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG3) = 93 pcm990_cpld_writeb(PCM990_CTRL_LCDPWR + PCM990_CTRL_LCDON,
82 PCM990_CTRL_LCDPWR + PCM990_CTRL_LCDON; 94 PCM990_CTRL_REG3);
83 } else { 95 } else {
84 /* disable LCD-Latches 96 /* disable LCD-Latches
85 * power off LCD 97 * power off LCD
86 */ 98 */
87 __PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG3) = 0x00; 99 pcm990_cpld_writeb(0, PCM990_CTRL_REG3);
88 } 100 }
89} 101}
90#endif 102#endif
@@ -243,15 +255,26 @@ static unsigned long pcm990_irq_enabled;
243static void pcm990_mask_ack_irq(struct irq_data *d) 255static void pcm990_mask_ack_irq(struct irq_data *d)
244{ 256{
245 int pcm990_irq = (d->irq - PCM027_IRQ(0)); 257 int pcm990_irq = (d->irq - PCM027_IRQ(0));
246 PCM990_INTMSKENA = (pcm990_irq_enabled &= ~(1 << pcm990_irq)); 258
259 pcm990_irq_enabled &= ~(1 << pcm990_irq);
260
261 pcm990_cpld_writeb(pcm990_irq_enabled, PCM990_CTRL_INTMSKENA);
247} 262}
248 263
249static void pcm990_unmask_irq(struct irq_data *d) 264static void pcm990_unmask_irq(struct irq_data *d)
250{ 265{
251 int pcm990_irq = (d->irq - PCM027_IRQ(0)); 266 int pcm990_irq = (d->irq - PCM027_IRQ(0));
267 u8 val;
268
252 /* the irq can be acknowledged only if deasserted, so it's done here */ 269 /* the irq can be acknowledged only if deasserted, so it's done here */
253 PCM990_INTSETCLR |= 1 << pcm990_irq; 270
254 PCM990_INTMSKENA = (pcm990_irq_enabled |= (1 << pcm990_irq)); 271 pcm990_irq_enabled |= (1 << pcm990_irq);
272
273 val = pcm990_cpld_readb(PCM990_CTRL_INTSETCLR);
274 val |= 1 << pcm990_irq;
275 pcm990_cpld_writeb(val, PCM990_CTRL_INTSETCLR);
276
277 pcm990_cpld_writeb(pcm990_irq_enabled, PCM990_CTRL_INTMSKENA);
255} 278}
256 279
257static struct irq_chip pcm990_irq_chip = { 280static struct irq_chip pcm990_irq_chip = {
@@ -261,7 +284,10 @@ static struct irq_chip pcm990_irq_chip = {
261 284
262static void pcm990_irq_handler(unsigned int irq, struct irq_desc *desc) 285static void pcm990_irq_handler(unsigned int irq, struct irq_desc *desc)
263{ 286{
264 unsigned long pending = (~PCM990_INTSETCLR) & pcm990_irq_enabled; 287 unsigned long pending;
288
289 pending = ~pcm990_cpld_readb(PCM990_CTRL_INTSETCLR);
290 pending &= pcm990_irq_enabled;
265 291
266 do { 292 do {
267 /* clear our parent IRQ */ 293 /* clear our parent IRQ */
@@ -270,7 +296,8 @@ static void pcm990_irq_handler(unsigned int irq, struct irq_desc *desc)
270 irq = PCM027_IRQ(0) + __ffs(pending); 296 irq = PCM027_IRQ(0) + __ffs(pending);
271 generic_handle_irq(irq); 297 generic_handle_irq(irq);
272 } 298 }
273 pending = (~PCM990_INTSETCLR) & pcm990_irq_enabled; 299 pending = ~pcm990_cpld_readb(PCM990_CTRL_INTSETCLR);
300 pending &= pcm990_irq_enabled;
274 } while (pending); 301 } while (pending);
275} 302}
276 303
@@ -285,8 +312,9 @@ static void __init pcm990_init_irq(void)
285 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); 312 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
286 } 313 }
287 314
288 PCM990_INTMSKENA = 0x00; /* disable all Interrupts */ 315 /* disable all Interrupts */
289 PCM990_INTSETCLR = 0xFF; 316 pcm990_cpld_writeb(0x0, PCM990_CTRL_INTMSKENA);
317 pcm990_cpld_writeb(0xff, PCM990_CTRL_INTSETCLR);
290 318
291 irq_set_chained_handler(PCM990_CTRL_INT_IRQ, pcm990_irq_handler); 319 irq_set_chained_handler(PCM990_CTRL_INT_IRQ, pcm990_irq_handler);
292 irq_set_irq_type(PCM990_CTRL_INT_IRQ, PCM990_CTRL_INT_IRQ_EDGE); 320 irq_set_irq_type(PCM990_CTRL_INT_IRQ, PCM990_CTRL_INT_IRQ_EDGE);
@@ -309,13 +337,16 @@ static int pcm990_mci_init(struct device *dev, irq_handler_t mci_detect_int,
309static void pcm990_mci_setpower(struct device *dev, unsigned int vdd) 337static void pcm990_mci_setpower(struct device *dev, unsigned int vdd)
310{ 338{
311 struct pxamci_platform_data *p_d = dev->platform_data; 339 struct pxamci_platform_data *p_d = dev->platform_data;
340 u8 val;
341
342 val = pcm990_cpld_readb(PCM990_CTRL_REG5);
312 343
313 if ((1 << vdd) & p_d->ocr_mask) 344 if ((1 << vdd) & p_d->ocr_mask)
314 __PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG5) = 345 val |= PCM990_CTRL_MMC2PWR;
315 PCM990_CTRL_MMC2PWR;
316 else 346 else
317 __PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG5) = 347 val &= ~PCM990_CTRL_MMC2PWR;
318 ~PCM990_CTRL_MMC2PWR; 348
349 pcm990_cpld_writeb(PCM990_CTRL_MMC2PWR, PCM990_CTRL_REG5);
319} 350}
320 351
321static void pcm990_mci_exit(struct device *dev, void *data) 352static void pcm990_mci_exit(struct device *dev, void *data)
@@ -481,23 +512,6 @@ static struct platform_device pcm990_camera[] = {
481#endif /* CONFIG_VIDEO_PXA27x ||CONFIG_VIDEO_PXA27x_MODULE */ 512#endif /* CONFIG_VIDEO_PXA27x ||CONFIG_VIDEO_PXA27x_MODULE */
482 513
483/* 514/*
484 * enable generic access to the base board control CPLDs U6 and U7
485 */
486static struct map_desc pcm990_io_desc[] __initdata = {
487 {
488 .virtual = PCM990_CTRL_BASE,
489 .pfn = __phys_to_pfn(PCM990_CTRL_PHYS),
490 .length = PCM990_CTRL_SIZE,
491 .type = MT_DEVICE /* CPLD */
492 }, {
493 .virtual = PCM990_CF_PLD_BASE,
494 .pfn = __phys_to_pfn(PCM990_CF_PLD_PHYS),
495 .length = PCM990_CF_PLD_SIZE,
496 .type = MT_DEVICE /* CPLD */
497 }
498};
499
500/*
501 * system init for baseboard usage. Will be called by pcm027 init. 515 * system init for baseboard usage. Will be called by pcm027 init.
502 * 516 *
503 * Add platform devices present on this baseboard and init 517 * Add platform devices present on this baseboard and init
@@ -507,8 +521,11 @@ void __init pcm990_baseboard_init(void)
507{ 521{
508 pxa2xx_mfp_config(ARRAY_AND_SIZE(pcm990_pin_config)); 522 pxa2xx_mfp_config(ARRAY_AND_SIZE(pcm990_pin_config));
509 523
510 /* register CPLD access */ 524 pcm990_cpld_base = ioremap(PCM990_CTRL_PHYS, PCM990_CTRL_SIZE);
511 iotable_init(ARRAY_AND_SIZE(pcm990_io_desc)); 525 if (!pcm990_cpld_base) {
526 pr_err("pcm990: failed to ioremap cpld\n");
527 return;
528 }
512 529
513 /* register CPLD's IRQ controller */ 530 /* register CPLD's IRQ controller */
514 pcm990_init_irq(); 531 pcm990_init_irq();