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-rw-r--r--arch/arm/mach-pxa/include/mach/memory.h19
1 files changed, 3 insertions, 16 deletions
diff --git a/arch/arm/mach-pxa/include/mach/memory.h b/arch/arm/mach-pxa/include/mach/memory.h
index f626730ee42..92361a66b22 100644
--- a/arch/arm/mach-pxa/include/mach/memory.h
+++ b/arch/arm/mach-pxa/include/mach/memory.h
@@ -17,24 +17,11 @@
17 */ 17 */
18#define PHYS_OFFSET UL(0xa0000000) 18#define PHYS_OFFSET UL(0xa0000000)
19 19
20/*
21 * The nodes are matched with the physical SDRAM banks as follows:
22 *
23 * node 0: 0xa0000000-0xa3ffffff --> 0xc0000000-0xc3ffffff
24 * node 1: 0xa4000000-0xa7ffffff --> 0xc4000000-0xc7ffffff
25 * node 2: 0xa8000000-0xabffffff --> 0xc8000000-0xcbffffff
26 * node 3: 0xac000000-0xafffffff --> 0xcc000000-0xcfffffff
27 *
28 * This needs a node mem size of 26 bits.
29 */
30#define NODE_MEM_SIZE_BITS 26
31
32#if !defined(__ASSEMBLY__) && defined(CONFIG_MACH_ARMCORE) && defined(CONFIG_PCI) 20#if !defined(__ASSEMBLY__) && defined(CONFIG_MACH_ARMCORE) && defined(CONFIG_PCI)
33void cmx2xx_pci_adjust_zones(int node, unsigned long *size, 21void cmx2xx_pci_adjust_zones(unsigned long *size, unsigned long *holes);
34 unsigned long *holes);
35 22
36#define arch_adjust_zones(node, size, holes) \ 23#define arch_adjust_zones(size, holes) \
37 cmx2xx_pci_adjust_zones(node, size, holes) 24 cmx2xx_pci_adjust_zones(size, holes)
38 25
39#define ISA_DMA_THRESHOLD (PHYS_OFFSET + SZ_64M - 1) 26#define ISA_DMA_THRESHOLD (PHYS_OFFSET + SZ_64M - 1)
40#define MAX_DMA_ADDRESS (PAGE_OFFSET + SZ_64M) 27#define MAX_DMA_ADDRESS (PAGE_OFFSET + SZ_64M)