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-rw-r--r--arch/arm/mach-pxa/include/mach/arcom-pcmcia.h11
-rw-r--r--arch/arm/mach-pxa/include/mach/camera.h44
-rw-r--r--arch/arm/mach-pxa/include/mach/entry-macro.S51
-rw-r--r--arch/arm/mach-pxa/include/mach/irda.h25
-rw-r--r--arch/arm/mach-pxa/include/mach/memory.h20
-rw-r--r--arch/arm/mach-pxa/include/mach/mmc.h28
-rw-r--r--arch/arm/mach-pxa/include/mach/ohci.h36
-rw-r--r--arch/arm/mach-pxa/include/mach/palmasoc.h8
-rw-r--r--arch/arm/mach-pxa/include/mach/pata_pxa.h33
-rw-r--r--arch/arm/mach-pxa/include/mach/pxa3xx-u2d.h35
-rw-r--r--arch/arm/mach-pxa/include/mach/pxa930_rotary.h20
-rw-r--r--arch/arm/mach-pxa/include/mach/pxa930_trkball.h10
-rw-r--r--arch/arm/mach-pxa/include/mach/pxafb.h162
-rw-r--r--arch/arm/mach-pxa/include/mach/system.h23
-rw-r--r--arch/arm/mach-pxa/include/mach/vmalloc.h11
15 files changed, 517 insertions, 0 deletions
diff --git a/arch/arm/mach-pxa/include/mach/arcom-pcmcia.h b/arch/arm/mach-pxa/include/mach/arcom-pcmcia.h
new file mode 100644
index 00000000000..d428be4db44
--- /dev/null
+++ b/arch/arm/mach-pxa/include/mach/arcom-pcmcia.h
@@ -0,0 +1,11 @@
1#ifndef __ARCOM_PCMCIA_H
2#define __ARCOM_PCMCIA_H
3
4struct arcom_pcmcia_pdata {
5 int cd_gpio;
6 int rdy_gpio;
7 int pwr_gpio;
8 void (*reset)(int state);
9};
10
11#endif
diff --git a/arch/arm/mach-pxa/include/mach/camera.h b/arch/arm/mach-pxa/include/mach/camera.h
new file mode 100644
index 00000000000..6709b1cd7c7
--- /dev/null
+++ b/arch/arm/mach-pxa/include/mach/camera.h
@@ -0,0 +1,44 @@
1/*
2 camera.h - PXA camera driver header file
3
4 Copyright (C) 2003, Intel Corporation
5 Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de>
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20*/
21
22#ifndef __ASM_ARCH_CAMERA_H_
23#define __ASM_ARCH_CAMERA_H_
24
25#define PXA_CAMERA_MASTER 1
26#define PXA_CAMERA_DATAWIDTH_4 2
27#define PXA_CAMERA_DATAWIDTH_5 4
28#define PXA_CAMERA_DATAWIDTH_8 8
29#define PXA_CAMERA_DATAWIDTH_9 0x10
30#define PXA_CAMERA_DATAWIDTH_10 0x20
31#define PXA_CAMERA_PCLK_EN 0x40
32#define PXA_CAMERA_MCLK_EN 0x80
33#define PXA_CAMERA_PCP 0x100
34#define PXA_CAMERA_HSP 0x200
35#define PXA_CAMERA_VSP 0x400
36
37struct pxacamera_platform_data {
38 unsigned long flags;
39 unsigned long mclk_10khz;
40};
41
42extern void pxa_set_camera_info(struct pxacamera_platform_data *);
43
44#endif /* __ASM_ARCH_CAMERA_H_ */
diff --git a/arch/arm/mach-pxa/include/mach/entry-macro.S b/arch/arm/mach-pxa/include/mach/entry-macro.S
new file mode 100644
index 00000000000..a73bc86a3c2
--- /dev/null
+++ b/arch/arm/mach-pxa/include/mach/entry-macro.S
@@ -0,0 +1,51 @@
1/*
2 * arch/arm/mach-pxa/include/mach/entry-macro.S
3 *
4 * Low-level IRQ helper macros for PXA-based platforms
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10#include <mach/hardware.h>
11#include <mach/irqs.h>
12
13 .macro disable_fiq
14 .endm
15
16 .macro get_irqnr_preamble, base, tmp
17 .endm
18
19 .macro arch_ret_to_user, tmp1, tmp2
20 .endm
21
22 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
23 mrc p15, 0, \tmp, c0, c0, 0 @ CPUID
24 mov \tmp, \tmp, lsr #13
25 and \tmp, \tmp, #0x7 @ Core G
26 cmp \tmp, #1
27 bhi 1002f
28
29 @ Core Generation 1 (PXA25x)
30 mov \base, #io_p2v(0x40000000) @ IIR Ctl = 0x40d00000
31 add \base, \base, #0x00d00000
32 ldr \irqstat, [\base, #0] @ ICIP
33 ldr \irqnr, [\base, #4] @ ICMR
34
35 ands \irqnr, \irqstat, \irqnr
36 beq 1001f
37 rsb \irqstat, \irqnr, #0
38 and \irqstat, \irqstat, \irqnr
39 clz \irqnr, \irqstat
40 rsb \irqnr, \irqnr, #(31 + PXA_IRQ(0))
41 b 1001f
421002:
43 @ Core Generation 2 (PXA27x) or Core Generation 3 (PXA3xx)
44 mrc p6, 0, \irqstat, c5, c0, 0 @ ICHP
45 tst \irqstat, #0x80000000
46 beq 1001f
47 bic \irqstat, \irqstat, #0x80000000
48 mov \irqnr, \irqstat, lsr #16
49 add \irqnr, \irqnr, #(PXA_IRQ(0))
501001:
51 .endm
diff --git a/arch/arm/mach-pxa/include/mach/irda.h b/arch/arm/mach-pxa/include/mach/irda.h
new file mode 100644
index 00000000000..3cd41f77dda
--- /dev/null
+++ b/arch/arm/mach-pxa/include/mach/irda.h
@@ -0,0 +1,25 @@
1#ifndef ASMARM_ARCH_IRDA_H
2#define ASMARM_ARCH_IRDA_H
3
4/* board specific transceiver capabilities */
5
6#define IR_OFF 1
7#define IR_SIRMODE 2
8#define IR_FIRMODE 4
9
10struct pxaficp_platform_data {
11 int transceiver_cap;
12 void (*transceiver_mode)(struct device *dev, int mode);
13 int (*startup)(struct device *dev);
14 void (*shutdown)(struct device *dev);
15 int gpio_pwdown; /* powerdown GPIO for the IrDA chip */
16 bool gpio_pwdown_inverted; /* gpio_pwdown is inverted */
17};
18
19extern void pxa_set_ficp_info(struct pxaficp_platform_data *info);
20
21#if defined(CONFIG_PXA25x) || defined(CONFIG_PXA27x)
22void pxa2xx_transceiver_mode(struct device *dev, int mode);
23#endif
24
25#endif
diff --git a/arch/arm/mach-pxa/include/mach/memory.h b/arch/arm/mach-pxa/include/mach/memory.h
new file mode 100644
index 00000000000..d05a59727d6
--- /dev/null
+++ b/arch/arm/mach-pxa/include/mach/memory.h
@@ -0,0 +1,20 @@
1/*
2 * arch/arm/mach-pxa/include/mach/memory.h
3 *
4 * Author: Nicolas Pitre
5 * Copyright: (C) 2001 MontaVista Software Inc.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#ifndef __ASM_ARCH_MEMORY_H
13#define __ASM_ARCH_MEMORY_H
14
15/*
16 * Physical DRAM offset.
17 */
18#define PLAT_PHYS_OFFSET UL(0xa0000000)
19
20#endif
diff --git a/arch/arm/mach-pxa/include/mach/mmc.h b/arch/arm/mach-pxa/include/mach/mmc.h
new file mode 100644
index 00000000000..9eb515bb799
--- /dev/null
+++ b/arch/arm/mach-pxa/include/mach/mmc.h
@@ -0,0 +1,28 @@
1#ifndef ASMARM_ARCH_MMC_H
2#define ASMARM_ARCH_MMC_H
3
4#include <linux/mmc/host.h>
5#include <linux/interrupt.h>
6
7struct device;
8struct mmc_host;
9
10struct pxamci_platform_data {
11 unsigned int ocr_mask; /* available voltages */
12 unsigned long detect_delay_ms; /* delay in millisecond before detecting cards after interrupt */
13 int (*init)(struct device *, irq_handler_t , void *);
14 int (*get_ro)(struct device *);
15 void (*setpower)(struct device *, unsigned int);
16 void (*exit)(struct device *, void *);
17 int gpio_card_detect; /* gpio detecting card insertion */
18 int gpio_card_ro; /* gpio detecting read only toggle */
19 bool gpio_card_ro_invert; /* gpio ro is inverted */
20 int gpio_power; /* gpio powering up MMC bus */
21 bool gpio_power_invert; /* gpio power is inverted */
22};
23
24extern void pxa_set_mci_info(struct pxamci_platform_data *info);
25extern void pxa3xx_set_mci2_info(struct pxamci_platform_data *info);
26extern void pxa3xx_set_mci3_info(struct pxamci_platform_data *info);
27
28#endif
diff --git a/arch/arm/mach-pxa/include/mach/ohci.h b/arch/arm/mach-pxa/include/mach/ohci.h
new file mode 100644
index 00000000000..95b6e2a6e51
--- /dev/null
+++ b/arch/arm/mach-pxa/include/mach/ohci.h
@@ -0,0 +1,36 @@
1#ifndef ASMARM_ARCH_OHCI_H
2#define ASMARM_ARCH_OHCI_H
3
4struct device;
5
6struct pxaohci_platform_data {
7 int (*init)(struct device *);
8 void (*exit)(struct device *);
9
10 unsigned long flags;
11#define ENABLE_PORT1 (1 << 0)
12#define ENABLE_PORT2 (1 << 1)
13#define ENABLE_PORT3 (1 << 2)
14#define ENABLE_PORT_ALL (ENABLE_PORT1 | ENABLE_PORT2 | ENABLE_PORT3)
15
16#define POWER_SENSE_LOW (1 << 3)
17#define POWER_CONTROL_LOW (1 << 4)
18#define NO_OC_PROTECTION (1 << 5)
19#define OC_MODE_GLOBAL (0 << 6)
20#define OC_MODE_PERPORT (1 << 6)
21
22 int power_on_delay; /* Power On to Power Good time - in ms
23 * HCD must wait for this duration before
24 * accessing a powered on port
25 */
26 int port_mode;
27#define PMM_NPS_MODE 1
28#define PMM_GLOBAL_MODE 2
29#define PMM_PERPORT_MODE 3
30
31 int power_budget;
32};
33
34extern void pxa_set_ohci_info(struct pxaohci_platform_data *info);
35
36#endif
diff --git a/arch/arm/mach-pxa/include/mach/palmasoc.h b/arch/arm/mach-pxa/include/mach/palmasoc.h
new file mode 100644
index 00000000000..58afb30d529
--- /dev/null
+++ b/arch/arm/mach-pxa/include/mach/palmasoc.h
@@ -0,0 +1,8 @@
1#ifndef _INCLUDE_PALMASOC_H_
2#define _INCLUDE_PALMASOC_H_
3
4struct palm27x_asoc_info {
5 int jack_gpio;
6};
7
8#endif
diff --git a/arch/arm/mach-pxa/include/mach/pata_pxa.h b/arch/arm/mach-pxa/include/mach/pata_pxa.h
new file mode 100644
index 00000000000..6cf7df1d583
--- /dev/null
+++ b/arch/arm/mach-pxa/include/mach/pata_pxa.h
@@ -0,0 +1,33 @@
1/*
2 * Generic PXA PATA driver
3 *
4 * Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2, or (at your option)
9 * any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; see the file COPYING. If not, write to
18 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
19 */
20
21#ifndef __MACH_PATA_PXA_H__
22#define __MACH_PATA_PXA_H__
23
24struct pata_pxa_pdata {
25 /* PXA DMA DREQ<0:2> pin */
26 uint32_t dma_dreq;
27 /* Register shift */
28 uint32_t reg_shift;
29 /* IRQ flags */
30 uint32_t irq_flags;
31};
32
33#endif /* __MACH_PATA_PXA_H__ */
diff --git a/arch/arm/mach-pxa/include/mach/pxa3xx-u2d.h b/arch/arm/mach-pxa/include/mach/pxa3xx-u2d.h
new file mode 100644
index 00000000000..9d82cb65ea5
--- /dev/null
+++ b/arch/arm/mach-pxa/include/mach/pxa3xx-u2d.h
@@ -0,0 +1,35 @@
1/*
2 * PXA3xx U2D header
3 *
4 * Copyright (C) 2010 CompuLab Ltd.
5 *
6 * Igor Grinberg <grinberg@compulab.co.il>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12#ifndef __PXA310_U2D__
13#define __PXA310_U2D__
14
15#include <linux/usb/ulpi.h>
16
17struct pxa3xx_u2d_platform_data {
18
19#define ULPI_SER_6PIN (1 << 0)
20#define ULPI_SER_3PIN (1 << 1)
21 unsigned int ulpi_mode;
22
23 int (*init)(struct device *);
24 void (*exit)(struct device *);
25};
26
27
28/* Start PXA3xx U2D host */
29int pxa3xx_u2d_start_hc(struct usb_bus *host);
30/* Stop PXA3xx U2D host */
31void pxa3xx_u2d_stop_hc(struct usb_bus *host);
32
33extern void pxa3xx_set_u2d_info(struct pxa3xx_u2d_platform_data *info);
34
35#endif /* __PXA310_U2D__ */
diff --git a/arch/arm/mach-pxa/include/mach/pxa930_rotary.h b/arch/arm/mach-pxa/include/mach/pxa930_rotary.h
new file mode 100644
index 00000000000..053587caffd
--- /dev/null
+++ b/arch/arm/mach-pxa/include/mach/pxa930_rotary.h
@@ -0,0 +1,20 @@
1#ifndef __ASM_ARCH_PXA930_ROTARY_H
2#define __ASM_ARCH_PXA930_ROTARY_H
3
4/* NOTE:
5 *
6 * rotary can be either interpreted as a ralative input event (e.g.
7 * REL_WHEEL or REL_HWHEEL) or a specific key event (e.g. UP/DOWN
8 * or LEFT/RIGHT), depending on if up_key & down_key are assigned
9 * or rel_code is assigned a non-zero value. When all are non-zero,
10 * up_key and down_key will be preferred.
11 */
12struct pxa930_rotary_platform_data {
13 int up_key;
14 int down_key;
15 int rel_code;
16};
17
18void __init pxa930_set_rotarykey_info(struct pxa930_rotary_platform_data *info);
19
20#endif /* __ASM_ARCH_PXA930_ROTARY_H */
diff --git a/arch/arm/mach-pxa/include/mach/pxa930_trkball.h b/arch/arm/mach-pxa/include/mach/pxa930_trkball.h
new file mode 100644
index 00000000000..5e0789bc472
--- /dev/null
+++ b/arch/arm/mach-pxa/include/mach/pxa930_trkball.h
@@ -0,0 +1,10 @@
1#ifndef __ASM_ARCH_PXA930_TRKBALL_H
2#define __ASM_ARCH_PXA930_TRKBALL_H
3
4struct pxa930_trkball_platform_data {
5 int x_filter;
6 int y_filter;
7};
8
9#endif /* __ASM_ARCH_PXA930_TRKBALL_H */
10
diff --git a/arch/arm/mach-pxa/include/mach/pxafb.h b/arch/arm/mach-pxa/include/mach/pxafb.h
new file mode 100644
index 00000000000..01a45ac4811
--- /dev/null
+++ b/arch/arm/mach-pxa/include/mach/pxafb.h
@@ -0,0 +1,162 @@
1/*
2 * arch/arm/mach-pxa/include/mach/pxafb.h
3 *
4 * Support for the xscale frame buffer.
5 *
6 * Author: Jean-Frederic Clere
7 * Created: Sep 22, 2003
8 * Copyright: jfclere@sinix.net
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
15#include <linux/fb.h>
16#include <mach/regs-lcd.h>
17
18/*
19 * Supported LCD connections
20 *
21 * bits 0 - 3: for LCD panel type:
22 *
23 * STN - for passive matrix
24 * DSTN - for dual scan passive matrix
25 * TFT - for active matrix
26 *
27 * bits 4 - 9 : for bus width
28 * bits 10-17 : for AC Bias Pin Frequency
29 * bit 18 : for output enable polarity
30 * bit 19 : for pixel clock edge
31 * bit 20 : for output pixel format when base is RGBT16
32 */
33#define LCD_CONN_TYPE(_x) ((_x) & 0x0f)
34#define LCD_CONN_WIDTH(_x) (((_x) >> 4) & 0x1f)
35
36#define LCD_TYPE_MASK 0xf
37#define LCD_TYPE_UNKNOWN 0
38#define LCD_TYPE_MONO_STN 1
39#define LCD_TYPE_MONO_DSTN 2
40#define LCD_TYPE_COLOR_STN 3
41#define LCD_TYPE_COLOR_DSTN 4
42#define LCD_TYPE_COLOR_TFT 5
43#define LCD_TYPE_SMART_PANEL 6
44#define LCD_TYPE_MAX 7
45
46#define LCD_MONO_STN_4BPP ((4 << 4) | LCD_TYPE_MONO_STN)
47#define LCD_MONO_STN_8BPP ((8 << 4) | LCD_TYPE_MONO_STN)
48#define LCD_MONO_DSTN_8BPP ((8 << 4) | LCD_TYPE_MONO_DSTN)
49#define LCD_COLOR_STN_8BPP ((8 << 4) | LCD_TYPE_COLOR_STN)
50#define LCD_COLOR_DSTN_16BPP ((16 << 4) | LCD_TYPE_COLOR_DSTN)
51#define LCD_COLOR_TFT_8BPP ((8 << 4) | LCD_TYPE_COLOR_TFT)
52#define LCD_COLOR_TFT_16BPP ((16 << 4) | LCD_TYPE_COLOR_TFT)
53#define LCD_COLOR_TFT_18BPP ((18 << 4) | LCD_TYPE_COLOR_TFT)
54#define LCD_SMART_PANEL_8BPP ((8 << 4) | LCD_TYPE_SMART_PANEL)
55#define LCD_SMART_PANEL_16BPP ((16 << 4) | LCD_TYPE_SMART_PANEL)
56#define LCD_SMART_PANEL_18BPP ((18 << 4) | LCD_TYPE_SMART_PANEL)
57
58#define LCD_AC_BIAS_FREQ(x) (((x) & 0xff) << 10)
59#define LCD_BIAS_ACTIVE_HIGH (0 << 18)
60#define LCD_BIAS_ACTIVE_LOW (1 << 18)
61#define LCD_PCLK_EDGE_RISE (0 << 19)
62#define LCD_PCLK_EDGE_FALL (1 << 19)
63#define LCD_ALTERNATE_MAPPING (1 << 20)
64
65/*
66 * This structure describes the machine which we are running on.
67 * It is set in linux/arch/arm/mach-pxa/machine_name.c and used in the probe routine
68 * of linux/drivers/video/pxafb.c
69 */
70struct pxafb_mode_info {
71 u_long pixclock;
72
73 u_short xres;
74 u_short yres;
75
76 u_char bpp;
77 u_int cmap_greyscale:1,
78 depth:8,
79 transparency:1,
80 unused:22;
81
82 /* Parallel Mode Timing */
83 u_char hsync_len;
84 u_char left_margin;
85 u_char right_margin;
86
87 u_char vsync_len;
88 u_char upper_margin;
89 u_char lower_margin;
90 u_char sync;
91
92 /* Smart Panel Mode Timing - see PXA27x DM 7.4.15.0.3 for details
93 * Note:
94 * 1. all parameters in nanosecond (ns)
95 * 2. a0cs{rd,wr}_set_hld are controlled by the same register bits
96 * in pxa27x and pxa3xx, initialize them to the same value or
97 * the larger one will be used
98 * 3. same to {rd,wr}_pulse_width
99 *
100 * 4. LCD_PCLK_EDGE_{RISE,FALL} controls the L_PCLK_WR polarity
101 * 5. sync & FB_SYNC_HOR_HIGH_ACT controls the L_LCLK_A0
102 * 6. sync & FB_SYNC_VERT_HIGH_ACT controls the L_LCLK_RD
103 */
104 unsigned a0csrd_set_hld; /* A0 and CS Setup/Hold Time before/after L_FCLK_RD */
105 unsigned a0cswr_set_hld; /* A0 and CS Setup/Hold Time before/after L_PCLK_WR */
106 unsigned wr_pulse_width; /* L_PCLK_WR pulse width */
107 unsigned rd_pulse_width; /* L_FCLK_RD pulse width */
108 unsigned cmd_inh_time; /* Command Inhibit time between two writes */
109 unsigned op_hold_time; /* Output Hold time from L_FCLK_RD negation */
110};
111
112struct pxafb_mach_info {
113 struct pxafb_mode_info *modes;
114 unsigned int num_modes;
115
116 unsigned int lcd_conn;
117 unsigned long video_mem_size;
118
119 u_int fixed_modes:1,
120 cmap_inverse:1,
121 cmap_static:1,
122 acceleration_enabled:1,
123 unused:28;
124
125 /* The following should be defined in LCCR0
126 * LCCR0_Act or LCCR0_Pas Active or Passive
127 * LCCR0_Sngl or LCCR0_Dual Single/Dual panel
128 * LCCR0_Mono or LCCR0_Color Mono/Color
129 * LCCR0_4PixMono or LCCR0_8PixMono (in mono single mode)
130 * LCCR0_DMADel(Tcpu) (optional) DMA request delay
131 *
132 * The following should not be defined in LCCR0:
133 * LCCR0_OUM, LCCR0_BM, LCCR0_QDM, LCCR0_DIS, LCCR0_EFM
134 * LCCR0_IUM, LCCR0_SFM, LCCR0_LDM, LCCR0_ENB
135 */
136 u_int lccr0;
137 /* The following should be defined in LCCR3
138 * LCCR3_OutEnH or LCCR3_OutEnL Output enable polarity
139 * LCCR3_PixRsEdg or LCCR3_PixFlEdg Pixel clock edge type
140 * LCCR3_Acb(X) AB Bias pin frequency
141 * LCCR3_DPC (optional) Double Pixel Clock mode (untested)
142 *
143 * The following should not be defined in LCCR3
144 * LCCR3_HSP, LCCR3_VSP, LCCR0_Pcd(x), LCCR3_Bpp
145 */
146 u_int lccr3;
147 /* The following should be defined in LCCR4
148 * LCCR4_PAL_FOR_0 or LCCR4_PAL_FOR_1 or LCCR4_PAL_FOR_2
149 *
150 * All other bits in LCCR4 should be left alone.
151 */
152 u_int lccr4;
153 void (*pxafb_backlight_power)(int);
154 void (*pxafb_lcd_power)(int, struct fb_var_screeninfo *);
155 void (*smart_update)(struct fb_info *);
156};
157
158void pxa_set_fb_info(struct device *, struct pxafb_mach_info *);
159unsigned long pxafb_get_hsync_time(struct device *dev);
160
161extern int pxafb_smart_queue(struct fb_info *info, uint16_t *cmds, int);
162extern int pxafb_smart_flush(struct fb_info *info);
diff --git a/arch/arm/mach-pxa/include/mach/system.h b/arch/arm/mach-pxa/include/mach/system.h
new file mode 100644
index 00000000000..d1fce8b6d10
--- /dev/null
+++ b/arch/arm/mach-pxa/include/mach/system.h
@@ -0,0 +1,23 @@
1/*
2 * arch/arm/mach-pxa/include/mach/system.h
3 *
4 * Author: Nicolas Pitre
5 * Created: Jun 15, 2001
6 * Copyright: MontaVista Software Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <asm/proc-fns.h>
14#include "hardware.h"
15#include "pxa2xx-regs.h"
16
17static inline void arch_idle(void)
18{
19 cpu_do_idle();
20}
21
22
23void arch_reset(char mode, const char *cmd);
diff --git a/arch/arm/mach-pxa/include/mach/vmalloc.h b/arch/arm/mach-pxa/include/mach/vmalloc.h
new file mode 100644
index 00000000000..bfecfbf5f46
--- /dev/null
+++ b/arch/arm/mach-pxa/include/mach/vmalloc.h
@@ -0,0 +1,11 @@
1/*
2 * arch/arm/mach-pxa/include/mach/vmalloc.h
3 *
4 * Author: Nicolas Pitre
5 * Copyright: (C) 2001 MontaVista Software Inc.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11#define VMALLOC_END (0xe8000000UL)
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