diff options
Diffstat (limited to 'arch/arm/mach-pnx4008/core.c')
-rw-r--r-- | arch/arm/mach-pnx4008/core.c | 207 |
1 files changed, 207 insertions, 0 deletions
diff --git a/arch/arm/mach-pnx4008/core.c b/arch/arm/mach-pnx4008/core.c new file mode 100644 index 00000000000..ba91daad64f --- /dev/null +++ b/arch/arm/mach-pnx4008/core.c | |||
@@ -0,0 +1,207 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-pnx4008/core.c | ||
3 | * | ||
4 | * PNX4008 core startup code | ||
5 | * | ||
6 | * Authors: Vitaly Wool, Dmitry Chigirev, | ||
7 | * Grigory Tolstolytkin, Dmitry Pervushin <source@mvista.com> | ||
8 | * | ||
9 | * Based on reference code received from Philips: | ||
10 | * Copyright (C) 2003 Philips Semiconductors | ||
11 | * | ||
12 | * 2005 (c) MontaVista Software, Inc. This file is licensed under | ||
13 | * the terms of the GNU General Public License version 2. This program | ||
14 | * is licensed "as is" without any warranty of any kind, whether express | ||
15 | * or implied. | ||
16 | */ | ||
17 | |||
18 | #include <linux/kernel.h> | ||
19 | #include <linux/types.h> | ||
20 | #include <linux/mm.h> | ||
21 | #include <linux/interrupt.h> | ||
22 | #include <linux/list.h> | ||
23 | #include <linux/init.h> | ||
24 | #include <linux/ioport.h> | ||
25 | #include <linux/serial_8250.h> | ||
26 | #include <linux/device.h> | ||
27 | #include <linux/spi/spi.h> | ||
28 | |||
29 | #include <asm/hardware.h> | ||
30 | #include <asm/irq.h> | ||
31 | #include <asm/io.h> | ||
32 | #include <asm/setup.h> | ||
33 | #include <asm/mach-types.h> | ||
34 | #include <asm/pgtable.h> | ||
35 | #include <asm/page.h> | ||
36 | #include <asm/system.h> | ||
37 | |||
38 | #include <asm/mach/arch.h> | ||
39 | #include <asm/mach/irq.h> | ||
40 | #include <asm/mach/map.h> | ||
41 | #include <asm/mach/time.h> | ||
42 | |||
43 | #include <asm/arch/irq.h> | ||
44 | #include <asm/arch/clock.h> | ||
45 | #include <asm/arch/dma.h> | ||
46 | |||
47 | struct resource spipnx_0_resources[] = { | ||
48 | { | ||
49 | .start = PNX4008_SPI1_BASE, | ||
50 | .end = PNX4008_SPI1_BASE + SZ_4K, | ||
51 | .flags = IORESOURCE_MEM, | ||
52 | }, { | ||
53 | .start = PER_SPI1_REC_XMIT, | ||
54 | .flags = IORESOURCE_DMA, | ||
55 | }, { | ||
56 | .start = SPI1_INT, | ||
57 | .flags = IORESOURCE_IRQ, | ||
58 | }, { | ||
59 | .flags = 0, | ||
60 | }, | ||
61 | }; | ||
62 | |||
63 | struct resource spipnx_1_resources[] = { | ||
64 | { | ||
65 | .start = PNX4008_SPI2_BASE, | ||
66 | .end = PNX4008_SPI2_BASE + SZ_4K, | ||
67 | .flags = IORESOURCE_MEM, | ||
68 | }, { | ||
69 | .start = PER_SPI2_REC_XMIT, | ||
70 | .flags = IORESOURCE_DMA, | ||
71 | }, { | ||
72 | .start = SPI2_INT, | ||
73 | .flags = IORESOURCE_IRQ, | ||
74 | }, { | ||
75 | .flags = 0, | ||
76 | } | ||
77 | }; | ||
78 | |||
79 | static struct spi_board_info spi_board_info[] __initdata = { | ||
80 | { | ||
81 | .modalias = "m25p80", | ||
82 | .max_speed_hz = 1000000, | ||
83 | .bus_num = 1, | ||
84 | .chip_select = 0, | ||
85 | }, | ||
86 | }; | ||
87 | |||
88 | static struct platform_device spipnx_1 = { | ||
89 | .name = "spipnx", | ||
90 | .id = 1, | ||
91 | .num_resources = ARRAY_SIZE(spipnx_0_resources), | ||
92 | .resource = spipnx_0_resources, | ||
93 | .dev = { | ||
94 | .coherent_dma_mask = 0xFFFFFFFF, | ||
95 | }, | ||
96 | }; | ||
97 | |||
98 | static struct platform_device spipnx_2 = { | ||
99 | .name = "spipnx", | ||
100 | .id = 2, | ||
101 | .num_resources = ARRAY_SIZE(spipnx_1_resources), | ||
102 | .resource = spipnx_1_resources, | ||
103 | .dev = { | ||
104 | .coherent_dma_mask = 0xFFFFFFFF, | ||
105 | }, | ||
106 | }; | ||
107 | |||
108 | static struct plat_serial8250_port platform_serial_ports[] = { | ||
109 | { | ||
110 | .membase = (void *)__iomem(IO_ADDRESS(PNX4008_UART5_BASE)), | ||
111 | .mapbase = (unsigned long)PNX4008_UART5_BASE, | ||
112 | .irq = IIR5_INT, | ||
113 | .uartclk = PNX4008_UART_CLK, | ||
114 | .regshift = 2, | ||
115 | .iotype = UPIO_MEM, | ||
116 | .flags = UPF_BOOT_AUTOCONF | UPF_BUGGY_UART | UPF_SKIP_TEST, | ||
117 | }, | ||
118 | { | ||
119 | .membase = (void *)__iomem(IO_ADDRESS(PNX4008_UART3_BASE)), | ||
120 | .mapbase = (unsigned long)PNX4008_UART3_BASE, | ||
121 | .irq = IIR3_INT, | ||
122 | .uartclk = PNX4008_UART_CLK, | ||
123 | .regshift = 2, | ||
124 | .iotype = UPIO_MEM, | ||
125 | .flags = UPF_BOOT_AUTOCONF | UPF_BUGGY_UART | UPF_SKIP_TEST, | ||
126 | }, | ||
127 | {} | ||
128 | }; | ||
129 | |||
130 | static struct platform_device serial_device = { | ||
131 | .name = "serial8250", | ||
132 | .id = PLAT8250_DEV_PLATFORM, | ||
133 | .dev = { | ||
134 | .platform_data = &platform_serial_ports, | ||
135 | }, | ||
136 | }; | ||
137 | |||
138 | static struct platform_device *devices[] __initdata = { | ||
139 | &spipnx_1, | ||
140 | &spipnx_2, | ||
141 | &serial_device, | ||
142 | }; | ||
143 | |||
144 | |||
145 | extern void pnx4008_uart_init(void); | ||
146 | |||
147 | static void __init pnx4008_init(void) | ||
148 | { | ||
149 | /*disable all START interrupt sources, | ||
150 | and clear all START interrupt flags */ | ||
151 | __raw_writel(0, START_INT_ER_REG(SE_PIN_BASE_INT)); | ||
152 | __raw_writel(0, START_INT_ER_REG(SE_INT_BASE_INT)); | ||
153 | __raw_writel(0xffffffff, START_INT_RSR_REG(SE_PIN_BASE_INT)); | ||
154 | __raw_writel(0xffffffff, START_INT_RSR_REG(SE_INT_BASE_INT)); | ||
155 | |||
156 | platform_add_devices(devices, ARRAY_SIZE(devices)); | ||
157 | spi_register_board_info(spi_board_info, ARRAY_SIZE(spi_board_info)); | ||
158 | /* Switch on the UART clocks */ | ||
159 | pnx4008_uart_init(); | ||
160 | } | ||
161 | |||
162 | static struct map_desc pnx4008_io_desc[] __initdata = { | ||
163 | { | ||
164 | .virtual = IO_ADDRESS(PNX4008_IRAM_BASE), | ||
165 | .pfn = __phys_to_pfn(PNX4008_IRAM_BASE), | ||
166 | .length = SZ_64K, | ||
167 | .type = MT_DEVICE, | ||
168 | }, { | ||
169 | .virtual = IO_ADDRESS(PNX4008_NDF_FLASH_BASE), | ||
170 | .pfn = __phys_to_pfn(PNX4008_NDF_FLASH_BASE), | ||
171 | .length = SZ_1M - SZ_128K, | ||
172 | .type = MT_DEVICE, | ||
173 | }, { | ||
174 | .virtual = IO_ADDRESS(PNX4008_JPEG_CONFIG_BASE), | ||
175 | .pfn = __phys_to_pfn(PNX4008_JPEG_CONFIG_BASE), | ||
176 | .length = SZ_128K * 3, | ||
177 | .type = MT_DEVICE, | ||
178 | }, { | ||
179 | .virtual = IO_ADDRESS(PNX4008_DMA_CONFIG_BASE), | ||
180 | .pfn = __phys_to_pfn(PNX4008_DMA_CONFIG_BASE), | ||
181 | .length = SZ_1M, | ||
182 | .type = MT_DEVICE, | ||
183 | }, { | ||
184 | .virtual = IO_ADDRESS(PNX4008_AHB2FAB_BASE), | ||
185 | .pfn = __phys_to_pfn(PNX4008_AHB2FAB_BASE), | ||
186 | .length = SZ_1M, | ||
187 | .type = MT_DEVICE, | ||
188 | }, | ||
189 | }; | ||
190 | |||
191 | void __init pnx4008_map_io(void) | ||
192 | { | ||
193 | iotable_init(pnx4008_io_desc, ARRAY_SIZE(pnx4008_io_desc)); | ||
194 | } | ||
195 | |||
196 | extern struct sys_timer pnx4008_timer; | ||
197 | |||
198 | MACHINE_START(PNX4008, "Philips PNX4008") | ||
199 | /* Maintainer: MontaVista Software Inc. */ | ||
200 | .phys_io = 0x40090000, | ||
201 | .io_pg_offst = (0xf4090000 >> 18) & 0xfffc, | ||
202 | .boot_params = 0x80000100, | ||
203 | .map_io = pnx4008_map_io, | ||
204 | .init_irq = pnx4008_init_irq, | ||
205 | .init_machine = pnx4008_init, | ||
206 | .timer = &pnx4008_timer, | ||
207 | MACHINE_END | ||