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-rw-r--r--arch/arm/mach-omap2/Makefile1
-rw-r--r--arch/arm/mach-omap2/clock3xxx_data.c14
-rw-r--r--arch/arm/mach-omap2/id.c2
-rw-r--r--arch/arm/mach-omap2/include/mach/entry-macro.S6
-rw-r--r--arch/arm/mach-omap2/omap-smp.c3
-rw-r--r--arch/arm/mach-omap2/pm34xx.c4
6 files changed, 17 insertions, 13 deletions
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 63b2d8859c3..88d3a1e920f 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -25,6 +25,7 @@ obj-$(CONFIG_LOCAL_TIMERS) += timer-mpu.o
25obj-$(CONFIG_HOTPLUG_CPU) += omap-hotplug.o 25obj-$(CONFIG_HOTPLUG_CPU) += omap-hotplug.o
26obj-$(CONFIG_ARCH_OMAP4) += omap44xx-smc.o omap4-common.o 26obj-$(CONFIG_ARCH_OMAP4) += omap44xx-smc.o omap4-common.o
27 27
28AFLAGS_omap-headsmp.o :=-Wa,-march=armv7-a
28AFLAGS_omap44xx-smc.o :=-Wa,-march=armv7-a 29AFLAGS_omap44xx-smc.o :=-Wa,-march=armv7-a
29 30
30# Functions loaded to SRAM 31# Functions loaded to SRAM
diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach-omap2/clock3xxx_data.c
index 138646deac8..dfdce2d8277 100644
--- a/arch/arm/mach-omap2/clock3xxx_data.c
+++ b/arch/arm/mach-omap2/clock3xxx_data.c
@@ -3417,7 +3417,13 @@ int __init omap3xxx_clk_init(void)
3417 struct omap_clk *c; 3417 struct omap_clk *c;
3418 u32 cpu_clkflg = CK_3XXX; 3418 u32 cpu_clkflg = CK_3XXX;
3419 3419
3420 if (cpu_is_omap34xx()) { 3420 if (cpu_is_omap3517()) {
3421 cpu_mask = RATE_IN_3XXX | RATE_IN_3430ES2PLUS;
3422 cpu_clkflg |= CK_3517;
3423 } else if (cpu_is_omap3505()) {
3424 cpu_mask = RATE_IN_3XXX | RATE_IN_3430ES2PLUS;
3425 cpu_clkflg |= CK_3505;
3426 } else if (cpu_is_omap34xx()) {
3421 cpu_mask = RATE_IN_3XXX; 3427 cpu_mask = RATE_IN_3XXX;
3422 cpu_clkflg |= CK_343X; 3428 cpu_clkflg |= CK_343X;
3423 3429
@@ -3432,12 +3438,6 @@ int __init omap3xxx_clk_init(void)
3432 cpu_mask |= RATE_IN_3430ES2PLUS; 3438 cpu_mask |= RATE_IN_3430ES2PLUS;
3433 cpu_clkflg |= CK_3430ES2; 3439 cpu_clkflg |= CK_3430ES2;
3434 } 3440 }
3435 } else if (cpu_is_omap3517()) {
3436 cpu_mask = RATE_IN_3XXX | RATE_IN_3430ES2PLUS;
3437 cpu_clkflg |= CK_3517;
3438 } else if (cpu_is_omap3505()) {
3439 cpu_mask = RATE_IN_3XXX | RATE_IN_3430ES2PLUS;
3440 cpu_clkflg |= CK_3505;
3441 } 3441 }
3442 3442
3443 if (omap3_has_192mhz_clk()) 3443 if (omap3_has_192mhz_clk())
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index e8256a2ed8e..9a879f95950 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -284,8 +284,8 @@ static void __init omap3_check_revision(void)
284 default: 284 default:
285 omap_revision = OMAP3630_REV_ES1_2; 285 omap_revision = OMAP3630_REV_ES1_2;
286 omap_chip.oc |= CHIP_IS_OMAP3630ES1_2; 286 omap_chip.oc |= CHIP_IS_OMAP3630ES1_2;
287 break;
288 } 287 }
288 break;
289 default: 289 default:
290 /* Unknown default to latest silicon rev as default*/ 290 /* Unknown default to latest silicon rev as default*/
291 omap_revision = OMAP3630_REV_ES1_2; 291 omap_revision = OMAP3630_REV_ES1_2;
diff --git a/arch/arm/mach-omap2/include/mach/entry-macro.S b/arch/arm/mach-omap2/include/mach/entry-macro.S
index 50fd7491664..06e64e1fc28 100644
--- a/arch/arm/mach-omap2/include/mach/entry-macro.S
+++ b/arch/arm/mach-omap2/include/mach/entry-macro.S
@@ -177,7 +177,10 @@ omap_irq_base: .word 0
177 cmpne \irqnr, \tmp 177 cmpne \irqnr, \tmp
178 cmpcs \irqnr, \irqnr 178 cmpcs \irqnr, \irqnr
179 .endm 179 .endm
180#endif
181#endif /* MULTI_OMAP2 */
180 182
183#ifdef CONFIG_SMP
181 /* We assume that irqstat (the raw value of the IRQ acknowledge 184 /* We assume that irqstat (the raw value of the IRQ acknowledge
182 * register) is preserved from the macro above. 185 * register) is preserved from the macro above.
183 * If there is an IPI, we immediately signal end of interrupt 186 * If there is an IPI, we immediately signal end of interrupt
@@ -205,8 +208,7 @@ omap_irq_base: .word 0
205 streq \irqstat, [\base, #GIC_CPU_EOI] 208 streq \irqstat, [\base, #GIC_CPU_EOI]
206 cmp \tmp, #0 209 cmp \tmp, #0
207 .endm 210 .endm
208#endif 211#endif /* CONFIG_SMP */
209#endif /* MULTI_OMAP2 */
210 212
211 .macro irq_prio_table 213 .macro irq_prio_table
212 .endm 214 .endm
diff --git a/arch/arm/mach-omap2/omap-smp.c b/arch/arm/mach-omap2/omap-smp.c
index af3c20c8d3f..9e9f70e18e3 100644
--- a/arch/arm/mach-omap2/omap-smp.c
+++ b/arch/arm/mach-omap2/omap-smp.c
@@ -102,8 +102,7 @@ static void __init wakeup_secondary(void)
102 * Send a 'sev' to wake the secondary core from WFE. 102 * Send a 'sev' to wake the secondary core from WFE.
103 * Drain the outstanding writes to memory 103 * Drain the outstanding writes to memory
104 */ 104 */
105 dsb(); 105 dsb_sev();
106 set_event();
107 mb(); 106 mb();
108} 107}
109 108
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index fb4994ad622..7b03426c72a 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -480,7 +480,9 @@ void omap_sram_idle(void)
480 } 480 }
481 481
482 /* Disable IO-PAD and IO-CHAIN wakeup */ 482 /* Disable IO-PAD and IO-CHAIN wakeup */
483 if (omap3_has_io_wakeup() && core_next_state < PWRDM_POWER_ON) { 483 if (omap3_has_io_wakeup() &&
484 (per_next_state < PWRDM_POWER_ON ||
485 core_next_state < PWRDM_POWER_ON)) {
484 prm_clear_mod_reg_bits(OMAP3430_EN_IO_MASK, WKUP_MOD, PM_WKEN); 486 prm_clear_mod_reg_bits(OMAP3430_EN_IO_MASK, WKUP_MOD, PM_WKEN);
485 omap3_disable_io_chain(); 487 omap3_disable_io_chain();
486 } 488 }