diff options
Diffstat (limited to 'arch/arm/mach-omap2/pm24xx.c')
-rw-r--r-- | arch/arm/mach-omap2/pm24xx.c | 75 |
1 files changed, 8 insertions, 67 deletions
diff --git a/arch/arm/mach-omap2/pm24xx.c b/arch/arm/mach-omap2/pm24xx.c index 36c587f4981..5ca45ca7694 100644 --- a/arch/arm/mach-omap2/pm24xx.c +++ b/arch/arm/mach-omap2/pm24xx.c | |||
@@ -52,19 +52,6 @@ | |||
52 | #include "powerdomain.h" | 52 | #include "powerdomain.h" |
53 | #include "clockdomain.h" | 53 | #include "clockdomain.h" |
54 | 54 | ||
55 | #ifdef CONFIG_SUSPEND | ||
56 | static suspend_state_t suspend_state = PM_SUSPEND_ON; | ||
57 | static inline bool is_suspending(void) | ||
58 | { | ||
59 | return (suspend_state != PM_SUSPEND_ON); | ||
60 | } | ||
61 | #else | ||
62 | static inline bool is_suspending(void) | ||
63 | { | ||
64 | return false; | ||
65 | } | ||
66 | #endif | ||
67 | |||
68 | static void (*omap2_sram_idle)(void); | 55 | static void (*omap2_sram_idle)(void); |
69 | static void (*omap2_sram_suspend)(u32 dllctrl, void __iomem *sdrc_dlla_ctrl, | 56 | static void (*omap2_sram_suspend)(u32 dllctrl, void __iomem *sdrc_dlla_ctrl, |
70 | void __iomem *sdrc_power); | 57 | void __iomem *sdrc_power); |
@@ -84,7 +71,7 @@ static int omap2_fclks_active(void) | |||
84 | return (f1 | f2) ? 1 : 0; | 71 | return (f1 | f2) ? 1 : 0; |
85 | } | 72 | } |
86 | 73 | ||
87 | static void omap2_enter_full_retention(void) | 74 | static int omap2_enter_full_retention(void) |
88 | { | 75 | { |
89 | u32 l; | 76 | u32 l; |
90 | 77 | ||
@@ -147,6 +134,8 @@ no_sleep: | |||
147 | 134 | ||
148 | /* Mask future PRCM-to-MPU interrupts */ | 135 | /* Mask future PRCM-to-MPU interrupts */ |
149 | omap2_prm_write_mod_reg(0x0, OCP_MOD, OMAP2_PRCM_IRQSTATUS_MPU_OFFSET); | 136 | omap2_prm_write_mod_reg(0x0, OCP_MOD, OMAP2_PRCM_IRQSTATUS_MPU_OFFSET); |
137 | |||
138 | return 0; | ||
150 | } | 139 | } |
151 | 140 | ||
152 | static int omap2_i2c_active(void) | 141 | static int omap2_i2c_active(void) |
@@ -243,57 +232,6 @@ out: | |||
243 | local_fiq_enable(); | 232 | local_fiq_enable(); |
244 | } | 233 | } |
245 | 234 | ||
246 | #ifdef CONFIG_SUSPEND | ||
247 | static int omap2_pm_begin(suspend_state_t state) | ||
248 | { | ||
249 | disable_hlt(); | ||
250 | suspend_state = state; | ||
251 | return 0; | ||
252 | } | ||
253 | |||
254 | static int omap2_pm_enter(suspend_state_t state) | ||
255 | { | ||
256 | int ret = 0; | ||
257 | |||
258 | switch (state) { | ||
259 | case PM_SUSPEND_STANDBY: | ||
260 | case PM_SUSPEND_MEM: | ||
261 | omap2_enter_full_retention(); | ||
262 | break; | ||
263 | default: | ||
264 | ret = -EINVAL; | ||
265 | } | ||
266 | |||
267 | return ret; | ||
268 | } | ||
269 | |||
270 | static void omap2_pm_end(void) | ||
271 | { | ||
272 | suspend_state = PM_SUSPEND_ON; | ||
273 | enable_hlt(); | ||
274 | } | ||
275 | |||
276 | static const struct platform_suspend_ops omap_pm_ops = { | ||
277 | .begin = omap2_pm_begin, | ||
278 | .enter = omap2_pm_enter, | ||
279 | .end = omap2_pm_end, | ||
280 | .valid = suspend_valid_only_mem, | ||
281 | }; | ||
282 | #else | ||
283 | static const struct platform_suspend_ops __initdata omap_pm_ops; | ||
284 | #endif /* CONFIG_SUSPEND */ | ||
285 | |||
286 | /* XXX This function should be shareable between OMAP2xxx and OMAP3 */ | ||
287 | static int __init clkdms_setup(struct clockdomain *clkdm, void *unused) | ||
288 | { | ||
289 | if (clkdm->flags & CLKDM_CAN_ENABLE_AUTO) | ||
290 | clkdm_allow_idle(clkdm); | ||
291 | else if (clkdm->flags & CLKDM_CAN_FORCE_SLEEP && | ||
292 | atomic_read(&clkdm->usecount) == 0) | ||
293 | clkdm_sleep(clkdm); | ||
294 | return 0; | ||
295 | } | ||
296 | |||
297 | static void __init prcm_setup_regs(void) | 235 | static void __init prcm_setup_regs(void) |
298 | { | 236 | { |
299 | int i, num_mem_banks; | 237 | int i, num_mem_banks; |
@@ -335,9 +273,13 @@ static void __init prcm_setup_regs(void) | |||
335 | clkdm_sleep(gfx_clkdm); | 273 | clkdm_sleep(gfx_clkdm); |
336 | 274 | ||
337 | /* Enable hardware-supervised idle for all clkdms */ | 275 | /* Enable hardware-supervised idle for all clkdms */ |
338 | clkdm_for_each(clkdms_setup, NULL); | 276 | clkdm_for_each(omap_pm_clkdms_setup, NULL); |
339 | clkdm_add_wkdep(mpu_clkdm, wkup_clkdm); | 277 | clkdm_add_wkdep(mpu_clkdm, wkup_clkdm); |
340 | 278 | ||
279 | #ifdef CONFIG_SUSPEND | ||
280 | omap_pm_suspend = omap2_enter_full_retention; | ||
281 | #endif | ||
282 | |||
341 | /* REVISIT: Configure number of 32 kHz clock cycles for sys_clk | 283 | /* REVISIT: Configure number of 32 kHz clock cycles for sys_clk |
342 | * stabilisation */ | 284 | * stabilisation */ |
343 | omap2_prm_write_mod_reg(15 << OMAP_SETUP_TIME_SHIFT, OMAP24XX_GR_MOD, | 285 | omap2_prm_write_mod_reg(15 << OMAP_SETUP_TIME_SHIFT, OMAP24XX_GR_MOD, |
@@ -438,7 +380,6 @@ static int __init omap2_pm_init(void) | |||
438 | omap24xx_cpu_suspend_sz); | 380 | omap24xx_cpu_suspend_sz); |
439 | } | 381 | } |
440 | 382 | ||
441 | suspend_set_ops(&omap_pm_ops); | ||
442 | arm_pm_idle = omap2_pm_idle; | 383 | arm_pm_idle = omap2_pm_idle; |
443 | 384 | ||
444 | return 0; | 385 | return 0; |