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-rw-r--r--arch/arm/mach-omap1/clock.h178
1 files changed, 177 insertions, 1 deletions
diff --git a/arch/arm/mach-omap1/clock.h b/arch/arm/mach-omap1/clock.h
index 3d04f4f6767..1e4918a3a5e 100644
--- a/arch/arm/mach-omap1/clock.h
+++ b/arch/arm/mach-omap1/clock.h
@@ -14,8 +14,184 @@
14#define __ARCH_ARM_MACH_OMAP1_CLOCK_H 14#define __ARCH_ARM_MACH_OMAP1_CLOCK_H
15 15
16#include <linux/clk.h> 16#include <linux/clk.h>
17#include <linux/list.h>
17 18
18#include <plat/clock.h> 19#include <linux/clkdev.h>
20
21struct module;
22struct clk;
23
24struct omap_clk {
25 u16 cpu;
26 struct clk_lookup lk;
27};
28
29#define CLK(dev, con, ck, cp) \
30 { \
31 .cpu = cp, \
32 .lk = { \
33 .dev_id = dev, \
34 .con_id = con, \
35 .clk = ck, \
36 }, \
37 }
38
39/* Platform flags for the clkdev-OMAP integration code */
40#define CK_310 (1 << 0)
41#define CK_7XX (1 << 1) /* 7xx, 850 */
42#define CK_1510 (1 << 2)
43#define CK_16XX (1 << 3) /* 16xx, 17xx, 5912 */
44#define CK_1710 (1 << 4) /* 1710 extra for rate selection */
45
46
47/* Temporary, needed during the common clock framework conversion */
48#define __clk_get_name(clk) (clk->name)
49#define __clk_get_parent(clk) (clk->parent)
50#define __clk_get_rate(clk) (clk->rate)
51
52/**
53 * struct clkops - some clock function pointers
54 * @enable: fn ptr that enables the current clock in hardware
55 * @disable: fn ptr that enables the current clock in hardware
56 * @find_idlest: function returning the IDLEST register for the clock's IP blk
57 * @find_companion: function returning the "companion" clk reg for the clock
58 * @allow_idle: fn ptr that enables autoidle for the current clock in hardware
59 * @deny_idle: fn ptr that disables autoidle for the current clock in hardware
60 *
61 * A "companion" clk is an accompanying clock to the one being queried
62 * that must be enabled for the IP module connected to the clock to
63 * become accessible by the hardware. Neither @find_idlest nor
64 * @find_companion should be needed; that information is IP
65 * block-specific; the hwmod code has been created to handle this, but
66 * until hwmod data is ready and drivers have been converted to use PM
67 * runtime calls in place of clk_enable()/clk_disable(), @find_idlest and
68 * @find_companion must, unfortunately, remain.
69 */
70struct clkops {
71 int (*enable)(struct clk *);
72 void (*disable)(struct clk *);
73 void (*find_idlest)(struct clk *, void __iomem **,
74 u8 *, u8 *);
75 void (*find_companion)(struct clk *, void __iomem **,
76 u8 *);
77 void (*allow_idle)(struct clk *);
78 void (*deny_idle)(struct clk *);
79};
80
81/*
82 * struct clk.flags possibilities
83 *
84 * XXX document the rest of the clock flags here
85 *
86 * CLOCK_CLKOUTX2: (OMAP4 only) DPLL CLKOUT and CLKOUTX2 GATE_CTRL
87 * bits share the same register. This flag allows the
88 * omap4_dpllmx*() code to determine which GATE_CTRL bit field
89 * should be used. This is a temporary solution - a better approach
90 * would be to associate clock type-specific data with the clock,
91 * similar to the struct dpll_data approach.
92 */
93#define ENABLE_REG_32BIT (1 << 0) /* Use 32-bit access */
94#define CLOCK_IDLE_CONTROL (1 << 1)
95#define CLOCK_NO_IDLE_PARENT (1 << 2)
96#define ENABLE_ON_INIT (1 << 3) /* Enable upon framework init */
97#define INVERT_ENABLE (1 << 4) /* 0 enables, 1 disables */
98#define CLOCK_CLKOUTX2 (1 << 5)
99
100/**
101 * struct clk - OMAP struct clk
102 * @node: list_head connecting this clock into the full clock list
103 * @ops: struct clkops * for this clock
104 * @name: the name of the clock in the hardware (used in hwmod data and debug)
105 * @parent: pointer to this clock's parent struct clk
106 * @children: list_head connecting to the child clks' @sibling list_heads
107 * @sibling: list_head connecting this clk to its parent clk's @children
108 * @rate: current clock rate
109 * @enable_reg: register to write to enable the clock (see @enable_bit)
110 * @recalc: fn ptr that returns the clock's current rate
111 * @set_rate: fn ptr that can change the clock's current rate
112 * @round_rate: fn ptr that can round the clock's current rate
113 * @init: fn ptr to do clock-specific initialization
114 * @enable_bit: bitshift to write to enable/disable the clock (see @enable_reg)
115 * @usecount: number of users that have requested this clock to be enabled
116 * @fixed_div: when > 0, this clock's rate is its parent's rate / @fixed_div
117 * @flags: see "struct clk.flags possibilities" above
118 * @rate_offset: bitshift for rate selection bitfield (OMAP1 only)
119 * @src_offset: bitshift for source selection bitfield (OMAP1 only)
120 *
121 * XXX @rate_offset, @src_offset should probably be removed and OMAP1
122 * clock code converted to use clksel.
123 *
124 * XXX @usecount is poorly named. It should be "enable_count" or
125 * something similar. "users" in the description refers to kernel
126 * code (core code or drivers) that have called clk_enable() and not
127 * yet called clk_disable(); the usecount of parent clocks is also
128 * incremented by the clock code when clk_enable() is called on child
129 * clocks and decremented by the clock code when clk_disable() is
130 * called on child clocks.
131 *
132 * XXX @clkdm, @usecount, @children, @sibling should be marked for
133 * internal use only.
134 *
135 * @children and @sibling are used to optimize parent-to-child clock
136 * tree traversals. (child-to-parent traversals use @parent.)
137 *
138 * XXX The notion of the clock's current rate probably needs to be
139 * separated from the clock's target rate.
140 */
141struct clk {
142 struct list_head node;
143 const struct clkops *ops;
144 const char *name;
145 struct clk *parent;
146 struct list_head children;
147 struct list_head sibling; /* node for children */
148 unsigned long rate;
149 void __iomem *enable_reg;
150 unsigned long (*recalc)(struct clk *);
151 int (*set_rate)(struct clk *, unsigned long);
152 long (*round_rate)(struct clk *, unsigned long);
153 void (*init)(struct clk *);
154 u8 enable_bit;
155 s8 usecount;
156 u8 fixed_div;
157 u8 flags;
158 u8 rate_offset;
159 u8 src_offset;
160#if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS)
161 struct dentry *dent; /* For visible tree hierarchy */
162#endif
163};
164
165struct clk_functions {
166 int (*clk_enable)(struct clk *clk);
167 void (*clk_disable)(struct clk *clk);
168 long (*clk_round_rate)(struct clk *clk, unsigned long rate);
169 int (*clk_set_rate)(struct clk *clk, unsigned long rate);
170 int (*clk_set_parent)(struct clk *clk, struct clk *parent);
171 void (*clk_allow_idle)(struct clk *clk);
172 void (*clk_deny_idle)(struct clk *clk);
173 void (*clk_disable_unused)(struct clk *clk);
174};
175
176extern int mpurate;
177
178extern int clk_init(struct clk_functions *custom_clocks);
179extern void clk_preinit(struct clk *clk);
180extern int clk_register(struct clk *clk);
181extern void clk_reparent(struct clk *child, struct clk *parent);
182extern void clk_unregister(struct clk *clk);
183extern void propagate_rate(struct clk *clk);
184extern void recalculate_root_clocks(void);
185extern unsigned long followparent_recalc(struct clk *clk);
186extern void clk_enable_init_clocks(void);
187unsigned long omap_fixed_divisor_recalc(struct clk *clk);
188extern struct clk *omap_clk_get_by_name(const char *name);
189extern int omap_clk_enable_autoidle_all(void);
190extern int omap_clk_disable_autoidle_all(void);
191
192extern const struct clkops clkops_null;
193
194extern struct clk dummy_ck;
19 195
20int omap1_clk_init(void); 196int omap1_clk_init(void);
21void omap1_clk_late_init(void); 197void omap1_clk_late_init(void);
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