diff options
Diffstat (limited to 'arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h')
-rw-r--r-- | arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h | 42 |
1 files changed, 22 insertions, 20 deletions
diff --git a/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h b/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h index 0fbf87b1633..b1f937eda29 100644 --- a/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h +++ b/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h | |||
@@ -52,25 +52,27 @@ | |||
52 | #define EP93XX_AHB_VIRT_BASE 0xfef00000 | 52 | #define EP93XX_AHB_VIRT_BASE 0xfef00000 |
53 | #define EP93XX_AHB_SIZE 0x00100000 | 53 | #define EP93XX_AHB_SIZE 0x00100000 |
54 | 54 | ||
55 | #define EP93XX_AHB_PHYS(x) (EP93XX_AHB_PHYS_BASE + (x)) | ||
55 | #define EP93XX_AHB_IOMEM(x) IOMEM(EP93XX_AHB_VIRT_BASE + (x)) | 56 | #define EP93XX_AHB_IOMEM(x) IOMEM(EP93XX_AHB_VIRT_BASE + (x)) |
56 | 57 | ||
57 | #define EP93XX_APB_PHYS_BASE 0x80800000 | 58 | #define EP93XX_APB_PHYS_BASE 0x80800000 |
58 | #define EP93XX_APB_VIRT_BASE 0xfed00000 | 59 | #define EP93XX_APB_VIRT_BASE 0xfed00000 |
59 | #define EP93XX_APB_SIZE 0x00200000 | 60 | #define EP93XX_APB_SIZE 0x00200000 |
60 | 61 | ||
62 | #define EP93XX_APB_PHYS(x) (EP93XX_APB_PHYS_BASE + (x)) | ||
61 | #define EP93XX_APB_IOMEM(x) IOMEM(EP93XX_APB_VIRT_BASE + (x)) | 63 | #define EP93XX_APB_IOMEM(x) IOMEM(EP93XX_APB_VIRT_BASE + (x)) |
62 | 64 | ||
63 | 65 | ||
64 | /* AHB peripherals */ | 66 | /* AHB peripherals */ |
65 | #define EP93XX_DMA_BASE EP93XX_AHB_IOMEM(0x00000000) | 67 | #define EP93XX_DMA_BASE EP93XX_AHB_IOMEM(0x00000000) |
66 | 68 | ||
67 | #define EP93XX_ETHERNET_PHYS_BASE (EP93XX_AHB_PHYS_BASE + 0x00010000) | 69 | #define EP93XX_ETHERNET_PHYS_BASE EP93XX_AHB_PHYS(0x00010000) |
68 | #define EP93XX_ETHERNET_BASE EP93XX_AHB_IOMEM(0x00010000) | 70 | #define EP93XX_ETHERNET_BASE EP93XX_AHB_IOMEM(0x00010000) |
69 | 71 | ||
70 | #define EP93XX_USB_PHYS_BASE (EP93XX_AHB_PHYS_BASE + 0x00020000) | 72 | #define EP93XX_USB_PHYS_BASE EP93XX_AHB_PHYS(0x00020000) |
71 | #define EP93XX_USB_BASE EP93XX_AHB_IOMEM(0x00020000) | 73 | #define EP93XX_USB_BASE EP93XX_AHB_IOMEM(0x00020000) |
72 | 74 | ||
73 | #define EP93XX_RASTER_PHYS_BASE (EP93XX_AHB_PHYS_BASE + 0x00030000) | 75 | #define EP93XX_RASTER_PHYS_BASE EP93XX_AHB_PHYS(0x00030000) |
74 | #define EP93XX_RASTER_BASE EP93XX_AHB_IOMEM(0x00030000) | 76 | #define EP93XX_RASTER_BASE EP93XX_AHB_IOMEM(0x00030000) |
75 | 77 | ||
76 | #define EP93XX_GRAPHICS_ACCEL_BASE EP93XX_AHB_IOMEM(0x00040000) | 78 | #define EP93XX_GRAPHICS_ACCEL_BASE EP93XX_AHB_IOMEM(0x00040000) |
@@ -112,21 +114,10 @@ | |||
112 | 114 | ||
113 | #define EP93XX_GPIO_BASE EP93XX_APB_IOMEM(0x00040000) | 115 | #define EP93XX_GPIO_BASE EP93XX_APB_IOMEM(0x00040000) |
114 | #define EP93XX_GPIO_REG(x) (EP93XX_GPIO_BASE + (x)) | 116 | #define EP93XX_GPIO_REG(x) (EP93XX_GPIO_BASE + (x)) |
115 | #define EP93XX_GPIO_F_INT_TYPE1 EP93XX_GPIO_REG(0x4c) | ||
116 | #define EP93XX_GPIO_F_INT_TYPE2 EP93XX_GPIO_REG(0x50) | ||
117 | #define EP93XX_GPIO_F_INT_ACK EP93XX_GPIO_REG(0x54) | ||
118 | #define EP93XX_GPIO_F_INT_ENABLE EP93XX_GPIO_REG(0x58) | ||
119 | #define EP93XX_GPIO_F_INT_STATUS EP93XX_GPIO_REG(0x5c) | 117 | #define EP93XX_GPIO_F_INT_STATUS EP93XX_GPIO_REG(0x5c) |
120 | #define EP93XX_GPIO_A_INT_TYPE1 EP93XX_GPIO_REG(0x90) | ||
121 | #define EP93XX_GPIO_A_INT_TYPE2 EP93XX_GPIO_REG(0x94) | ||
122 | #define EP93XX_GPIO_A_INT_ACK EP93XX_GPIO_REG(0x98) | ||
123 | #define EP93XX_GPIO_A_INT_ENABLE EP93XX_GPIO_REG(0x9c) | ||
124 | #define EP93XX_GPIO_A_INT_STATUS EP93XX_GPIO_REG(0xa0) | 118 | #define EP93XX_GPIO_A_INT_STATUS EP93XX_GPIO_REG(0xa0) |
125 | #define EP93XX_GPIO_B_INT_TYPE1 EP93XX_GPIO_REG(0xac) | ||
126 | #define EP93XX_GPIO_B_INT_TYPE2 EP93XX_GPIO_REG(0xb0) | ||
127 | #define EP93XX_GPIO_B_INT_ACK EP93XX_GPIO_REG(0xb4) | ||
128 | #define EP93XX_GPIO_B_INT_ENABLE EP93XX_GPIO_REG(0xb8) | ||
129 | #define EP93XX_GPIO_B_INT_STATUS EP93XX_GPIO_REG(0xbc) | 119 | #define EP93XX_GPIO_B_INT_STATUS EP93XX_GPIO_REG(0xbc) |
120 | #define EP93XX_GPIO_EEDRIVE EP93XX_GPIO_REG(0xc8) | ||
130 | 121 | ||
131 | #define EP93XX_AAC_BASE EP93XX_APB_IOMEM(0x00080000) | 122 | #define EP93XX_AAC_BASE EP93XX_APB_IOMEM(0x00080000) |
132 | 123 | ||
@@ -134,13 +125,13 @@ | |||
134 | 125 | ||
135 | #define EP93XX_IRDA_BASE EP93XX_APB_IOMEM(0x000b0000) | 126 | #define EP93XX_IRDA_BASE EP93XX_APB_IOMEM(0x000b0000) |
136 | 127 | ||
137 | #define EP93XX_UART1_PHYS_BASE (EP93XX_APB_PHYS_BASE + 0x000c0000) | 128 | #define EP93XX_UART1_PHYS_BASE EP93XX_APB_PHYS(0x000c0000) |
138 | #define EP93XX_UART1_BASE EP93XX_APB_IOMEM(0x000c0000) | 129 | #define EP93XX_UART1_BASE EP93XX_APB_IOMEM(0x000c0000) |
139 | 130 | ||
140 | #define EP93XX_UART2_PHYS_BASE (EP93XX_APB_PHYS_BASE + 0x000d0000) | 131 | #define EP93XX_UART2_PHYS_BASE EP93XX_APB_PHYS(0x000d0000) |
141 | #define EP93XX_UART2_BASE EP93XX_APB_IOMEM(0x000d0000) | 132 | #define EP93XX_UART2_BASE EP93XX_APB_IOMEM(0x000d0000) |
142 | 133 | ||
143 | #define EP93XX_UART3_PHYS_BASE (EP93XX_APB_PHYS_BASE + 0x000e0000) | 134 | #define EP93XX_UART3_PHYS_BASE EP93XX_APB_PHYS(0x000e0000) |
144 | #define EP93XX_UART3_BASE EP93XX_APB_IOMEM(0x000e0000) | 135 | #define EP93XX_UART3_BASE EP93XX_APB_IOMEM(0x000e0000) |
145 | 136 | ||
146 | #define EP93XX_KEY_MATRIX_BASE EP93XX_APB_IOMEM(0x000f0000) | 137 | #define EP93XX_KEY_MATRIX_BASE EP93XX_APB_IOMEM(0x000f0000) |
@@ -148,10 +139,10 @@ | |||
148 | #define EP93XX_ADC_BASE EP93XX_APB_IOMEM(0x00100000) | 139 | #define EP93XX_ADC_BASE EP93XX_APB_IOMEM(0x00100000) |
149 | #define EP93XX_TOUCHSCREEN_BASE EP93XX_APB_IOMEM(0x00100000) | 140 | #define EP93XX_TOUCHSCREEN_BASE EP93XX_APB_IOMEM(0x00100000) |
150 | 141 | ||
151 | #define EP93XX_PWM_PHYS_BASE (EP93XX_APB_PHYS_BASE + 0x00110000) | 142 | #define EP93XX_PWM_PHYS_BASE EP93XX_APB_PHYS(0x00110000) |
152 | #define EP93XX_PWM_BASE EP93XX_APB_IOMEM(0x00110000) | 143 | #define EP93XX_PWM_BASE EP93XX_APB_IOMEM(0x00110000) |
153 | 144 | ||
154 | #define EP93XX_RTC_PHYS_BASE (EP93XX_APB_PHYS_BASE + 0x00120000) | 145 | #define EP93XX_RTC_PHYS_BASE EP93XX_APB_PHYS(0x00120000) |
155 | #define EP93XX_RTC_BASE EP93XX_APB_IOMEM(0x00120000) | 146 | #define EP93XX_RTC_BASE EP93XX_APB_IOMEM(0x00120000) |
156 | 147 | ||
157 | #define EP93XX_SYSCON_BASE EP93XX_APB_IOMEM(0x00130000) | 148 | #define EP93XX_SYSCON_BASE EP93XX_APB_IOMEM(0x00130000) |
@@ -218,6 +209,17 @@ | |||
218 | #define EP93XX_SYSCON_KEYTCHCLKDIV_ADIV (1<<16) | 209 | #define EP93XX_SYSCON_KEYTCHCLKDIV_ADIV (1<<16) |
219 | #define EP93XX_SYSCON_KEYTCHCLKDIV_KEN (1<<15) | 210 | #define EP93XX_SYSCON_KEYTCHCLKDIV_KEN (1<<15) |
220 | #define EP93XX_SYSCON_KEYTCHCLKDIV_KDIV (1<<0) | 211 | #define EP93XX_SYSCON_KEYTCHCLKDIV_KDIV (1<<0) |
212 | #define EP93XX_SYSCON_SYSCFG EP93XX_SYSCON_REG(0x9c) | ||
213 | #define EP93XX_SYSCON_SYSCFG_REV_MASK (0xf0000000) | ||
214 | #define EP93XX_SYSCON_SYSCFG_REV_SHIFT (28) | ||
215 | #define EP93XX_SYSCON_SYSCFG_SBOOT (1<<8) | ||
216 | #define EP93XX_SYSCON_SYSCFG_LCSN7 (1<<7) | ||
217 | #define EP93XX_SYSCON_SYSCFG_LCSN6 (1<<6) | ||
218 | #define EP93XX_SYSCON_SYSCFG_LASDO (1<<5) | ||
219 | #define EP93XX_SYSCON_SYSCFG_LEEDA (1<<4) | ||
220 | #define EP93XX_SYSCON_SYSCFG_LEECLK (1<<3) | ||
221 | #define EP93XX_SYSCON_SYSCFG_LCSN2 (1<<1) | ||
222 | #define EP93XX_SYSCON_SYSCFG_LCSN1 (1<<0) | ||
221 | #define EP93XX_SYSCON_SWLOCK EP93XX_SYSCON_REG(0xc0) | 223 | #define EP93XX_SYSCON_SWLOCK EP93XX_SYSCON_REG(0xc0) |
222 | 224 | ||
223 | #define EP93XX_WATCHDOG_BASE EP93XX_APB_IOMEM(0x00140000) | 225 | #define EP93XX_WATCHDOG_BASE EP93XX_APB_IOMEM(0x00140000) |