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-rw-r--r--arch/arm/mach-ep93xx/include/mach/dma.h93
-rw-r--r--arch/arm/mach-ep93xx/include/mach/entry-macro.S59
-rw-r--r--arch/arm/mach-ep93xx/include/mach/ep93xx_keypad.h35
-rw-r--r--arch/arm/mach-ep93xx/include/mach/ep93xx_spi.h29
-rw-r--r--arch/arm/mach-ep93xx/include/mach/fb.h56
-rw-r--r--arch/arm/mach-ep93xx/include/mach/gpio.h120
-rw-r--r--arch/arm/mach-ep93xx/include/mach/io.h22
-rw-r--r--arch/arm/mach-ep93xx/include/mach/system.h24
-rw-r--r--arch/arm/mach-ep93xx/include/mach/ts72xx.h98
-rw-r--r--arch/arm/mach-ep93xx/include/mach/vmalloc.h5
10 files changed, 541 insertions, 0 deletions
diff --git a/arch/arm/mach-ep93xx/include/mach/dma.h b/arch/arm/mach-ep93xx/include/mach/dma.h
new file mode 100644
index 00000000000..46d4d876e6f
--- /dev/null
+++ b/arch/arm/mach-ep93xx/include/mach/dma.h
@@ -0,0 +1,93 @@
1#ifndef __ASM_ARCH_DMA_H
2#define __ASM_ARCH_DMA_H
3
4#include <linux/types.h>
5#include <linux/dmaengine.h>
6#include <linux/dma-mapping.h>
7
8/*
9 * M2P channels.
10 *
11 * Note that these values are also directly used for setting the PPALLOC
12 * register.
13 */
14#define EP93XX_DMA_I2S1 0
15#define EP93XX_DMA_I2S2 1
16#define EP93XX_DMA_AAC1 2
17#define EP93XX_DMA_AAC2 3
18#define EP93XX_DMA_AAC3 4
19#define EP93XX_DMA_I2S3 5
20#define EP93XX_DMA_UART1 6
21#define EP93XX_DMA_UART2 7
22#define EP93XX_DMA_UART3 8
23#define EP93XX_DMA_IRDA 9
24/* M2M channels */
25#define EP93XX_DMA_SSP 10
26#define EP93XX_DMA_IDE 11
27
28/**
29 * struct ep93xx_dma_data - configuration data for the EP93xx dmaengine
30 * @port: peripheral which is requesting the channel
31 * @direction: TX/RX channel
32 * @name: optional name for the channel, this is displayed in /proc/interrupts
33 *
34 * This information is passed as private channel parameter in a filter
35 * function. Note that this is only needed for slave/cyclic channels. For
36 * memcpy channels %NULL data should be passed.
37 */
38struct ep93xx_dma_data {
39 int port;
40 enum dma_data_direction direction;
41 const char *name;
42};
43
44/**
45 * struct ep93xx_dma_chan_data - platform specific data for a DMA channel
46 * @name: name of the channel, used for getting the right clock for the channel
47 * @base: mapped registers
48 * @irq: interrupt number used by this channel
49 */
50struct ep93xx_dma_chan_data {
51 const char *name;
52 void __iomem *base;
53 int irq;
54};
55
56/**
57 * struct ep93xx_dma_platform_data - platform data for the dmaengine driver
58 * @channels: array of channels which are passed to the driver
59 * @num_channels: number of channels in the array
60 *
61 * This structure is passed to the DMA engine driver via platform data. For
62 * M2P channels, contract is that even channels are for TX and odd for RX.
63 * There is no requirement for the M2M channels.
64 */
65struct ep93xx_dma_platform_data {
66 struct ep93xx_dma_chan_data *channels;
67 size_t num_channels;
68};
69
70static inline bool ep93xx_dma_chan_is_m2p(struct dma_chan *chan)
71{
72 return !strcmp(dev_name(chan->device->dev), "ep93xx-dma-m2p");
73}
74
75/**
76 * ep93xx_dma_chan_direction - returns direction the channel can be used
77 * @chan: channel
78 *
79 * This function can be used in filter functions to find out whether the
80 * channel supports given DMA direction. Only M2P channels have such
81 * limitation, for M2M channels the direction is configurable.
82 */
83static inline enum dma_data_direction
84ep93xx_dma_chan_direction(struct dma_chan *chan)
85{
86 if (!ep93xx_dma_chan_is_m2p(chan))
87 return DMA_NONE;
88
89 /* even channels are for TX, odd for RX */
90 return (chan->chan_id % 2 == 0) ? DMA_TO_DEVICE : DMA_FROM_DEVICE;
91}
92
93#endif /* __ASM_ARCH_DMA_H */
diff --git a/arch/arm/mach-ep93xx/include/mach/entry-macro.S b/arch/arm/mach-ep93xx/include/mach/entry-macro.S
new file mode 100644
index 00000000000..96b85e2c2c0
--- /dev/null
+++ b/arch/arm/mach-ep93xx/include/mach/entry-macro.S
@@ -0,0 +1,59 @@
1/*
2 * arch/arm/mach-ep93xx/include/mach/entry-macro.S
3 * IRQ demultiplexing for EP93xx
4 *
5 * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or (at
10 * your option) any later version.
11 */
12#include <mach/ep93xx-regs.h>
13
14 .macro disable_fiq
15 .endm
16
17 .macro get_irqnr_preamble, base, tmp
18 .endm
19
20 .macro arch_ret_to_user, tmp1, tmp2
21 .endm
22
23 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
24 ldr \base, =(EP93XX_AHB_VIRT_BASE)
25 orr \base, \base, #0x000b0000
26 mov \irqnr, #0
27 ldr \irqstat, [\base] @ lower 32 interrupts
28 cmp \irqstat, #0
29 bne 1001f
30
31 eor \base, \base, #0x00070000
32 ldr \irqstat, [\base] @ upper 32 interrupts
33 cmp \irqstat, #0
34 beq 1002f
35 mov \irqnr, #0x20
36
371001:
38 movs \tmp, \irqstat, lsl #16
39 movne \irqstat, \tmp
40 addeq \irqnr, \irqnr, #16
41
42 movs \tmp, \irqstat, lsl #8
43 movne \irqstat, \tmp
44 addeq \irqnr, \irqnr, #8
45
46 movs \tmp, \irqstat, lsl #4
47 movne \irqstat, \tmp
48 addeq \irqnr, \irqnr, #4
49
50 movs \tmp, \irqstat, lsl #2
51 movne \irqstat, \tmp
52 addeq \irqnr, \irqnr, #2
53
54 movs \tmp, \irqstat, lsl #1
55 addeq \irqnr, \irqnr, #1
56 orrs \base, \base, #1
57
581002:
59 .endm
diff --git a/arch/arm/mach-ep93xx/include/mach/ep93xx_keypad.h b/arch/arm/mach-ep93xx/include/mach/ep93xx_keypad.h
new file mode 100644
index 00000000000..1e2f4e97f42
--- /dev/null
+++ b/arch/arm/mach-ep93xx/include/mach/ep93xx_keypad.h
@@ -0,0 +1,35 @@
1/*
2 * arch/arm/mach-ep93xx/include/mach/ep93xx_keypad.h
3 */
4
5#ifndef __ASM_ARCH_EP93XX_KEYPAD_H
6#define __ASM_ARCH_EP93XX_KEYPAD_H
7
8struct matrix_keymap_data;
9
10/* flags for the ep93xx_keypad driver */
11#define EP93XX_KEYPAD_DISABLE_3_KEY (1<<0) /* disable 3-key reset */
12#define EP93XX_KEYPAD_DIAG_MODE (1<<1) /* diagnostic mode */
13#define EP93XX_KEYPAD_BACK_DRIVE (1<<2) /* back driving mode */
14#define EP93XX_KEYPAD_TEST_MODE (1<<3) /* scan only column 0 */
15#define EP93XX_KEYPAD_KDIV (1<<4) /* 1/4 clock or 1/16 clock */
16#define EP93XX_KEYPAD_AUTOREPEAT (1<<5) /* enable key autorepeat */
17
18/**
19 * struct ep93xx_keypad_platform_data - platform specific device structure
20 * @keymap_data: pointer to &matrix_keymap_data
21 * @debounce: debounce start count; terminal count is 0xff
22 * @prescale: row/column counter pre-scaler load value
23 * @flags: see above
24 */
25struct ep93xx_keypad_platform_data {
26 struct matrix_keymap_data *keymap_data;
27 unsigned int debounce;
28 unsigned int prescale;
29 unsigned int flags;
30};
31
32#define EP93XX_MATRIX_ROWS (8)
33#define EP93XX_MATRIX_COLS (8)
34
35#endif /* __ASM_ARCH_EP93XX_KEYPAD_H */
diff --git a/arch/arm/mach-ep93xx/include/mach/ep93xx_spi.h b/arch/arm/mach-ep93xx/include/mach/ep93xx_spi.h
new file mode 100644
index 00000000000..9bb63ac13f0
--- /dev/null
+++ b/arch/arm/mach-ep93xx/include/mach/ep93xx_spi.h
@@ -0,0 +1,29 @@
1#ifndef __ASM_MACH_EP93XX_SPI_H
2#define __ASM_MACH_EP93XX_SPI_H
3
4struct spi_device;
5
6/**
7 * struct ep93xx_spi_info - EP93xx specific SPI descriptor
8 * @num_chipselect: number of chip selects on this board, must be
9 * at least one
10 * @use_dma: use DMA for the transfers
11 */
12struct ep93xx_spi_info {
13 int num_chipselect;
14 bool use_dma;
15};
16
17/**
18 * struct ep93xx_spi_chip_ops - operation callbacks for SPI slave device
19 * @setup: setup the chip select mechanism
20 * @cleanup: cleanup the chip select mechanism
21 * @cs_control: control the device chip select
22 */
23struct ep93xx_spi_chip_ops {
24 int (*setup)(struct spi_device *spi);
25 void (*cleanup)(struct spi_device *spi);
26 void (*cs_control)(struct spi_device *spi, int value);
27};
28
29#endif /* __ASM_MACH_EP93XX_SPI_H */
diff --git a/arch/arm/mach-ep93xx/include/mach/fb.h b/arch/arm/mach-ep93xx/include/mach/fb.h
new file mode 100644
index 00000000000..d5ae11d7c45
--- /dev/null
+++ b/arch/arm/mach-ep93xx/include/mach/fb.h
@@ -0,0 +1,56 @@
1/*
2 * arch/arm/mach-ep93xx/include/mach/fb.h
3 */
4
5#ifndef __ASM_ARCH_EP93XXFB_H
6#define __ASM_ARCH_EP93XXFB_H
7
8struct platform_device;
9struct fb_videomode;
10struct fb_info;
11
12#define EP93XXFB_USE_MODEDB 0
13
14/* VideoAttributes flags */
15#define EP93XXFB_STATE_MACHINE_ENABLE (1 << 0)
16#define EP93XXFB_PIXEL_CLOCK_ENABLE (1 << 1)
17#define EP93XXFB_VSYNC_ENABLE (1 << 2)
18#define EP93XXFB_PIXEL_DATA_ENABLE (1 << 3)
19#define EP93XXFB_COMPOSITE_SYNC (1 << 4)
20#define EP93XXFB_SYNC_VERT_HIGH (1 << 5)
21#define EP93XXFB_SYNC_HORIZ_HIGH (1 << 6)
22#define EP93XXFB_SYNC_BLANK_HIGH (1 << 7)
23#define EP93XXFB_PCLK_FALLING (1 << 8)
24#define EP93XXFB_ENABLE_AC (1 << 9)
25#define EP93XXFB_ENABLE_LCD (1 << 10)
26#define EP93XXFB_ENABLE_CCIR (1 << 12)
27#define EP93XXFB_USE_PARALLEL_INTERFACE (1 << 13)
28#define EP93XXFB_ENABLE_INTERRUPT (1 << 14)
29#define EP93XXFB_USB_INTERLACE (1 << 16)
30#define EP93XXFB_USE_EQUALIZATION (1 << 17)
31#define EP93XXFB_USE_DOUBLE_HORZ (1 << 18)
32#define EP93XXFB_USE_DOUBLE_VERT (1 << 19)
33#define EP93XXFB_USE_BLANK_PIXEL (1 << 20)
34#define EP93XXFB_USE_SDCSN0 (0 << 21)
35#define EP93XXFB_USE_SDCSN1 (1 << 21)
36#define EP93XXFB_USE_SDCSN2 (2 << 21)
37#define EP93XXFB_USE_SDCSN3 (3 << 21)
38
39#define EP93XXFB_ENABLE (EP93XXFB_STATE_MACHINE_ENABLE | \
40 EP93XXFB_PIXEL_CLOCK_ENABLE | \
41 EP93XXFB_VSYNC_ENABLE | \
42 EP93XXFB_PIXEL_DATA_ENABLE)
43
44struct ep93xxfb_mach_info {
45 unsigned int num_modes;
46 const struct fb_videomode *modes;
47 const struct fb_videomode *default_mode;
48 int bpp;
49 unsigned int flags;
50
51 int (*setup)(struct platform_device *pdev);
52 void (*teardown)(struct platform_device *pdev);
53 void (*blank)(int blank_mode, struct fb_info *info);
54};
55
56#endif /* __ASM_ARCH_EP93XXFB_H */
diff --git a/arch/arm/mach-ep93xx/include/mach/gpio.h b/arch/arm/mach-ep93xx/include/mach/gpio.h
new file mode 100644
index 00000000000..c57152c231f
--- /dev/null
+++ b/arch/arm/mach-ep93xx/include/mach/gpio.h
@@ -0,0 +1,120 @@
1/*
2 * arch/arm/mach-ep93xx/include/mach/gpio.h
3 */
4
5#ifndef __ASM_ARCH_GPIO_H
6#define __ASM_ARCH_GPIO_H
7
8/* GPIO port A. */
9#define EP93XX_GPIO_LINE_A(x) ((x) + 0)
10#define EP93XX_GPIO_LINE_EGPIO0 EP93XX_GPIO_LINE_A(0)
11#define EP93XX_GPIO_LINE_EGPIO1 EP93XX_GPIO_LINE_A(1)
12#define EP93XX_GPIO_LINE_EGPIO2 EP93XX_GPIO_LINE_A(2)
13#define EP93XX_GPIO_LINE_EGPIO3 EP93XX_GPIO_LINE_A(3)
14#define EP93XX_GPIO_LINE_EGPIO4 EP93XX_GPIO_LINE_A(4)
15#define EP93XX_GPIO_LINE_EGPIO5 EP93XX_GPIO_LINE_A(5)
16#define EP93XX_GPIO_LINE_EGPIO6 EP93XX_GPIO_LINE_A(6)
17#define EP93XX_GPIO_LINE_EGPIO7 EP93XX_GPIO_LINE_A(7)
18
19/* GPIO port B. */
20#define EP93XX_GPIO_LINE_B(x) ((x) + 8)
21#define EP93XX_GPIO_LINE_EGPIO8 EP93XX_GPIO_LINE_B(0)
22#define EP93XX_GPIO_LINE_EGPIO9 EP93XX_GPIO_LINE_B(1)
23#define EP93XX_GPIO_LINE_EGPIO10 EP93XX_GPIO_LINE_B(2)
24#define EP93XX_GPIO_LINE_EGPIO11 EP93XX_GPIO_LINE_B(3)
25#define EP93XX_GPIO_LINE_EGPIO12 EP93XX_GPIO_LINE_B(4)
26#define EP93XX_GPIO_LINE_EGPIO13 EP93XX_GPIO_LINE_B(5)
27#define EP93XX_GPIO_LINE_EGPIO14 EP93XX_GPIO_LINE_B(6)
28#define EP93XX_GPIO_LINE_EGPIO15 EP93XX_GPIO_LINE_B(7)
29
30/* GPIO port C. */
31#define EP93XX_GPIO_LINE_C(x) ((x) + 40)
32#define EP93XX_GPIO_LINE_ROW0 EP93XX_GPIO_LINE_C(0)
33#define EP93XX_GPIO_LINE_ROW1 EP93XX_GPIO_LINE_C(1)
34#define EP93XX_GPIO_LINE_ROW2 EP93XX_GPIO_LINE_C(2)
35#define EP93XX_GPIO_LINE_ROW3 EP93XX_GPIO_LINE_C(3)
36#define EP93XX_GPIO_LINE_ROW4 EP93XX_GPIO_LINE_C(4)
37#define EP93XX_GPIO_LINE_ROW5 EP93XX_GPIO_LINE_C(5)
38#define EP93XX_GPIO_LINE_ROW6 EP93XX_GPIO_LINE_C(6)
39#define EP93XX_GPIO_LINE_ROW7 EP93XX_GPIO_LINE_C(7)
40
41/* GPIO port D. */
42#define EP93XX_GPIO_LINE_D(x) ((x) + 24)
43#define EP93XX_GPIO_LINE_COL0 EP93XX_GPIO_LINE_D(0)
44#define EP93XX_GPIO_LINE_COL1 EP93XX_GPIO_LINE_D(1)
45#define EP93XX_GPIO_LINE_COL2 EP93XX_GPIO_LINE_D(2)
46#define EP93XX_GPIO_LINE_COL3 EP93XX_GPIO_LINE_D(3)
47#define EP93XX_GPIO_LINE_COL4 EP93XX_GPIO_LINE_D(4)
48#define EP93XX_GPIO_LINE_COL5 EP93XX_GPIO_LINE_D(5)
49#define EP93XX_GPIO_LINE_COL6 EP93XX_GPIO_LINE_D(6)
50#define EP93XX_GPIO_LINE_COL7 EP93XX_GPIO_LINE_D(7)
51
52/* GPIO port E. */
53#define EP93XX_GPIO_LINE_E(x) ((x) + 32)
54#define EP93XX_GPIO_LINE_GRLED EP93XX_GPIO_LINE_E(0)
55#define EP93XX_GPIO_LINE_RDLED EP93XX_GPIO_LINE_E(1)
56#define EP93XX_GPIO_LINE_DIORn EP93XX_GPIO_LINE_E(2)
57#define EP93XX_GPIO_LINE_IDECS1n EP93XX_GPIO_LINE_E(3)
58#define EP93XX_GPIO_LINE_IDECS2n EP93XX_GPIO_LINE_E(4)
59#define EP93XX_GPIO_LINE_IDEDA0 EP93XX_GPIO_LINE_E(5)
60#define EP93XX_GPIO_LINE_IDEDA1 EP93XX_GPIO_LINE_E(6)
61#define EP93XX_GPIO_LINE_IDEDA2 EP93XX_GPIO_LINE_E(7)
62
63/* GPIO port F. */
64#define EP93XX_GPIO_LINE_F(x) ((x) + 16)
65#define EP93XX_GPIO_LINE_WP EP93XX_GPIO_LINE_F(0)
66#define EP93XX_GPIO_LINE_MCCD1 EP93XX_GPIO_LINE_F(1)
67#define EP93XX_GPIO_LINE_MCCD2 EP93XX_GPIO_LINE_F(2)
68#define EP93XX_GPIO_LINE_MCBVD1 EP93XX_GPIO_LINE_F(3)
69#define EP93XX_GPIO_LINE_MCBVD2 EP93XX_GPIO_LINE_F(4)
70#define EP93XX_GPIO_LINE_VS1 EP93XX_GPIO_LINE_F(5)
71#define EP93XX_GPIO_LINE_READY EP93XX_GPIO_LINE_F(6)
72#define EP93XX_GPIO_LINE_VS2 EP93XX_GPIO_LINE_F(7)
73
74/* GPIO port G. */
75#define EP93XX_GPIO_LINE_G(x) ((x) + 48)
76#define EP93XX_GPIO_LINE_EECLK EP93XX_GPIO_LINE_G(0)
77#define EP93XX_GPIO_LINE_EEDAT EP93XX_GPIO_LINE_G(1)
78#define EP93XX_GPIO_LINE_SLA0 EP93XX_GPIO_LINE_G(2)
79#define EP93XX_GPIO_LINE_SLA1 EP93XX_GPIO_LINE_G(3)
80#define EP93XX_GPIO_LINE_DD12 EP93XX_GPIO_LINE_G(4)
81#define EP93XX_GPIO_LINE_DD13 EP93XX_GPIO_LINE_G(5)
82#define EP93XX_GPIO_LINE_DD14 EP93XX_GPIO_LINE_G(6)
83#define EP93XX_GPIO_LINE_DD15 EP93XX_GPIO_LINE_G(7)
84
85/* GPIO port H. */
86#define EP93XX_GPIO_LINE_H(x) ((x) + 56)
87#define EP93XX_GPIO_LINE_DD0 EP93XX_GPIO_LINE_H(0)
88#define EP93XX_GPIO_LINE_DD1 EP93XX_GPIO_LINE_H(1)
89#define EP93XX_GPIO_LINE_DD2 EP93XX_GPIO_LINE_H(2)
90#define EP93XX_GPIO_LINE_DD3 EP93XX_GPIO_LINE_H(3)
91#define EP93XX_GPIO_LINE_DD4 EP93XX_GPIO_LINE_H(4)
92#define EP93XX_GPIO_LINE_DD5 EP93XX_GPIO_LINE_H(5)
93#define EP93XX_GPIO_LINE_DD6 EP93XX_GPIO_LINE_H(6)
94#define EP93XX_GPIO_LINE_DD7 EP93XX_GPIO_LINE_H(7)
95
96/* maximum value for gpio line identifiers */
97#define EP93XX_GPIO_LINE_MAX EP93XX_GPIO_LINE_H(7)
98
99/* maximum value for irq capable line identifiers */
100#define EP93XX_GPIO_LINE_MAX_IRQ EP93XX_GPIO_LINE_F(7)
101
102/* new generic GPIO API - see Documentation/gpio.txt */
103
104#include <asm-generic/gpio.h>
105
106#define gpio_get_value __gpio_get_value
107#define gpio_set_value __gpio_set_value
108#define gpio_cansleep __gpio_cansleep
109
110/*
111 * Map GPIO A0..A7 (0..7) to irq 64..71,
112 * B0..B7 (7..15) to irq 72..79, and
113 * F0..F7 (16..24) to irq 80..87.
114 */
115#define gpio_to_irq(gpio) \
116 (((gpio) <= EP93XX_GPIO_LINE_MAX_IRQ) ? (64 + (gpio)) : -EINVAL)
117
118#define irq_to_gpio(irq) ((irq) - gpio_to_irq(0))
119
120#endif
diff --git a/arch/arm/mach-ep93xx/include/mach/io.h b/arch/arm/mach-ep93xx/include/mach/io.h
new file mode 100644
index 00000000000..594b77f2105
--- /dev/null
+++ b/arch/arm/mach-ep93xx/include/mach/io.h
@@ -0,0 +1,22 @@
1/*
2 * arch/arm/mach-ep93xx/include/mach/io.h
3 */
4
5#ifndef __ASM_MACH_IO_H
6#define __ASM_MACH_IO_H
7
8#define IO_SPACE_LIMIT 0xffffffff
9
10#define __io(p) __typesafe_io(p)
11#define __mem_pci(p) (p)
12
13/*
14 * A typesafe __io() variation for variable initialisers
15 */
16#ifdef __ASSEMBLER__
17#define IOMEM(p) p
18#else
19#define IOMEM(p) ((void __iomem __force *)(p))
20#endif
21
22#endif /* __ASM_MACH_IO_H */
diff --git a/arch/arm/mach-ep93xx/include/mach/system.h b/arch/arm/mach-ep93xx/include/mach/system.h
new file mode 100644
index 00000000000..6d661fe9d66
--- /dev/null
+++ b/arch/arm/mach-ep93xx/include/mach/system.h
@@ -0,0 +1,24 @@
1/*
2 * arch/arm/mach-ep93xx/include/mach/system.h
3 */
4
5#include <mach/hardware.h>
6
7static inline void arch_idle(void)
8{
9 cpu_do_idle();
10}
11
12static inline void arch_reset(char mode, const char *cmd)
13{
14 local_irq_disable();
15
16 /*
17 * Set then clear the SWRST bit to initiate a software reset
18 */
19 ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_SWRST);
20 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_SWRST);
21
22 while (1)
23 ;
24}
diff --git a/arch/arm/mach-ep93xx/include/mach/ts72xx.h b/arch/arm/mach-ep93xx/include/mach/ts72xx.h
new file mode 100644
index 00000000000..f1397a13e76
--- /dev/null
+++ b/arch/arm/mach-ep93xx/include/mach/ts72xx.h
@@ -0,0 +1,98 @@
1/*
2 * arch/arm/mach-ep93xx/include/mach/ts72xx.h
3 */
4
5/*
6 * TS72xx memory map:
7 *
8 * virt phys size
9 * febff000 22000000 4K model number register (bits 0-2)
10 * febfe000 22400000 4K options register
11 * febfd000 22800000 4K options register #2
12 * febf9000 10800000 4K TS-5620 RTC index register
13 * febf8000 11700000 4K TS-5620 RTC data register
14 */
15
16#define TS72XX_MODEL_PHYS_BASE 0x22000000
17#define TS72XX_MODEL_VIRT_BASE 0xfebff000
18#define TS72XX_MODEL_SIZE 0x00001000
19
20#define TS72XX_MODEL_TS7200 0x00
21#define TS72XX_MODEL_TS7250 0x01
22#define TS72XX_MODEL_TS7260 0x02
23#define TS72XX_MODEL_TS7300 0x03
24#define TS72XX_MODEL_TS7400 0x04
25#define TS72XX_MODEL_MASK 0x07
26
27
28#define TS72XX_OPTIONS_PHYS_BASE 0x22400000
29#define TS72XX_OPTIONS_VIRT_BASE 0xfebfe000
30#define TS72XX_OPTIONS_SIZE 0x00001000
31
32#define TS72XX_OPTIONS_COM2_RS485 0x02
33#define TS72XX_OPTIONS_MAX197 0x01
34
35
36#define TS72XX_OPTIONS2_PHYS_BASE 0x22800000
37#define TS72XX_OPTIONS2_VIRT_BASE 0xfebfd000
38#define TS72XX_OPTIONS2_SIZE 0x00001000
39
40#define TS72XX_OPTIONS2_TS9420 0x04
41#define TS72XX_OPTIONS2_TS9420_BOOT 0x02
42
43
44#define TS72XX_RTC_INDEX_VIRT_BASE 0xfebf9000
45#define TS72XX_RTC_INDEX_PHYS_BASE 0x10800000
46#define TS72XX_RTC_INDEX_SIZE 0x00001000
47
48#define TS72XX_RTC_DATA_VIRT_BASE 0xfebf8000
49#define TS72XX_RTC_DATA_PHYS_BASE 0x11700000
50#define TS72XX_RTC_DATA_SIZE 0x00001000
51
52#define TS72XX_WDT_CONTROL_PHYS_BASE 0x23800000
53#define TS72XX_WDT_FEED_PHYS_BASE 0x23c00000
54
55#ifndef __ASSEMBLY__
56
57static inline int ts72xx_model(void)
58{
59 return __raw_readb(TS72XX_MODEL_VIRT_BASE) & TS72XX_MODEL_MASK;
60}
61
62static inline int board_is_ts7200(void)
63{
64 return ts72xx_model() == TS72XX_MODEL_TS7200;
65}
66
67static inline int board_is_ts7250(void)
68{
69 return ts72xx_model() == TS72XX_MODEL_TS7250;
70}
71
72static inline int board_is_ts7260(void)
73{
74 return ts72xx_model() == TS72XX_MODEL_TS7260;
75}
76
77static inline int board_is_ts7300(void)
78{
79 return ts72xx_model() == TS72XX_MODEL_TS7300;
80}
81
82static inline int board_is_ts7400(void)
83{
84 return ts72xx_model() == TS72XX_MODEL_TS7400;
85}
86
87static inline int is_max197_installed(void)
88{
89 return !!(__raw_readb(TS72XX_OPTIONS_VIRT_BASE) &
90 TS72XX_OPTIONS_MAX197);
91}
92
93static inline int is_ts9420_installed(void)
94{
95 return !!(__raw_readb(TS72XX_OPTIONS2_VIRT_BASE) &
96 TS72XX_OPTIONS2_TS9420);
97}
98#endif
diff --git a/arch/arm/mach-ep93xx/include/mach/vmalloc.h b/arch/arm/mach-ep93xx/include/mach/vmalloc.h
new file mode 100644
index 00000000000..1b3f25d03d3
--- /dev/null
+++ b/arch/arm/mach-ep93xx/include/mach/vmalloc.h
@@ -0,0 +1,5 @@
1/*
2 * arch/arm/mach-ep93xx/include/mach/vmalloc.h
3 */
4
5#define VMALLOC_END 0xfe800000UL
generated by cgit v1.2.2 (git 2.25.0) at 2025-04-24 21:23:55 -0400