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-rw-r--r--arch/arm/mach-clps7500/include/mach/memory.h43
1 files changed, 0 insertions, 43 deletions
diff --git a/arch/arm/mach-clps7500/include/mach/memory.h b/arch/arm/mach-clps7500/include/mach/memory.h
deleted file mode 100644
index 87b32db470c..00000000000
--- a/arch/arm/mach-clps7500/include/mach/memory.h
+++ /dev/null
@@ -1,43 +0,0 @@
1/*
2 * arch/arm/mach-clps7500/include/mach/memory.h
3 *
4 * Copyright (c) 1996,1997,1998 Russell King.
5 *
6 * Changelog:
7 * 20-Oct-1996 RMK Created
8 * 31-Dec-1997 RMK Fixed definitions to reduce warnings
9 * 11-Jan-1998 RMK Uninlined to reduce hits on cache
10 * 08-Feb-1998 RMK Added __virt_to_bus and __bus_to_virt
11 * 21-Mar-1999 RMK Renamed to memory.h
12 * RMK Added TASK_SIZE and PAGE_OFFSET
13 */
14#ifndef __ASM_ARCH_MEMORY_H
15#define __ASM_ARCH_MEMORY_H
16
17/*
18 * Physical DRAM offset.
19 */
20#define PHYS_OFFSET UL(0x10000000)
21
22/*
23 * These are exactly the same on the RiscPC as the
24 * physical memory view.
25 */
26#define __virt_to_bus(x) __virt_to_phys(x)
27#define __bus_to_virt(x) __phys_to_virt(x)
28
29/*
30 * Cache flushing area - ROM
31 */
32#define FLUSH_BASE_PHYS 0x00000000
33#define FLUSH_BASE 0xdf000000
34
35/*
36 * Sparsemem support. Each section is a maximum of 64MB. The sections
37 * are offset by 128MB and can cover 128MB, so that gives us a maximum
38 * of 29 physmem bits.
39 */
40#define MAX_PHYSMEM_BITS 29
41#define SECTION_SIZE_BITS 26
42
43#endif