diff options
Diffstat (limited to 'arch/arm/mach-at91/include/mach/at91sam9rl.h')
| -rw-r--r-- | arch/arm/mach-at91/include/mach/at91sam9rl.h | 29 |
1 files changed, 14 insertions, 15 deletions
diff --git a/arch/arm/mach-at91/include/mach/at91sam9rl.h b/arch/arm/mach-at91/include/mach/at91sam9rl.h index 1aabacd315d..2bb359e60b9 100644 --- a/arch/arm/mach-at91/include/mach/at91sam9rl.h +++ b/arch/arm/mach-at91/include/mach/at91sam9rl.h | |||
| @@ -69,27 +69,26 @@ | |||
| 69 | /* | 69 | /* |
| 70 | * System Peripherals (offset from AT91_BASE_SYS) | 70 | * System Peripherals (offset from AT91_BASE_SYS) |
| 71 | */ | 71 | */ |
| 72 | #define AT91_DMA (0xffffe600 - AT91_BASE_SYS) | ||
| 73 | #define AT91_ECC (0xffffe800 - AT91_BASE_SYS) | ||
| 74 | #define AT91_SDRAMC0 (0xffffea00 - AT91_BASE_SYS) | 72 | #define AT91_SDRAMC0 (0xffffea00 - AT91_BASE_SYS) |
| 75 | #define AT91_SMC (0xffffec00 - AT91_BASE_SYS) | ||
| 76 | #define AT91_MATRIX (0xffffee00 - AT91_BASE_SYS) | 73 | #define AT91_MATRIX (0xffffee00 - AT91_BASE_SYS) |
| 77 | #define AT91_CCFG (0xffffef10 - AT91_BASE_SYS) | ||
| 78 | #define AT91_AIC (0xfffff000 - AT91_BASE_SYS) | ||
| 79 | #define AT91_DBGU (0xfffff200 - AT91_BASE_SYS) | ||
| 80 | #define AT91_PIOA (0xfffff400 - AT91_BASE_SYS) | ||
| 81 | #define AT91_PIOB (0xfffff600 - AT91_BASE_SYS) | ||
| 82 | #define AT91_PIOC (0xfffff800 - AT91_BASE_SYS) | ||
| 83 | #define AT91_PIOD (0xfffffa00 - AT91_BASE_SYS) | ||
| 84 | #define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) | 74 | #define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) |
| 85 | #define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) | 75 | #define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) |
| 86 | #define AT91_SHDWC (0xfffffd10 - AT91_BASE_SYS) | ||
| 87 | #define AT91_RTT (0xfffffd20 - AT91_BASE_SYS) | ||
| 88 | #define AT91_PIT (0xfffffd30 - AT91_BASE_SYS) | ||
| 89 | #define AT91_WDT (0xfffffd40 - AT91_BASE_SYS) | ||
| 90 | #define AT91_SCKCR (0xfffffd50 - AT91_BASE_SYS) | 76 | #define AT91_SCKCR (0xfffffd50 - AT91_BASE_SYS) |
| 91 | #define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS) | 77 | #define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS) |
| 92 | #define AT91_RTC (0xfffffe00 - AT91_BASE_SYS) | 78 | |
| 79 | #define AT91SAM9RL_BASE_DMA 0xffffe600 | ||
| 80 | #define AT91SAM9RL_BASE_ECC 0xffffe800 | ||
| 81 | #define AT91SAM9RL_BASE_SMC 0xffffec00 | ||
| 82 | #define AT91SAM9RL_BASE_DBGU AT91_BASE_DBGU0 | ||
| 83 | #define AT91SAM9RL_BASE_PIOA 0xfffff400 | ||
| 84 | #define AT91SAM9RL_BASE_PIOB 0xfffff600 | ||
| 85 | #define AT91SAM9RL_BASE_PIOC 0xfffff800 | ||
| 86 | #define AT91SAM9RL_BASE_PIOD 0xfffffa00 | ||
| 87 | #define AT91SAM9RL_BASE_SHDWC 0xfffffd10 | ||
| 88 | #define AT91SAM9RL_BASE_RTT 0xfffffd20 | ||
| 89 | #define AT91SAM9RL_BASE_PIT 0xfffffd30 | ||
| 90 | #define AT91SAM9RL_BASE_WDT 0xfffffd40 | ||
| 91 | #define AT91SAM9RL_BASE_RTC 0xfffffe00 | ||
| 93 | 92 | ||
| 94 | #define AT91_USART0 AT91SAM9RL_BASE_US0 | 93 | #define AT91_USART0 AT91SAM9RL_BASE_US0 |
| 95 | #define AT91_USART1 AT91SAM9RL_BASE_US1 | 94 | #define AT91_USART1 AT91SAM9RL_BASE_US1 |